1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ 2 /* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11 #ifndef __SOUND_SOC_SOF_IO_H 12 #define __SOUND_SOC_SOF_IO_H 13 14 #include <linux/device.h> 15 #include <linux/interrupt.h> 16 #include <linux/kernel.h> 17 #include <linux/types.h> 18 #include <sound/pcm.h> 19 #include "sof-priv.h" 20 21 #define sof_ops(sdev) \ 22 ((sdev)->pdata->desc->ops) 23 24 /* Mandatory operations are verified during probing */ 25 26 /* init */ 27 static inline int snd_sof_probe(struct snd_sof_dev *sdev) 28 { 29 return sof_ops(sdev)->probe(sdev); 30 } 31 32 static inline int snd_sof_remove(struct snd_sof_dev *sdev) 33 { 34 if (sof_ops(sdev)->remove) 35 return sof_ops(sdev)->remove(sdev); 36 37 return 0; 38 } 39 40 /* control */ 41 42 /* 43 * snd_sof_dsp_run returns the core mask of the cores that are available 44 * after successful fw boot 45 */ 46 static inline int snd_sof_dsp_run(struct snd_sof_dev *sdev) 47 { 48 return sof_ops(sdev)->run(sdev); 49 } 50 51 static inline int snd_sof_dsp_stall(struct snd_sof_dev *sdev) 52 { 53 if (sof_ops(sdev)->stall) 54 return sof_ops(sdev)->stall(sdev); 55 56 return 0; 57 } 58 59 static inline int snd_sof_dsp_reset(struct snd_sof_dev *sdev) 60 { 61 if (sof_ops(sdev)->reset) 62 return sof_ops(sdev)->reset(sdev); 63 64 return 0; 65 } 66 67 /* dsp core power up/power down */ 68 static inline int snd_sof_dsp_core_power_up(struct snd_sof_dev *sdev, 69 unsigned int core_mask) 70 { 71 if (sof_ops(sdev)->core_power_up) 72 return sof_ops(sdev)->core_power_up(sdev, core_mask); 73 74 return 0; 75 } 76 77 static inline int snd_sof_dsp_core_power_down(struct snd_sof_dev *sdev, 78 unsigned int core_mask) 79 { 80 if (sof_ops(sdev)->core_power_down) 81 return sof_ops(sdev)->core_power_down(sdev, core_mask); 82 83 return 0; 84 } 85 86 /* pre/post fw load */ 87 static inline int snd_sof_dsp_pre_fw_run(struct snd_sof_dev *sdev) 88 { 89 if (sof_ops(sdev)->pre_fw_run) 90 return sof_ops(sdev)->pre_fw_run(sdev); 91 92 return 0; 93 } 94 95 static inline int snd_sof_dsp_post_fw_run(struct snd_sof_dev *sdev) 96 { 97 if (sof_ops(sdev)->post_fw_run) 98 return sof_ops(sdev)->post_fw_run(sdev); 99 100 return 0; 101 } 102 103 /* power management */ 104 static inline int snd_sof_dsp_resume(struct snd_sof_dev *sdev) 105 { 106 if (sof_ops(sdev)->resume) 107 return sof_ops(sdev)->resume(sdev); 108 109 return 0; 110 } 111 112 static inline int snd_sof_dsp_suspend(struct snd_sof_dev *sdev, int state) 113 { 114 if (sof_ops(sdev)->suspend) 115 return sof_ops(sdev)->suspend(sdev, state); 116 117 return 0; 118 } 119 120 static inline int snd_sof_dsp_runtime_resume(struct snd_sof_dev *sdev) 121 { 122 if (sof_ops(sdev)->runtime_resume) 123 return sof_ops(sdev)->runtime_resume(sdev); 124 125 return 0; 126 } 127 128 static inline int snd_sof_dsp_runtime_suspend(struct snd_sof_dev *sdev, 129 int state) 130 { 131 if (sof_ops(sdev)->runtime_suspend) 132 return sof_ops(sdev)->runtime_suspend(sdev, state); 133 134 return 0; 135 } 136 137 static inline void snd_sof_dsp_hw_params_upon_resume(struct snd_sof_dev *sdev) 138 { 139 if (sof_ops(sdev)->set_hw_params_upon_resume) 140 sof_ops(sdev)->set_hw_params_upon_resume(sdev); 141 } 142 143 static inline int snd_sof_dsp_set_clk(struct snd_sof_dev *sdev, u32 freq) 144 { 145 if (sof_ops(sdev)->set_clk) 146 return sof_ops(sdev)->set_clk(sdev, freq); 147 148 return 0; 149 } 150 151 /* debug */ 152 static inline void snd_sof_dsp_dbg_dump(struct snd_sof_dev *sdev, u32 flags) 153 { 154 if (sof_ops(sdev)->dbg_dump) 155 return sof_ops(sdev)->dbg_dump(sdev, flags); 156 } 157 158 static inline void snd_sof_ipc_dump(struct snd_sof_dev *sdev) 159 { 160 if (sof_ops(sdev)->ipc_dump) 161 return sof_ops(sdev)->ipc_dump(sdev); 162 } 163 164 /* register IO */ 165 static inline void snd_sof_dsp_write(struct snd_sof_dev *sdev, u32 bar, 166 u32 offset, u32 value) 167 { 168 if (sof_ops(sdev)->write) { 169 sof_ops(sdev)->write(sdev, sdev->bar[bar] + offset, value); 170 return; 171 } 172 173 dev_err_ratelimited(sdev->dev, "error: %s not defined\n", __func__); 174 } 175 176 static inline void snd_sof_dsp_write64(struct snd_sof_dev *sdev, u32 bar, 177 u32 offset, u64 value) 178 { 179 if (sof_ops(sdev)->write64) { 180 sof_ops(sdev)->write64(sdev, sdev->bar[bar] + offset, value); 181 return; 182 } 183 184 dev_err_ratelimited(sdev->dev, "error: %s not defined\n", __func__); 185 } 186 187 static inline u32 snd_sof_dsp_read(struct snd_sof_dev *sdev, u32 bar, 188 u32 offset) 189 { 190 if (sof_ops(sdev)->read) 191 return sof_ops(sdev)->read(sdev, sdev->bar[bar] + offset); 192 193 dev_err(sdev->dev, "error: %s not defined\n", __func__); 194 return -ENOTSUPP; 195 } 196 197 static inline u64 snd_sof_dsp_read64(struct snd_sof_dev *sdev, u32 bar, 198 u32 offset) 199 { 200 if (sof_ops(sdev)->read64) 201 return sof_ops(sdev)->read64(sdev, sdev->bar[bar] + offset); 202 203 dev_err(sdev->dev, "error: %s not defined\n", __func__); 204 return -ENOTSUPP; 205 } 206 207 /* block IO */ 208 static inline void snd_sof_dsp_block_read(struct snd_sof_dev *sdev, u32 bar, 209 u32 offset, void *dest, size_t bytes) 210 { 211 sof_ops(sdev)->block_read(sdev, bar, offset, dest, bytes); 212 } 213 214 static inline void snd_sof_dsp_block_write(struct snd_sof_dev *sdev, u32 bar, 215 u32 offset, void *src, size_t bytes) 216 { 217 sof_ops(sdev)->block_write(sdev, bar, offset, src, bytes); 218 } 219 220 /* ipc */ 221 static inline int snd_sof_dsp_send_msg(struct snd_sof_dev *sdev, 222 struct snd_sof_ipc_msg *msg) 223 { 224 return sof_ops(sdev)->send_msg(sdev, msg); 225 } 226 227 /* host DMA trace */ 228 static inline int snd_sof_dma_trace_init(struct snd_sof_dev *sdev, 229 u32 *stream_tag) 230 { 231 if (sof_ops(sdev)->trace_init) 232 return sof_ops(sdev)->trace_init(sdev, stream_tag); 233 234 return 0; 235 } 236 237 static inline int snd_sof_dma_trace_release(struct snd_sof_dev *sdev) 238 { 239 if (sof_ops(sdev)->trace_release) 240 return sof_ops(sdev)->trace_release(sdev); 241 242 return 0; 243 } 244 245 static inline int snd_sof_dma_trace_trigger(struct snd_sof_dev *sdev, int cmd) 246 { 247 if (sof_ops(sdev)->trace_trigger) 248 return sof_ops(sdev)->trace_trigger(sdev, cmd); 249 250 return 0; 251 } 252 253 /* host PCM ops */ 254 static inline int 255 snd_sof_pcm_platform_open(struct snd_sof_dev *sdev, 256 struct snd_pcm_substream *substream) 257 { 258 if (sof_ops(sdev) && sof_ops(sdev)->pcm_open) 259 return sof_ops(sdev)->pcm_open(sdev, substream); 260 261 return 0; 262 } 263 264 /* disconnect pcm substream to a host stream */ 265 static inline int 266 snd_sof_pcm_platform_close(struct snd_sof_dev *sdev, 267 struct snd_pcm_substream *substream) 268 { 269 if (sof_ops(sdev) && sof_ops(sdev)->pcm_close) 270 return sof_ops(sdev)->pcm_close(sdev, substream); 271 272 return 0; 273 } 274 275 /* host stream hw params */ 276 static inline int 277 snd_sof_pcm_platform_hw_params(struct snd_sof_dev *sdev, 278 struct snd_pcm_substream *substream, 279 struct snd_pcm_hw_params *params, 280 struct sof_ipc_stream_params *ipc_params) 281 { 282 if (sof_ops(sdev) && sof_ops(sdev)->pcm_hw_params) 283 return sof_ops(sdev)->pcm_hw_params(sdev, substream, 284 params, ipc_params); 285 286 return 0; 287 } 288 289 /* host stream trigger */ 290 static inline int 291 snd_sof_pcm_platform_trigger(struct snd_sof_dev *sdev, 292 struct snd_pcm_substream *substream, int cmd) 293 { 294 if (sof_ops(sdev) && sof_ops(sdev)->pcm_trigger) 295 return sof_ops(sdev)->pcm_trigger(sdev, substream, cmd); 296 297 return 0; 298 } 299 300 /* host DSP message data */ 301 static inline void snd_sof_ipc_msg_data(struct snd_sof_dev *sdev, 302 struct snd_pcm_substream *substream, 303 void *p, size_t sz) 304 { 305 sof_ops(sdev)->ipc_msg_data(sdev, substream, p, sz); 306 } 307 308 /* host configure DSP HW parameters */ 309 static inline int 310 snd_sof_ipc_pcm_params(struct snd_sof_dev *sdev, 311 struct snd_pcm_substream *substream, 312 const struct sof_ipc_pcm_params_reply *reply) 313 { 314 return sof_ops(sdev)->ipc_pcm_params(sdev, substream, reply); 315 } 316 317 /* host stream pointer */ 318 static inline snd_pcm_uframes_t 319 snd_sof_pcm_platform_pointer(struct snd_sof_dev *sdev, 320 struct snd_pcm_substream *substream) 321 { 322 if (sof_ops(sdev) && sof_ops(sdev)->pcm_pointer) 323 return sof_ops(sdev)->pcm_pointer(sdev, substream); 324 325 return 0; 326 } 327 328 static inline const struct snd_sof_dsp_ops 329 *sof_get_ops(const struct sof_dev_desc *d, 330 const struct sof_ops_table mach_ops[], int asize) 331 { 332 int i; 333 334 for (i = 0; i < asize; i++) { 335 if (d == mach_ops[i].desc) 336 return mach_ops[i].ops; 337 } 338 339 /* not found */ 340 return NULL; 341 } 342 343 /** 344 * snd_sof_dsp_register_poll_timeout - Periodically poll an address 345 * until a condition is met or a timeout occurs 346 * @op: accessor function (takes @addr as its only argument) 347 * @addr: Address to poll 348 * @val: Variable to read the value into 349 * @cond: Break condition (usually involving @val) 350 * @sleep_us: Maximum time to sleep between reads in us (0 351 * tight-loops). Should be less than ~20ms since usleep_range 352 * is used (see Documentation/timers/timers-howto.txt). 353 * @timeout_us: Timeout in us, 0 means never timeout 354 * 355 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 356 * case, the last read value at @addr is stored in @val. Must not 357 * be called from atomic context if sleep_us or timeout_us are used. 358 * 359 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. 360 */ 361 #define snd_sof_dsp_read_poll_timeout(sdev, bar, offset, val, cond, sleep_us, timeout_us) \ 362 ({ \ 363 u64 __timeout_us = (timeout_us); \ 364 unsigned long __sleep_us = (sleep_us); \ 365 ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ 366 might_sleep_if((__sleep_us) != 0); \ 367 for (;;) { \ 368 (val) = snd_sof_dsp_read(sdev, bar, offset); \ 369 if (cond) { \ 370 dev_dbg(sdev->dev, \ 371 "FW Poll Status: reg=%#x successful\n", (val)); \ 372 break; \ 373 } \ 374 if (__timeout_us && \ 375 ktime_compare(ktime_get(), __timeout) > 0) { \ 376 (val) = snd_sof_dsp_read(sdev, bar, offset); \ 377 dev_dbg(sdev->dev, \ 378 "FW Poll Status: reg=%#x timedout\n", (val)); \ 379 break; \ 380 } \ 381 if (__sleep_us) \ 382 usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ 383 } \ 384 (cond) ? 0 : -ETIMEDOUT; \ 385 }) 386 387 /* This is for registers bits with attribute RWC */ 388 bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset, 389 u32 mask, u32 value); 390 391 bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar, 392 u32 offset, u32 mask, u32 value); 393 394 bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar, 395 u32 offset, u64 mask, u64 value); 396 397 bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset, 398 u32 mask, u32 value); 399 400 bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar, 401 u32 offset, u64 mask, u64 value); 402 403 void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar, 404 u32 offset, u32 mask, u32 value); 405 406 int snd_sof_dsp_register_poll(struct snd_sof_dev *sdev, u32 bar, u32 offset, 407 u32 mask, u32 target, u32 timeout_ms, 408 u32 interval_us); 409 410 void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset); 411 #endif 412