11f0214a8STinghan Shen // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 21f0214a8STinghan Shen // 31f0214a8STinghan Shen // Copyright(c) 2022 Mediatek Inc. All rights reserved. 41f0214a8STinghan Shen // 51f0214a8STinghan Shen // Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 61f0214a8STinghan Shen // Tinghan Shen <tinghan.shen@mediatek.com> 71f0214a8STinghan Shen 81f0214a8STinghan Shen /* 91f0214a8STinghan Shen * Hardware interface for audio DSP on mt8186 101f0214a8STinghan Shen */ 111f0214a8STinghan Shen 121f0214a8STinghan Shen #include <linux/delay.h> 131f0214a8STinghan Shen #include <linux/firmware.h> 141f0214a8STinghan Shen #include <linux/io.h> 151f0214a8STinghan Shen #include <linux/of_address.h> 161f0214a8STinghan Shen #include <linux/of_irq.h> 171f0214a8STinghan Shen #include <linux/of_platform.h> 181f0214a8STinghan Shen #include <linux/of_reserved_mem.h> 191f0214a8STinghan Shen #include <linux/module.h> 201f0214a8STinghan Shen 211f0214a8STinghan Shen #include <sound/sof.h> 221f0214a8STinghan Shen #include <sound/sof/xtensa.h> 231f0214a8STinghan Shen #include "../../ops.h" 241f0214a8STinghan Shen #include "../../sof-of-dev.h" 251f0214a8STinghan Shen #include "../../sof-audio.h" 261f0214a8STinghan Shen #include "../adsp_helper.h" 271f0214a8STinghan Shen #include "mt8186.h" 281f0214a8STinghan Shen 291f0214a8STinghan Shen static int platform_parse_resource(struct platform_device *pdev, void *data) 301f0214a8STinghan Shen { 311f0214a8STinghan Shen struct resource *mmio; 321f0214a8STinghan Shen struct resource res; 331f0214a8STinghan Shen struct device_node *mem_region; 341f0214a8STinghan Shen struct device *dev = &pdev->dev; 351f0214a8STinghan Shen struct mtk_adsp_chip_info *adsp = data; 361f0214a8STinghan Shen int ret; 371f0214a8STinghan Shen 381f0214a8STinghan Shen mem_region = of_parse_phandle(dev->of_node, "memory-region", 0); 391f0214a8STinghan Shen if (!mem_region) { 401f0214a8STinghan Shen dev_err(dev, "no dma memory-region phandle\n"); 411f0214a8STinghan Shen return -ENODEV; 421f0214a8STinghan Shen } 431f0214a8STinghan Shen 441f0214a8STinghan Shen ret = of_address_to_resource(mem_region, 0, &res); 451f0214a8STinghan Shen of_node_put(mem_region); 461f0214a8STinghan Shen if (ret) { 471f0214a8STinghan Shen dev_err(dev, "of_address_to_resource dma failed\n"); 481f0214a8STinghan Shen return ret; 491f0214a8STinghan Shen } 501f0214a8STinghan Shen 511f0214a8STinghan Shen dev_dbg(dev, "DMA %pR\n", &res); 521f0214a8STinghan Shen 531f0214a8STinghan Shen ret = of_reserved_mem_device_init(dev); 541f0214a8STinghan Shen if (ret) { 551f0214a8STinghan Shen dev_err(dev, "of_reserved_mem_device_init failed\n"); 561f0214a8STinghan Shen return ret; 571f0214a8STinghan Shen } 581f0214a8STinghan Shen 591f0214a8STinghan Shen mem_region = of_parse_phandle(dev->of_node, "memory-region", 1); 601f0214a8STinghan Shen if (!mem_region) { 611f0214a8STinghan Shen dev_err(dev, "no memory-region sysmem phandle\n"); 621f0214a8STinghan Shen return -ENODEV; 631f0214a8STinghan Shen } 641f0214a8STinghan Shen 651f0214a8STinghan Shen ret = of_address_to_resource(mem_region, 0, &res); 661f0214a8STinghan Shen of_node_put(mem_region); 671f0214a8STinghan Shen if (ret) { 681f0214a8STinghan Shen dev_err(dev, "of_address_to_resource sysmem failed\n"); 691f0214a8STinghan Shen return ret; 701f0214a8STinghan Shen } 711f0214a8STinghan Shen 721f0214a8STinghan Shen adsp->pa_dram = (phys_addr_t)res.start; 731f0214a8STinghan Shen if (adsp->pa_dram & DRAM_REMAP_MASK) { 741f0214a8STinghan Shen dev_err(dev, "adsp memory(%#x) is not 4K-aligned\n", 751f0214a8STinghan Shen (u32)adsp->pa_dram); 761f0214a8STinghan Shen return -EINVAL; 771f0214a8STinghan Shen } 781f0214a8STinghan Shen 791f0214a8STinghan Shen adsp->dramsize = resource_size(&res); 801f0214a8STinghan Shen if (adsp->dramsize < TOTAL_SIZE_SHARED_DRAM_FROM_TAIL) { 811f0214a8STinghan Shen dev_err(dev, "adsp memory(%#x) is not enough for share\n", 821f0214a8STinghan Shen adsp->dramsize); 831f0214a8STinghan Shen return -EINVAL; 841f0214a8STinghan Shen } 851f0214a8STinghan Shen 861f0214a8STinghan Shen dev_dbg(dev, "dram pbase=%pa size=%#x\n", &adsp->pa_dram, adsp->dramsize); 871f0214a8STinghan Shen 881f0214a8STinghan Shen mmio = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); 891f0214a8STinghan Shen if (!mmio) { 901f0214a8STinghan Shen dev_err(dev, "no ADSP-CFG register resource\n"); 911f0214a8STinghan Shen return -ENXIO; 921f0214a8STinghan Shen } 931f0214a8STinghan Shen 941f0214a8STinghan Shen adsp->va_cfgreg = devm_ioremap_resource(dev, mmio); 951f0214a8STinghan Shen if (IS_ERR(adsp->va_cfgreg)) 961f0214a8STinghan Shen return PTR_ERR(adsp->va_cfgreg); 971f0214a8STinghan Shen 981f0214a8STinghan Shen adsp->pa_cfgreg = (phys_addr_t)mmio->start; 991f0214a8STinghan Shen adsp->cfgregsize = resource_size(mmio); 1001f0214a8STinghan Shen 1011f0214a8STinghan Shen dev_dbg(dev, "cfgreg pbase=%pa size=%#x\n", &adsp->pa_cfgreg, adsp->cfgregsize); 1021f0214a8STinghan Shen 1031f0214a8STinghan Shen mmio = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); 1041f0214a8STinghan Shen if (!mmio) { 1051f0214a8STinghan Shen dev_err(dev, "no SRAM resource\n"); 1061f0214a8STinghan Shen return -ENXIO; 1071f0214a8STinghan Shen } 1081f0214a8STinghan Shen 1091f0214a8STinghan Shen adsp->pa_sram = (phys_addr_t)mmio->start; 1101f0214a8STinghan Shen adsp->sramsize = resource_size(mmio); 1111f0214a8STinghan Shen 1121f0214a8STinghan Shen dev_dbg(dev, "sram pbase=%pa size=%#x\n", &adsp->pa_sram, adsp->sramsize); 1131f0214a8STinghan Shen 1141f0214a8STinghan Shen mmio = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sec"); 1151f0214a8STinghan Shen if (!mmio) { 1161f0214a8STinghan Shen dev_err(dev, "no SEC register resource\n"); 1171f0214a8STinghan Shen return -ENXIO; 1181f0214a8STinghan Shen } 1191f0214a8STinghan Shen 1201f0214a8STinghan Shen adsp->va_secreg = devm_ioremap_resource(dev, mmio); 1211f0214a8STinghan Shen if (IS_ERR(adsp->va_secreg)) 1221f0214a8STinghan Shen return PTR_ERR(adsp->va_secreg); 1231f0214a8STinghan Shen 1241f0214a8STinghan Shen adsp->pa_secreg = (phys_addr_t)mmio->start; 1251f0214a8STinghan Shen adsp->secregsize = resource_size(mmio); 1261f0214a8STinghan Shen 1271f0214a8STinghan Shen dev_dbg(dev, "secreg pbase=%pa size=%#x\n", &adsp->pa_secreg, adsp->secregsize); 1281f0214a8STinghan Shen 1291f0214a8STinghan Shen mmio = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bus"); 1301f0214a8STinghan Shen if (!mmio) { 1311f0214a8STinghan Shen dev_err(dev, "no BUS register resource\n"); 1321f0214a8STinghan Shen return -ENXIO; 1331f0214a8STinghan Shen } 1341f0214a8STinghan Shen 1351f0214a8STinghan Shen adsp->va_busreg = devm_ioremap_resource(dev, mmio); 1361f0214a8STinghan Shen if (IS_ERR(adsp->va_busreg)) 1371f0214a8STinghan Shen return PTR_ERR(adsp->va_busreg); 1381f0214a8STinghan Shen 1391f0214a8STinghan Shen adsp->pa_busreg = (phys_addr_t)mmio->start; 1401f0214a8STinghan Shen adsp->busregsize = resource_size(mmio); 1411f0214a8STinghan Shen 1421f0214a8STinghan Shen dev_dbg(dev, "busreg pbase=%pa size=%#x\n", &adsp->pa_busreg, adsp->busregsize); 1431f0214a8STinghan Shen 1441f0214a8STinghan Shen return 0; 1451f0214a8STinghan Shen } 1461f0214a8STinghan Shen 1471f0214a8STinghan Shen static void adsp_sram_power_on(struct snd_sof_dev *sdev) 1481f0214a8STinghan Shen { 1491f0214a8STinghan Shen snd_sof_dsp_update_bits(sdev, DSP_BUSREG_BAR, ADSP_SRAM_POOL_CON, 1501f0214a8STinghan Shen DSP_SRAM_POOL_PD_MASK, 0); 1511f0214a8STinghan Shen } 1521f0214a8STinghan Shen 1531f0214a8STinghan Shen static void adsp_sram_power_off(struct snd_sof_dev *sdev) 1541f0214a8STinghan Shen { 1551f0214a8STinghan Shen snd_sof_dsp_update_bits(sdev, DSP_BUSREG_BAR, ADSP_SRAM_POOL_CON, 1561f0214a8STinghan Shen DSP_SRAM_POOL_PD_MASK, DSP_SRAM_POOL_PD_MASK); 1571f0214a8STinghan Shen } 1581f0214a8STinghan Shen 1591f0214a8STinghan Shen /* Init the basic DSP DRAM address */ 1601f0214a8STinghan Shen static int adsp_memory_remap_init(struct snd_sof_dev *sdev, struct mtk_adsp_chip_info *adsp) 1611f0214a8STinghan Shen { 1621f0214a8STinghan Shen u32 offset; 1631f0214a8STinghan Shen 1641f0214a8STinghan Shen offset = adsp->pa_dram - DRAM_PHYS_BASE_FROM_DSP_VIEW; 1651f0214a8STinghan Shen adsp->dram_offset = offset; 1661f0214a8STinghan Shen offset >>= DRAM_REMAP_SHIFT; 1671f0214a8STinghan Shen 1681f0214a8STinghan Shen dev_dbg(sdev->dev, "adsp->pa_dram %pa, offset %#x\n", &adsp->pa_dram, offset); 1691f0214a8STinghan Shen 1701f0214a8STinghan Shen snd_sof_dsp_write(sdev, DSP_BUSREG_BAR, DSP_C0_EMI_MAP_ADDR, offset); 1711f0214a8STinghan Shen snd_sof_dsp_write(sdev, DSP_BUSREG_BAR, DSP_C0_DMAEMI_MAP_ADDR, offset); 1721f0214a8STinghan Shen 1731f0214a8STinghan Shen if (offset != snd_sof_dsp_read(sdev, DSP_BUSREG_BAR, DSP_C0_EMI_MAP_ADDR) || 1741f0214a8STinghan Shen offset != snd_sof_dsp_read(sdev, DSP_BUSREG_BAR, DSP_C0_DMAEMI_MAP_ADDR)) { 1751f0214a8STinghan Shen dev_err(sdev->dev, "emi remap fail\n"); 1761f0214a8STinghan Shen return -EIO; 1771f0214a8STinghan Shen } 1781f0214a8STinghan Shen 1791f0214a8STinghan Shen return 0; 1801f0214a8STinghan Shen } 1811f0214a8STinghan Shen 1821f0214a8STinghan Shen static int adsp_shared_base_ioremap(struct platform_device *pdev, void *data) 1831f0214a8STinghan Shen { 1841f0214a8STinghan Shen struct device *dev = &pdev->dev; 1851f0214a8STinghan Shen struct mtk_adsp_chip_info *adsp = data; 1861f0214a8STinghan Shen u32 shared_size; 1871f0214a8STinghan Shen 1881f0214a8STinghan Shen /* remap shared-dram base to be non-cachable */ 1891f0214a8STinghan Shen shared_size = TOTAL_SIZE_SHARED_DRAM_FROM_TAIL; 1901f0214a8STinghan Shen adsp->pa_shared_dram = adsp->pa_dram + adsp->dramsize - shared_size; 1911f0214a8STinghan Shen if (adsp->va_dram) { 1921f0214a8STinghan Shen adsp->shared_dram = adsp->va_dram + DSP_DRAM_SIZE - shared_size; 1931f0214a8STinghan Shen } else { 1941f0214a8STinghan Shen adsp->shared_dram = devm_ioremap(dev, adsp->pa_shared_dram, 1951f0214a8STinghan Shen shared_size); 1961f0214a8STinghan Shen if (!adsp->shared_dram) { 1971f0214a8STinghan Shen dev_err(dev, "ioremap failed for shared DRAM\n"); 1981f0214a8STinghan Shen return -ENOMEM; 1991f0214a8STinghan Shen } 2001f0214a8STinghan Shen } 2011f0214a8STinghan Shen dev_dbg(dev, "shared-dram vbase=%p, phy addr :%pa, size=%#x\n", 2021f0214a8STinghan Shen adsp->shared_dram, &adsp->pa_shared_dram, shared_size); 2031f0214a8STinghan Shen 2041f0214a8STinghan Shen return 0; 2051f0214a8STinghan Shen } 2061f0214a8STinghan Shen 207*570c14dcSTinghan Shen static int mt8186_run(struct snd_sof_dev *sdev) 208*570c14dcSTinghan Shen { 209*570c14dcSTinghan Shen u32 adsp_bootup_addr; 210*570c14dcSTinghan Shen 211*570c14dcSTinghan Shen adsp_bootup_addr = SRAM_PHYS_BASE_FROM_DSP_VIEW; 212*570c14dcSTinghan Shen dev_dbg(sdev->dev, "HIFIxDSP boot from base : 0x%08X\n", adsp_bootup_addr); 213*570c14dcSTinghan Shen sof_hifixdsp_boot_sequence(sdev, adsp_bootup_addr); 214*570c14dcSTinghan Shen 215*570c14dcSTinghan Shen return 0; 216*570c14dcSTinghan Shen } 217*570c14dcSTinghan Shen 2181f0214a8STinghan Shen static int mt8186_dsp_probe(struct snd_sof_dev *sdev) 2191f0214a8STinghan Shen { 2201f0214a8STinghan Shen struct platform_device *pdev = container_of(sdev->dev, struct platform_device, dev); 2211f0214a8STinghan Shen struct adsp_priv *priv; 2221f0214a8STinghan Shen int ret; 2231f0214a8STinghan Shen 2241f0214a8STinghan Shen priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 2251f0214a8STinghan Shen if (!priv) 2261f0214a8STinghan Shen return -ENOMEM; 2271f0214a8STinghan Shen 2281f0214a8STinghan Shen sdev->pdata->hw_pdata = priv; 2291f0214a8STinghan Shen priv->dev = sdev->dev; 2301f0214a8STinghan Shen priv->sdev = sdev; 2311f0214a8STinghan Shen 2321f0214a8STinghan Shen priv->adsp = devm_kzalloc(&pdev->dev, sizeof(struct mtk_adsp_chip_info), GFP_KERNEL); 2331f0214a8STinghan Shen if (!priv->adsp) 2341f0214a8STinghan Shen return -ENOMEM; 2351f0214a8STinghan Shen 2361f0214a8STinghan Shen ret = platform_parse_resource(pdev, priv->adsp); 2371f0214a8STinghan Shen if (ret) 2381f0214a8STinghan Shen return ret; 2391f0214a8STinghan Shen 2401f0214a8STinghan Shen sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, 2411f0214a8STinghan Shen priv->adsp->pa_sram, 2421f0214a8STinghan Shen priv->adsp->sramsize); 2431f0214a8STinghan Shen if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) { 2441f0214a8STinghan Shen dev_err(sdev->dev, "failed to ioremap base %pa size %#x\n", 2451f0214a8STinghan Shen &priv->adsp->pa_sram, priv->adsp->sramsize); 2461f0214a8STinghan Shen return -ENOMEM; 2471f0214a8STinghan Shen } 2481f0214a8STinghan Shen 2491f0214a8STinghan Shen sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, 2501f0214a8STinghan Shen priv->adsp->pa_dram, 2511f0214a8STinghan Shen priv->adsp->dramsize); 2521f0214a8STinghan Shen if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) { 2531f0214a8STinghan Shen dev_err(sdev->dev, "failed to ioremap base %pa size %#x\n", 2541f0214a8STinghan Shen &priv->adsp->pa_dram, priv->adsp->dramsize); 2551f0214a8STinghan Shen return -ENOMEM; 2561f0214a8STinghan Shen } 2571f0214a8STinghan Shen 2581f0214a8STinghan Shen priv->adsp->va_dram = sdev->bar[SOF_FW_BLK_TYPE_SRAM]; 2591f0214a8STinghan Shen 2601f0214a8STinghan Shen ret = adsp_shared_base_ioremap(pdev, priv->adsp); 2611f0214a8STinghan Shen if (ret) { 2621f0214a8STinghan Shen dev_err(sdev->dev, "adsp_shared_base_ioremap fail!\n"); 2631f0214a8STinghan Shen return ret; 2641f0214a8STinghan Shen } 2651f0214a8STinghan Shen 2661f0214a8STinghan Shen sdev->bar[DSP_REG_BAR] = priv->adsp->va_cfgreg; 2671f0214a8STinghan Shen sdev->bar[DSP_SECREG_BAR] = priv->adsp->va_secreg; 2681f0214a8STinghan Shen sdev->bar[DSP_BUSREG_BAR] = priv->adsp->va_busreg; 2691f0214a8STinghan Shen 2701f0214a8STinghan Shen sdev->mmio_bar = SOF_FW_BLK_TYPE_SRAM; 2711f0214a8STinghan Shen sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM; 2721f0214a8STinghan Shen 2731f0214a8STinghan Shen ret = adsp_memory_remap_init(sdev, priv->adsp); 2741f0214a8STinghan Shen if (ret) { 2751f0214a8STinghan Shen dev_err(sdev->dev, "adsp_memory_remap_init fail!\n"); 2761f0214a8STinghan Shen return ret; 2771f0214a8STinghan Shen } 2781f0214a8STinghan Shen 2791f0214a8STinghan Shen adsp_sram_power_on(sdev); 2801f0214a8STinghan Shen 2811f0214a8STinghan Shen return 0; 2821f0214a8STinghan Shen } 2831f0214a8STinghan Shen 2841f0214a8STinghan Shen static int mt8186_dsp_remove(struct snd_sof_dev *sdev) 2851f0214a8STinghan Shen { 286*570c14dcSTinghan Shen sof_hifixdsp_shutdown(sdev); 2871f0214a8STinghan Shen adsp_sram_power_off(sdev); 2881f0214a8STinghan Shen 2891f0214a8STinghan Shen return 0; 2901f0214a8STinghan Shen } 2911f0214a8STinghan Shen 2921f0214a8STinghan Shen /* on mt8186 there is 1 to 1 match between type and BAR idx */ 2931f0214a8STinghan Shen static int mt8186_get_bar_index(struct snd_sof_dev *sdev, u32 type) 2941f0214a8STinghan Shen { 2951f0214a8STinghan Shen return type; 2961f0214a8STinghan Shen } 2971f0214a8STinghan Shen 2981f0214a8STinghan Shen /* mt8186 ops */ 2991f0214a8STinghan Shen static struct snd_sof_dsp_ops sof_mt8186_ops = { 3001f0214a8STinghan Shen /* probe and remove */ 3011f0214a8STinghan Shen .probe = mt8186_dsp_probe, 3021f0214a8STinghan Shen .remove = mt8186_dsp_remove, 3031f0214a8STinghan Shen 304*570c14dcSTinghan Shen /* DSP core boot */ 305*570c14dcSTinghan Shen .run = mt8186_run, 306*570c14dcSTinghan Shen 3071f0214a8STinghan Shen /* Block IO */ 3081f0214a8STinghan Shen .block_read = sof_block_read, 3091f0214a8STinghan Shen .block_write = sof_block_write, 3101f0214a8STinghan Shen 3111f0214a8STinghan Shen /* Register IO */ 3121f0214a8STinghan Shen .write = sof_io_write, 3131f0214a8STinghan Shen .read = sof_io_read, 3141f0214a8STinghan Shen .write64 = sof_io_write64, 3151f0214a8STinghan Shen .read64 = sof_io_read64, 3161f0214a8STinghan Shen 3171f0214a8STinghan Shen /* misc */ 3181f0214a8STinghan Shen .get_bar_index = mt8186_get_bar_index, 3191f0214a8STinghan Shen 320*570c14dcSTinghan Shen /* firmware loading */ 321*570c14dcSTinghan Shen .load_firmware = snd_sof_load_firmware_memcpy, 322*570c14dcSTinghan Shen 3231f0214a8STinghan Shen /* Firmware ops */ 3241f0214a8STinghan Shen .dsp_arch_ops = &sof_xtensa_arch_ops, 3251f0214a8STinghan Shen 3261f0214a8STinghan Shen /* ALSA HW info flags */ 3271f0214a8STinghan Shen .hw_info = SNDRV_PCM_INFO_MMAP | 3281f0214a8STinghan Shen SNDRV_PCM_INFO_MMAP_VALID | 3291f0214a8STinghan Shen SNDRV_PCM_INFO_INTERLEAVED | 3301f0214a8STinghan Shen SNDRV_PCM_INFO_PAUSE | 3311f0214a8STinghan Shen SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, 3321f0214a8STinghan Shen }; 3331f0214a8STinghan Shen 3341f0214a8STinghan Shen static const struct sof_dev_desc sof_of_mt8186_desc = { 3351f0214a8STinghan Shen .ipc_supported_mask = BIT(SOF_IPC), 3361f0214a8STinghan Shen .ipc_default = SOF_IPC, 3371f0214a8STinghan Shen .default_fw_path = { 3381f0214a8STinghan Shen [SOF_IPC] = "mediatek/sof", 3391f0214a8STinghan Shen }, 3401f0214a8STinghan Shen .default_tplg_path = { 3411f0214a8STinghan Shen [SOF_IPC] = "mediatek/sof-tplg", 3421f0214a8STinghan Shen }, 3431f0214a8STinghan Shen .default_fw_filename = { 3441f0214a8STinghan Shen [SOF_IPC] = "sof-mt8186.ri", 3451f0214a8STinghan Shen }, 3461f0214a8STinghan Shen .nocodec_tplg_filename = "sof-mt8186-nocodec.tplg", 3471f0214a8STinghan Shen .ops = &sof_mt8186_ops, 3481f0214a8STinghan Shen }; 3491f0214a8STinghan Shen 3501f0214a8STinghan Shen static const struct of_device_id sof_of_mt8186_ids[] = { 3511f0214a8STinghan Shen { .compatible = "mediatek,mt8186-dsp", .data = &sof_of_mt8186_desc}, 3521f0214a8STinghan Shen { } 3531f0214a8STinghan Shen }; 3541f0214a8STinghan Shen MODULE_DEVICE_TABLE(of, sof_of_mt8186_ids); 3551f0214a8STinghan Shen 3561f0214a8STinghan Shen /* DT driver definition */ 3571f0214a8STinghan Shen static struct platform_driver snd_sof_of_mt8186_driver = { 3581f0214a8STinghan Shen .probe = sof_of_probe, 3591f0214a8STinghan Shen .remove = sof_of_remove, 3601f0214a8STinghan Shen .driver = { 3611f0214a8STinghan Shen .name = "sof-audio-of-mt8186", 3621f0214a8STinghan Shen .pm = &sof_of_pm, 3631f0214a8STinghan Shen .of_match_table = sof_of_mt8186_ids, 3641f0214a8STinghan Shen }, 3651f0214a8STinghan Shen }; 3661f0214a8STinghan Shen module_platform_driver(snd_sof_of_mt8186_driver); 3671f0214a8STinghan Shen 3681f0214a8STinghan Shen MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 3691f0214a8STinghan Shen MODULE_IMPORT_NS(SND_SOC_SOF_MTK_COMMON); 3701f0214a8STinghan Shen MODULE_LICENSE("Dual BSD/GPL"); 371