1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 /*
4  * Copyright (c) 2021 MediaTek Corporation. All rights reserved.
5  */
6 
7 #ifndef __MTK_ADSP_HELPER_H__
8 #define __MTK_ADSP_HELPER_H__
9 
10 /*
11  * Global important adsp data structure.
12  */
13 #define DSP_MBOX_NUM	3
14 
15 struct mtk_adsp_chip_info {
16 	phys_addr_t pa_sram;
17 	phys_addr_t pa_dram; /* adsp dram physical base */
18 	phys_addr_t pa_shared_dram; /* adsp dram physical base */
19 	phys_addr_t pa_cfgreg;
20 	phys_addr_t pa_mboxreg[DSP_MBOX_NUM];
21 	u32 sramsize;
22 	u32 dramsize;
23 	u32 cfgregsize;
24 	void __iomem *va_sram; /* corresponding to pa_sram */
25 	void __iomem *va_dram; /* corresponding to pa_dram */
26 	void __iomem *va_cfgreg;
27 	void __iomem *va_mboxreg[DSP_MBOX_NUM];
28 	void __iomem *shared_sram; /* part of  va_sram */
29 	void __iomem *shared_dram; /* part of  va_dram */
30 	phys_addr_t adsp_bootup_addr;
31 	int dram_offset; /*dram offset between system and dsp view*/
32 };
33 
34 struct adsp_priv {
35 	struct device *dev;
36 	struct snd_sof_dev *sdev;
37 
38 	/* DSP IPC handler */
39 	struct mbox_controller *adsp_mbox;
40 
41 	struct mtk_adsp_chip_info *adsp;
42 	struct clk **clk;
43 	u32 (*ap2adsp_addr)(u32 addr, void *data);
44 	u32 (*adsp2ap_addr)(u32 addr, void *data);
45 
46 	void *private_data;
47 };
48 
49 #endif
50