1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2022 Intel Corporation. All rights reserved. 7 // 8 // Authors: Rander Wang <rander.wang@linux.intel.com> 9 // Peter Ujfalusi <peter.ujfalusi@linux.intel.com> 10 // 11 #include <linux/firmware.h> 12 #include <sound/sof/header.h> 13 #include <sound/sof/ipc4/header.h> 14 #include "sof-priv.h" 15 #include "sof-audio.h" 16 #include "ipc4-priv.h" 17 #include "ops.h" 18 19 #ifdef DEBUG_VERBOSE 20 #define sof_ipc4_dump_payload(sdev, ipc_data, size) \ 21 print_hex_dump_debug("Message payload: ", \ 22 DUMP_PREFIX_OFFSET, \ 23 16, 4, ipc_data, size, false) 24 #else 25 #define sof_ipc4_dump_payload(sdev, ipc_data, size) do { } while (0) 26 #endif 27 28 static const struct sof_ipc4_fw_status { 29 int status; 30 char *msg; 31 } ipc4_status[] = { 32 {0, "The operation was successful"}, 33 {1, "Invalid parameter specified"}, 34 {2, "Unknown message type specified"}, 35 {3, "Not enough space in the IPC reply buffer to complete the request"}, 36 {4, "The system or resource is busy"}, 37 {5, "Replaced ADSP IPC PENDING (unused)"}, 38 {6, "Unknown error while processing the request"}, 39 {7, "Unsupported operation requested"}, 40 {8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"}, 41 {9, "Specified resource not found"}, 42 {10, "A resource's ID requested to be created is already assigned"}, 43 {11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"}, 44 {12, "Required resource is in invalid state"}, 45 {13, "Requested power transition failed to complete"}, 46 {14, "Manifest of the library being loaded is invalid"}, 47 {15, "Requested service or data is unavailable on the target platform"}, 48 {42, "Library target address is out of storage memory range"}, 49 {43, "Reserved"}, 50 {44, "Image verification by CSE failed"}, 51 {100, "General module management error"}, 52 {101, "Module loading failed"}, 53 {102, "Integrity check of the loaded module content failed"}, 54 {103, "Attempt to unload code of the module in use"}, 55 {104, "Other failure of module instance initialization request"}, 56 {105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"}, 57 {106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"}, 58 {107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"}, 59 {108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"}, 60 {109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"}, 61 {110, "Invalid (out of range) module ID provided"}, 62 {111, "Invalid module instance ID provided"}, 63 {112, "Invalid queue (pin) ID provided"}, 64 {113, "Invalid destination queue (pin) ID provided"}, 65 {114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"}, 66 {115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"}, 67 {116, "Invalid target code ID provided"}, 68 {117, "Injection DMA buffer is too small for probing the input pin"}, 69 {118, "Extraction DMA buffer is too small for probing the output pin"}, 70 {120, "Invalid ID of configuration item provided in TLV list"}, 71 {121, "Invalid length of configuration item provided in TLV list"}, 72 {122, "Invalid structure of configuration item provided"}, 73 {140, "Initialization of DMA Gateway failed"}, 74 {141, "Invalid ID of gateway provided"}, 75 {142, "Setting state of DMA Gateway failed"}, 76 {143, "DMA_CONTROL message targeting gateway not allocated yet"}, 77 {150, "Attempt to configure SCLK while I2S port is running"}, 78 {151, "Attempt to configure MCLK while I2S port is running"}, 79 {152, "Attempt to stop SCLK that is not running"}, 80 {153, "Attempt to stop MCLK that is not running"}, 81 {160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"}, 82 {161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"}, 83 {162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"}, 84 {163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"}, 85 {165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"}, 86 }; 87 88 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status) 89 { 90 int i, ret; 91 92 status &= SOF_IPC4_REPLY_STATUS; 93 94 if (!status) 95 return 0; 96 97 for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) { 98 if (ipc4_status[i].status == status) { 99 dev_err(sdev->dev, "FW reported error: %u - %s\n", 100 status, ipc4_status[i].msg); 101 goto to_errno; 102 } 103 } 104 105 if (i == ARRAY_SIZE(ipc4_status)) 106 dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status); 107 108 to_errno: 109 switch (status) { 110 case 8: 111 case 11: 112 case 105 ... 109: 113 case 114 ... 115: 114 case 160 ... 163: 115 case 165: 116 ret = -ENOENT; 117 break; 118 case 4: 119 case 150: 120 case 151: 121 ret = -EBUSY; 122 break; 123 default: 124 ret = -EINVAL; 125 break; 126 } 127 128 return ret; 129 } 130 131 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 132 #define DBG_IPC4_MSG_TYPE_ENTRY(type) [SOF_IPC4_##type] = #type 133 static const char * const ipc4_dbg_mod_msg_type[] = { 134 DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE), 135 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET), 136 DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET), 137 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET), 138 DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET), 139 DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND), 140 DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND), 141 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX), 142 DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX), 143 DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE), 144 DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE), 145 DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE), 146 }; 147 148 static const char * const ipc4_dbg_glb_msg_type[] = { 149 DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG), 150 DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL), 151 DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD), 152 DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD), 153 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA), 154 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES), 155 DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES), 156 DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE), 157 DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE), 158 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE), 159 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE), 160 DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE), 161 DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE), 162 DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE), 163 DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY), 164 DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE), 165 DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION), 166 }; 167 168 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type) [SOF_IPC4_NOTIFY_##type] = #type 169 static const char * const ipc4_dbg_notification_type[] = { 170 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED), 171 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT), 172 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS), 173 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED), 174 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY), 175 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT), 176 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT), 177 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION), 178 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE), 179 DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE), 180 }; 181 182 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg, 183 bool data_size_valid) 184 { 185 u32 val, type; 186 const u8 *str2 = NULL; 187 const u8 *str = NULL; 188 189 val = msg->primary & SOF_IPC4_MSG_TARGET_MASK; 190 type = SOF_IPC4_MSG_TYPE_GET(msg->primary); 191 192 if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) { 193 /* Module message */ 194 if (type < SOF_IPC4_MOD_TYPE_LAST) 195 str = ipc4_dbg_mod_msg_type[type]; 196 if (!str) 197 str = "Unknown Module message type"; 198 } else { 199 /* Global FW message */ 200 if (type < SOF_IPC4_GLB_TYPE_LAST) 201 str = ipc4_dbg_glb_msg_type[type]; 202 if (!str) 203 str = "Unknown Global message type"; 204 205 if (type == SOF_IPC4_GLB_NOTIFICATION) { 206 /* Notification message */ 207 u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary); 208 209 /* Do not print log buffer notification if not desired */ 210 if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS && 211 !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS)) 212 return; 213 214 if (notif < SOF_IPC4_NOTIFY_TYPE_LAST) 215 str2 = ipc4_dbg_notification_type[notif]; 216 if (!str2) 217 str2 = "Unknown Global notification"; 218 } 219 } 220 221 if (str2) { 222 if (data_size_valid && msg->data_size) 223 dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n", 224 text, msg->primary, msg->extension, str, str2, 225 msg->data_size); 226 else 227 dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary, 228 msg->extension, str, str2); 229 } else { 230 if (data_size_valid && msg->data_size) 231 dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n", 232 text, msg->primary, msg->extension, str, 233 msg->data_size); 234 else 235 dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary, 236 msg->extension, str); 237 } 238 } 239 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */ 240 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg, 241 bool data_size_valid) 242 { 243 /* Do not print log buffer notification if not desired */ 244 if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) && 245 !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) && 246 SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION && 247 SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS) 248 return; 249 250 if (data_size_valid && msg->data_size) 251 dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text, 252 msg->primary, msg->extension, msg->data_size); 253 else 254 dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension); 255 } 256 #endif 257 258 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev) 259 { 260 struct snd_sof_ipc_msg *msg = sdev->msg; 261 struct sof_ipc4_msg *ipc4_reply; 262 int ret; 263 264 /* get the generic reply */ 265 ipc4_reply = msg->reply_data; 266 267 sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false); 268 269 ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary); 270 if (ret) 271 return ret; 272 273 /* No other information is expected for non large config get replies */ 274 if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) || 275 (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET)) 276 return 0; 277 278 /* Read the requested payload */ 279 snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr, 280 msg->reply_size); 281 282 return 0; 283 } 284 285 /* wait for IPC message reply */ 286 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data) 287 { 288 struct snd_sof_ipc_msg *msg = &ipc->msg; 289 struct sof_ipc4_msg *ipc4_msg = msg->msg_data; 290 struct snd_sof_dev *sdev = ipc->sdev; 291 int ret; 292 293 /* wait for DSP IPC completion */ 294 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 295 msecs_to_jiffies(sdev->ipc_timeout)); 296 if (ret == 0) { 297 dev_err(sdev->dev, "ipc timed out for %#x|%#x\n", 298 ipc4_msg->primary, ipc4_msg->extension); 299 snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout"); 300 return -ETIMEDOUT; 301 } 302 303 if (msg->reply_error) { 304 dev_err(sdev->dev, "ipc error for msg %#x|%#x\n", 305 ipc4_msg->primary, ipc4_msg->extension); 306 ret = msg->reply_error; 307 } else { 308 if (reply_data) { 309 struct sof_ipc4_msg *ipc4_reply = msg->reply_data; 310 struct sof_ipc4_msg *ipc4_reply_data = reply_data; 311 312 /* Copy the header */ 313 ipc4_reply_data->header_u64 = ipc4_reply->header_u64; 314 if (msg->reply_size && ipc4_reply_data->data_ptr) { 315 /* copy the payload returned from DSP */ 316 memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr, 317 msg->reply_size); 318 ipc4_reply_data->data_size = msg->reply_size; 319 } 320 } 321 322 ret = 0; 323 sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true); 324 } 325 326 /* re-enable dumps after successful IPC tx */ 327 if (sdev->ipc_dump_printed) { 328 sdev->dbg_dump_printed = false; 329 sdev->ipc_dump_printed = false; 330 } 331 332 return ret; 333 } 334 335 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc, 336 void *msg_data, size_t msg_bytes, 337 void *reply_data, size_t reply_bytes) 338 { 339 struct sof_ipc4_msg *ipc4_msg = msg_data; 340 struct snd_sof_dev *sdev = ipc->sdev; 341 int ret; 342 343 if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size) 344 return -EINVAL; 345 346 sof_ipc4_log_header(sdev->dev, "ipc tx ", msg_data, true); 347 348 ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes); 349 if (ret) { 350 dev_err_ratelimited(sdev->dev, 351 "%s: ipc message send for %#x|%#x failed: %d\n", 352 __func__, ipc4_msg->primary, ipc4_msg->extension, ret); 353 return ret; 354 } 355 356 /* now wait for completion */ 357 return ipc4_wait_tx_done(ipc, reply_data); 358 } 359 360 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes, 361 void *reply_data, size_t reply_bytes, bool no_pm) 362 { 363 struct snd_sof_ipc *ipc = sdev->ipc; 364 #ifdef DEBUG_VERBOSE 365 struct sof_ipc4_msg *msg = NULL; 366 #endif 367 int ret; 368 369 if (!msg_data) 370 return -EINVAL; 371 372 /* Serialise IPC TX */ 373 mutex_lock(&ipc->tx_mutex); 374 375 ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes); 376 377 mutex_unlock(&ipc->tx_mutex); 378 379 #ifdef DEBUG_VERBOSE 380 /* payload is indicated by non zero msg/reply_bytes */ 381 if (msg_bytes) 382 msg = msg_data; 383 else if (reply_bytes) 384 msg = reply_data; 385 386 if (msg) 387 sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size); 388 #endif 389 390 return ret; 391 } 392 393 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data, 394 size_t payload_bytes, bool set) 395 { 396 size_t payload_limit = sdev->ipc->max_payload_size; 397 struct sof_ipc4_msg *ipc4_msg = data; 398 struct sof_ipc4_msg tx = {{ 0 }}; 399 struct sof_ipc4_msg rx = {{ 0 }}; 400 size_t remaining = payload_bytes; 401 size_t offset = 0; 402 size_t chunk_size; 403 int ret; 404 405 if (!data) 406 return -EINVAL; 407 408 if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) != 409 SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) 410 return -EINVAL; 411 412 ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK; 413 tx.primary = ipc4_msg->primary; 414 tx.extension = ipc4_msg->extension; 415 416 if (set) 417 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET); 418 else 419 tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET); 420 421 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 422 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes); 423 424 tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1); 425 426 /* Serialise IPC TX */ 427 mutex_lock(&sdev->ipc->tx_mutex); 428 429 do { 430 size_t tx_size, rx_size; 431 432 if (remaining > payload_limit) { 433 chunk_size = payload_limit; 434 } else { 435 chunk_size = remaining; 436 if (set) 437 tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1); 438 } 439 440 if (offset) { 441 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK; 442 tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 443 tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset); 444 } 445 446 if (set) { 447 tx.data_size = chunk_size; 448 tx.data_ptr = ipc4_msg->data_ptr + offset; 449 450 tx_size = chunk_size; 451 rx_size = 0; 452 } else { 453 rx.primary = 0; 454 rx.extension = 0; 455 rx.data_size = chunk_size; 456 rx.data_ptr = ipc4_msg->data_ptr + offset; 457 458 tx_size = 0; 459 rx_size = chunk_size; 460 } 461 462 /* Send the message for the current chunk */ 463 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size); 464 if (ret < 0) { 465 dev_err(sdev->dev, 466 "%s: large config %s failed at offset %zu: %d\n", 467 __func__, set ? "set" : "get", offset, ret); 468 goto out; 469 } 470 471 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) { 472 /* Verify the firmware reported total payload size */ 473 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; 474 475 if (rx_size > payload_bytes) { 476 dev_err(sdev->dev, 477 "%s: Receive buffer (%zu) is too small for %zu\n", 478 __func__, payload_bytes, rx_size); 479 ret = -ENOMEM; 480 goto out; 481 } 482 483 if (rx_size < chunk_size) { 484 chunk_size = rx_size; 485 remaining = rx_size; 486 } else if (rx_size < payload_bytes) { 487 remaining = rx_size; 488 } 489 } 490 491 offset += chunk_size; 492 remaining -= chunk_size; 493 } while (remaining); 494 495 /* Adjust the received data size if needed */ 496 if (!set && payload_bytes != offset) 497 ipc4_msg->data_size = offset; 498 499 sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size); 500 501 out: 502 mutex_unlock(&sdev->ipc->tx_mutex); 503 504 return ret; 505 } 506 507 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev) 508 { 509 struct sof_ipc4_msg *ipc4_msg; 510 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 511 512 /* TODO: get max_payload_size from firmware */ 513 sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE; 514 515 /* Allocate memory for the ipc4 container and the maximum payload */ 516 msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size + 517 sizeof(struct sof_ipc4_msg), GFP_KERNEL); 518 if (!msg->reply_data) 519 return -ENOMEM; 520 521 ipc4_msg = msg->reply_data; 522 ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg); 523 524 return 0; 525 } 526 527 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg) 528 { 529 int inbox_offset, inbox_size, outbox_offset, outbox_size; 530 531 /* no need to re-check version/ABI for subsequent boots */ 532 if (!sdev->first_boot) 533 return 0; 534 535 /* Set up the windows for IPC communication */ 536 inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev); 537 if (inbox_offset < 0) { 538 dev_err(sdev->dev, "%s: No mailbox offset\n", __func__); 539 return inbox_offset; 540 } 541 inbox_size = SOF_IPC4_MSG_MAX_SIZE; 542 outbox_offset = snd_sof_dsp_get_window_offset(sdev, SOF_IPC4_OUTBOX_WINDOW_IDX); 543 outbox_size = SOF_IPC4_MSG_MAX_SIZE; 544 545 sdev->dsp_box.offset = inbox_offset; 546 sdev->dsp_box.size = inbox_size; 547 sdev->host_box.offset = outbox_offset; 548 sdev->host_box.size = outbox_size; 549 550 sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev, 551 SOF_IPC4_DEBUG_WINDOW_IDX); 552 553 dev_dbg(sdev->dev, "mailbox upstream 0x%x - size 0x%x\n", 554 inbox_offset, inbox_size); 555 dev_dbg(sdev->dev, "mailbox downstream 0x%x - size 0x%x\n", 556 outbox_offset, outbox_size); 557 dev_dbg(sdev->dev, "debug box 0x%x\n", sdev->debug_box.offset); 558 559 return sof_ipc4_init_msg_memory(sdev); 560 } 561 562 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev) 563 { 564 struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data; 565 size_t data_size = 0; 566 int err; 567 568 if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary)) 569 return; 570 571 ipc4_msg->data_ptr = NULL; 572 ipc4_msg->data_size = 0; 573 574 sof_ipc4_log_header(sdev->dev, "ipc rx ", ipc4_msg, false); 575 576 switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) { 577 case SOF_IPC4_NOTIFY_FW_READY: 578 /* check for FW boot completion */ 579 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) { 580 err = ipc4_fw_ready(sdev, ipc4_msg); 581 if (err < 0) 582 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED); 583 else 584 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK); 585 586 /* wake up firmware loader */ 587 wake_up(&sdev->boot_wait); 588 } 589 590 break; 591 case SOF_IPC4_NOTIFY_RESOURCE_EVENT: 592 data_size = sizeof(struct sof_ipc4_notify_resource_data); 593 break; 594 case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS: 595 sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary)); 596 break; 597 default: 598 dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n", 599 ipc4_msg->primary, ipc4_msg->extension); 600 break; 601 } 602 603 if (data_size) { 604 ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL); 605 if (!ipc4_msg->data_ptr) 606 return; 607 608 ipc4_msg->data_size = data_size; 609 snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size); 610 } 611 612 sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true); 613 614 if (data_size) { 615 kfree(ipc4_msg->data_ptr); 616 ipc4_msg->data_ptr = NULL; 617 ipc4_msg->data_size = 0; 618 } 619 } 620 621 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on) 622 { 623 struct sof_ipc4_dx_state_info dx_state; 624 struct sof_ipc4_msg msg; 625 626 dx_state.core_mask = BIT(core_idx); 627 if (on) 628 dx_state.dx_mask = BIT(core_idx); 629 else 630 dx_state.dx_mask = 0; 631 632 msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX); 633 msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST); 634 msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG); 635 msg.extension = 0; 636 msg.data_ptr = &dx_state; 637 msg.data_size = sizeof(dx_state); 638 639 return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false); 640 } 641 642 /* 643 * The context save callback is used to send a message to the firmware notifying 644 * it that the primary core is going to be turned off, which is used as an 645 * indication to prepare for a full power down, thus preparing for IMR boot 646 * (when supported) 647 * 648 * Note: in IPC4 there is no message used to restore context, thus no context 649 * restore callback is implemented 650 */ 651 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev) 652 { 653 return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false); 654 } 655 656 static const struct sof_ipc_pm_ops ipc4_pm_ops = { 657 .ctx_save = sof_ipc4_ctx_save, 658 .set_core_state = sof_ipc4_set_core_state, 659 }; 660 661 static int sof_ipc4_init(struct snd_sof_dev *sdev) 662 { 663 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 664 665 xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC); 666 667 return 0; 668 } 669 670 static void sof_ipc4_exit(struct snd_sof_dev *sdev) 671 { 672 struct sof_ipc4_fw_data *ipc4_data = sdev->private; 673 struct sof_ipc4_fw_library *fw_lib; 674 unsigned long lib_id; 675 676 xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) { 677 /* 678 * The basefw (ID == 0) is handled by generic code, it is not 679 * loaded by IPC4 code. 680 */ 681 if (lib_id != 0) 682 release_firmware(fw_lib->sof_fw.fw); 683 684 fw_lib->sof_fw.fw = NULL; 685 } 686 687 xa_destroy(&ipc4_data->fw_lib_xa); 688 } 689 690 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev) 691 { 692 if (sdev->first_boot) 693 return sof_ipc4_query_fw_configuration(sdev); 694 695 return sof_ipc4_reload_fw_libraries(sdev); 696 } 697 698 const struct sof_ipc_ops ipc4_ops = { 699 .init = sof_ipc4_init, 700 .exit = sof_ipc4_exit, 701 .post_fw_boot = sof_ipc4_post_boot, 702 .tx_msg = sof_ipc4_tx_msg, 703 .rx_msg = sof_ipc4_rx_msg, 704 .set_get_data = sof_ipc4_set_get_data, 705 .get_reply = sof_ipc4_get_reply, 706 .pm = &ipc4_pm_ops, 707 .fw_loader = &ipc4_loader_ops, 708 .tplg = &ipc4_tplg_ops, 709 .pcm = &ipc4_pcm_ops, 710 .fw_tracing = &ipc4_mtrace_ops, 711 }; 712