1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // 10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided 11 // by platform driver code. 12 // 13 14 #include <linux/mutex.h> 15 #include <linux/types.h> 16 17 #include "sof-priv.h" 18 #include "sof-audio.h" 19 #include "ops.h" 20 21 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id); 22 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd); 23 24 /* 25 * IPC message Tx/Rx message handling. 26 */ 27 28 /* SOF generic IPC data */ 29 struct snd_sof_ipc { 30 struct snd_sof_dev *sdev; 31 32 /* protects messages and the disable flag */ 33 struct mutex tx_mutex; 34 /* disables further sending of ipc's */ 35 bool disable_ipc_tx; 36 37 struct snd_sof_ipc_msg msg; 38 }; 39 40 struct sof_ipc_ctrl_data_params { 41 size_t msg_bytes; 42 size_t hdr_bytes; 43 size_t pl_size; 44 size_t elems; 45 u32 num_msg; 46 u8 *src; 47 u8 *dst; 48 }; 49 50 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 51 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 52 { 53 u8 *str; 54 u8 *str2 = NULL; 55 u32 glb; 56 u32 type; 57 58 glb = cmd & SOF_GLB_TYPE_MASK; 59 type = cmd & SOF_CMD_TYPE_MASK; 60 61 switch (glb) { 62 case SOF_IPC_GLB_REPLY: 63 str = "GLB_REPLY"; break; 64 case SOF_IPC_GLB_COMPOUND: 65 str = "GLB_COMPOUND"; break; 66 case SOF_IPC_GLB_TPLG_MSG: 67 str = "GLB_TPLG_MSG"; 68 switch (type) { 69 case SOF_IPC_TPLG_COMP_NEW: 70 str2 = "COMP_NEW"; break; 71 case SOF_IPC_TPLG_COMP_FREE: 72 str2 = "COMP_FREE"; break; 73 case SOF_IPC_TPLG_COMP_CONNECT: 74 str2 = "COMP_CONNECT"; break; 75 case SOF_IPC_TPLG_PIPE_NEW: 76 str2 = "PIPE_NEW"; break; 77 case SOF_IPC_TPLG_PIPE_FREE: 78 str2 = "PIPE_FREE"; break; 79 case SOF_IPC_TPLG_PIPE_CONNECT: 80 str2 = "PIPE_CONNECT"; break; 81 case SOF_IPC_TPLG_PIPE_COMPLETE: 82 str2 = "PIPE_COMPLETE"; break; 83 case SOF_IPC_TPLG_BUFFER_NEW: 84 str2 = "BUFFER_NEW"; break; 85 case SOF_IPC_TPLG_BUFFER_FREE: 86 str2 = "BUFFER_FREE"; break; 87 default: 88 str2 = "unknown type"; break; 89 } 90 break; 91 case SOF_IPC_GLB_PM_MSG: 92 str = "GLB_PM_MSG"; 93 switch (type) { 94 case SOF_IPC_PM_CTX_SAVE: 95 str2 = "CTX_SAVE"; break; 96 case SOF_IPC_PM_CTX_RESTORE: 97 str2 = "CTX_RESTORE"; break; 98 case SOF_IPC_PM_CTX_SIZE: 99 str2 = "CTX_SIZE"; break; 100 case SOF_IPC_PM_CLK_SET: 101 str2 = "CLK_SET"; break; 102 case SOF_IPC_PM_CLK_GET: 103 str2 = "CLK_GET"; break; 104 case SOF_IPC_PM_CLK_REQ: 105 str2 = "CLK_REQ"; break; 106 case SOF_IPC_PM_CORE_ENABLE: 107 str2 = "CORE_ENABLE"; break; 108 default: 109 str2 = "unknown type"; break; 110 } 111 break; 112 case SOF_IPC_GLB_COMP_MSG: 113 str = "GLB_COMP_MSG"; 114 switch (type) { 115 case SOF_IPC_COMP_SET_VALUE: 116 str2 = "SET_VALUE"; break; 117 case SOF_IPC_COMP_GET_VALUE: 118 str2 = "GET_VALUE"; break; 119 case SOF_IPC_COMP_SET_DATA: 120 str2 = "SET_DATA"; break; 121 case SOF_IPC_COMP_GET_DATA: 122 str2 = "GET_DATA"; break; 123 default: 124 str2 = "unknown type"; break; 125 } 126 break; 127 case SOF_IPC_GLB_STREAM_MSG: 128 str = "GLB_STREAM_MSG"; 129 switch (type) { 130 case SOF_IPC_STREAM_PCM_PARAMS: 131 str2 = "PCM_PARAMS"; break; 132 case SOF_IPC_STREAM_PCM_PARAMS_REPLY: 133 str2 = "PCM_REPLY"; break; 134 case SOF_IPC_STREAM_PCM_FREE: 135 str2 = "PCM_FREE"; break; 136 case SOF_IPC_STREAM_TRIG_START: 137 str2 = "TRIG_START"; break; 138 case SOF_IPC_STREAM_TRIG_STOP: 139 str2 = "TRIG_STOP"; break; 140 case SOF_IPC_STREAM_TRIG_PAUSE: 141 str2 = "TRIG_PAUSE"; break; 142 case SOF_IPC_STREAM_TRIG_RELEASE: 143 str2 = "TRIG_RELEASE"; break; 144 case SOF_IPC_STREAM_TRIG_DRAIN: 145 str2 = "TRIG_DRAIN"; break; 146 case SOF_IPC_STREAM_TRIG_XRUN: 147 str2 = "TRIG_XRUN"; break; 148 case SOF_IPC_STREAM_POSITION: 149 str2 = "POSITION"; break; 150 case SOF_IPC_STREAM_VORBIS_PARAMS: 151 str2 = "VORBIS_PARAMS"; break; 152 case SOF_IPC_STREAM_VORBIS_FREE: 153 str2 = "VORBIS_FREE"; break; 154 default: 155 str2 = "unknown type"; break; 156 } 157 break; 158 case SOF_IPC_FW_READY: 159 str = "FW_READY"; break; 160 case SOF_IPC_GLB_DAI_MSG: 161 str = "GLB_DAI_MSG"; 162 switch (type) { 163 case SOF_IPC_DAI_CONFIG: 164 str2 = "CONFIG"; break; 165 case SOF_IPC_DAI_LOOPBACK: 166 str2 = "LOOPBACK"; break; 167 default: 168 str2 = "unknown type"; break; 169 } 170 break; 171 case SOF_IPC_GLB_TRACE_MSG: 172 str = "GLB_TRACE_MSG"; break; 173 case SOF_IPC_GLB_TEST_MSG: 174 str = "GLB_TEST_MSG"; 175 switch (type) { 176 case SOF_IPC_TEST_IPC_FLOOD: 177 str2 = "IPC_FLOOD"; break; 178 default: 179 str2 = "unknown type"; break; 180 } 181 break; 182 default: 183 str = "unknown GLB command"; break; 184 } 185 186 if (str2) 187 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 188 else 189 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str); 190 } 191 #else 192 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 193 { 194 if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG) 195 dev_dbg(dev, "%s: 0x%x\n", text, cmd); 196 } 197 #endif 198 199 /* wait for IPC message reply */ 200 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg, 201 void *reply_data) 202 { 203 struct snd_sof_dev *sdev = ipc->sdev; 204 struct sof_ipc_cmd_hdr *hdr = msg->msg_data; 205 int ret; 206 207 /* wait for DSP IPC completion */ 208 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 209 msecs_to_jiffies(sdev->ipc_timeout)); 210 211 if (ret == 0) { 212 dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n", 213 hdr->cmd, hdr->size); 214 snd_sof_handle_fw_exception(ipc->sdev); 215 ret = -ETIMEDOUT; 216 } else { 217 /* copy the data returned from DSP */ 218 ret = msg->reply_error; 219 if (msg->reply_size) 220 memcpy(reply_data, msg->reply_data, msg->reply_size); 221 if (ret < 0) 222 dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n", 223 hdr->cmd, msg->reply_size); 224 else 225 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd); 226 } 227 228 return ret; 229 } 230 231 /* send IPC message from host to DSP */ 232 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header, 233 void *msg_data, size_t msg_bytes, 234 void *reply_data, size_t reply_bytes) 235 { 236 struct snd_sof_dev *sdev = ipc->sdev; 237 struct snd_sof_ipc_msg *msg; 238 int ret; 239 240 if (ipc->disable_ipc_tx) 241 return -ENODEV; 242 243 /* 244 * The spin-lock is also still needed to protect message objects against 245 * other atomic contexts. 246 */ 247 spin_lock_irq(&sdev->ipc_lock); 248 249 /* initialise the message */ 250 msg = &ipc->msg; 251 252 msg->header = header; 253 msg->msg_size = msg_bytes; 254 msg->reply_size = reply_bytes; 255 msg->reply_error = 0; 256 257 /* attach any data */ 258 if (msg_bytes) 259 memcpy(msg->msg_data, msg_data, msg_bytes); 260 261 sdev->msg = msg; 262 263 ret = snd_sof_dsp_send_msg(sdev, msg); 264 /* Next reply that we receive will be related to this message */ 265 if (!ret) 266 msg->ipc_complete = false; 267 268 spin_unlock_irq(&sdev->ipc_lock); 269 270 if (ret < 0) { 271 /* So far IPC TX never fails, consider making the above void */ 272 dev_err_ratelimited(sdev->dev, 273 "error: ipc tx failed with error %d\n", 274 ret); 275 return ret; 276 } 277 278 ipc_log_header(sdev->dev, "ipc tx", msg->header); 279 280 /* now wait for completion */ 281 if (!ret) 282 ret = tx_wait_done(ipc, msg, reply_data); 283 284 return ret; 285 } 286 287 /* send IPC message from host to DSP */ 288 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 289 void *msg_data, size_t msg_bytes, void *reply_data, 290 size_t reply_bytes) 291 { 292 int ret; 293 294 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE || 295 reply_bytes > SOF_IPC_MSG_MAX_SIZE) 296 return -ENOBUFS; 297 298 /* Serialise IPC TX */ 299 mutex_lock(&ipc->tx_mutex); 300 301 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes, 302 reply_data, reply_bytes); 303 304 mutex_unlock(&ipc->tx_mutex); 305 306 return ret; 307 } 308 EXPORT_SYMBOL(sof_ipc_tx_message); 309 310 /* handle reply message from DSP */ 311 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id) 312 { 313 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 314 315 if (msg->ipc_complete) { 316 dev_err(sdev->dev, "error: no reply expected, received 0x%x", 317 msg_id); 318 return -EINVAL; 319 } 320 321 /* wake up and return the error if we have waiters on this message ? */ 322 msg->ipc_complete = true; 323 wake_up(&msg->waitq); 324 325 return 0; 326 } 327 EXPORT_SYMBOL(snd_sof_ipc_reply); 328 329 /* DSP firmware has sent host a message */ 330 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 331 { 332 struct sof_ipc_cmd_hdr hdr; 333 u32 cmd, type; 334 int err = 0; 335 336 /* read back header */ 337 snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); 338 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd); 339 340 cmd = hdr.cmd & SOF_GLB_TYPE_MASK; 341 type = hdr.cmd & SOF_CMD_TYPE_MASK; 342 343 /* check message type */ 344 switch (cmd) { 345 case SOF_IPC_GLB_REPLY: 346 dev_err(sdev->dev, "error: ipc reply unknown\n"); 347 break; 348 case SOF_IPC_FW_READY: 349 /* check for FW boot completion */ 350 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) { 351 err = sof_ops(sdev)->fw_ready(sdev, cmd); 352 if (err < 0) 353 sdev->fw_state = SOF_FW_BOOT_READY_FAILED; 354 else 355 sdev->fw_state = SOF_FW_BOOT_COMPLETE; 356 357 /* wake up firmware loader */ 358 wake_up(&sdev->boot_wait); 359 } 360 break; 361 case SOF_IPC_GLB_COMPOUND: 362 case SOF_IPC_GLB_TPLG_MSG: 363 case SOF_IPC_GLB_PM_MSG: 364 case SOF_IPC_GLB_COMP_MSG: 365 break; 366 case SOF_IPC_GLB_STREAM_MSG: 367 /* need to pass msg id into the function */ 368 ipc_stream_message(sdev, hdr.cmd); 369 break; 370 case SOF_IPC_GLB_TRACE_MSG: 371 ipc_trace_message(sdev, type); 372 break; 373 default: 374 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd); 375 break; 376 } 377 378 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd); 379 } 380 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx); 381 382 /* 383 * IPC trace mechanism. 384 */ 385 386 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id) 387 { 388 struct sof_ipc_dma_trace_posn posn; 389 390 switch (msg_id) { 391 case SOF_IPC_TRACE_DMA_POSITION: 392 /* read back full message */ 393 snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn)); 394 snd_sof_trace_update_pos(sdev, &posn); 395 break; 396 default: 397 dev_err(sdev->dev, "error: unhandled trace message %x\n", 398 msg_id); 399 break; 400 } 401 } 402 403 /* 404 * IPC stream position. 405 */ 406 407 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id) 408 { 409 struct snd_soc_component *scomp = sdev->component; 410 struct snd_sof_pcm_stream *stream; 411 struct sof_ipc_stream_posn posn; 412 struct snd_sof_pcm *spcm; 413 int direction; 414 415 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 416 if (!spcm) { 417 dev_err(sdev->dev, 418 "error: period elapsed for unknown stream, msg_id %d\n", 419 msg_id); 420 return; 421 } 422 423 stream = &spcm->stream[direction]; 424 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 425 426 dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n", 427 posn.host_posn, posn.dai_posn, posn.wallclock); 428 429 memcpy(&stream->posn, &posn, sizeof(posn)); 430 431 /* only inform ALSA for period_wakeup mode */ 432 if (!stream->substream->runtime->no_period_wakeup) 433 snd_sof_pcm_period_elapsed(stream->substream); 434 } 435 436 /* DSP notifies host of an XRUN within FW */ 437 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id) 438 { 439 struct snd_soc_component *scomp = sdev->component; 440 struct snd_sof_pcm_stream *stream; 441 struct sof_ipc_stream_posn posn; 442 struct snd_sof_pcm *spcm; 443 int direction; 444 445 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 446 if (!spcm) { 447 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n", 448 msg_id); 449 return; 450 } 451 452 stream = &spcm->stream[direction]; 453 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 454 455 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n", 456 posn.host_posn, posn.xrun_comp_id, posn.xrun_size); 457 458 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP) 459 /* stop PCM on XRUN - used for pipeline debug */ 460 memcpy(&stream->posn, &posn, sizeof(posn)); 461 snd_pcm_stop_xrun(stream->substream); 462 #endif 463 } 464 465 /* stream notifications from DSP FW */ 466 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd) 467 { 468 /* get msg cmd type and msd id */ 469 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK; 470 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd); 471 472 switch (msg_type) { 473 case SOF_IPC_STREAM_POSITION: 474 ipc_period_elapsed(sdev, msg_id); 475 break; 476 case SOF_IPC_STREAM_TRIG_XRUN: 477 ipc_xrun(sdev, msg_id); 478 break; 479 default: 480 dev_err(sdev->dev, "error: unhandled stream message %x\n", 481 msg_id); 482 break; 483 } 484 } 485 486 /* get stream position IPC - use faster MMIO method if available on platform */ 487 int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp, 488 struct snd_sof_pcm *spcm, int direction, 489 struct sof_ipc_stream_posn *posn) 490 { 491 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 492 struct sof_ipc_stream stream; 493 int err; 494 495 /* read position via slower IPC */ 496 stream.hdr.size = sizeof(stream); 497 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION; 498 stream.comp_id = spcm->stream[direction].comp_id; 499 500 /* send IPC to the DSP */ 501 err = sof_ipc_tx_message(sdev->ipc, 502 stream.hdr.cmd, &stream, sizeof(stream), &posn, 503 sizeof(*posn)); 504 if (err < 0) { 505 dev_err(sdev->dev, "error: failed to get stream %d position\n", 506 stream.comp_id); 507 return err; 508 } 509 510 return 0; 511 } 512 EXPORT_SYMBOL(snd_sof_ipc_stream_posn); 513 514 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type, 515 struct sof_ipc_ctrl_data *src, 516 struct sof_ipc_ctrl_data *dst, 517 struct sof_ipc_ctrl_data_params *sparams) 518 { 519 switch (ctrl_type) { 520 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 521 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 522 sparams->src = (u8 *)src->chanv; 523 sparams->dst = (u8 *)dst->chanv; 524 break; 525 case SOF_CTRL_TYPE_VALUE_COMP_GET: 526 case SOF_CTRL_TYPE_VALUE_COMP_SET: 527 sparams->src = (u8 *)src->compv; 528 sparams->dst = (u8 *)dst->compv; 529 break; 530 case SOF_CTRL_TYPE_DATA_GET: 531 case SOF_CTRL_TYPE_DATA_SET: 532 sparams->src = (u8 *)src->data->data; 533 sparams->dst = (u8 *)dst->data->data; 534 break; 535 default: 536 return -EINVAL; 537 } 538 539 /* calculate payload size and number of messages */ 540 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes; 541 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size); 542 543 return 0; 544 } 545 546 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev, 547 struct sof_ipc_ctrl_data *cdata, 548 struct sof_ipc_ctrl_data_params *sparams, 549 bool send) 550 { 551 struct sof_ipc_ctrl_data *partdata; 552 size_t send_bytes; 553 size_t offset = 0; 554 size_t msg_bytes; 555 size_t pl_size; 556 int err; 557 int i; 558 559 /* allocate max ipc size because we have at least one */ 560 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 561 if (!partdata) 562 return -ENOMEM; 563 564 if (send) 565 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata, 566 sparams); 567 else 568 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 569 sparams); 570 if (err < 0) { 571 kfree(partdata); 572 return err; 573 } 574 575 msg_bytes = sparams->msg_bytes; 576 pl_size = sparams->pl_size; 577 578 /* copy the header data */ 579 memcpy(partdata, cdata, sparams->hdr_bytes); 580 581 /* Serialise IPC TX */ 582 mutex_lock(&sdev->ipc->tx_mutex); 583 584 /* copy the payload data in a loop */ 585 for (i = 0; i < sparams->num_msg; i++) { 586 send_bytes = min(msg_bytes, pl_size); 587 partdata->num_elems = send_bytes; 588 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes; 589 partdata->msg_index = i; 590 msg_bytes -= send_bytes; 591 partdata->elems_remaining = msg_bytes; 592 593 if (send) 594 memcpy(sparams->dst, sparams->src + offset, send_bytes); 595 596 err = sof_ipc_tx_message_unlocked(sdev->ipc, 597 partdata->rhdr.hdr.cmd, 598 partdata, 599 partdata->rhdr.hdr.size, 600 partdata, 601 partdata->rhdr.hdr.size); 602 if (err < 0) 603 break; 604 605 if (!send) 606 memcpy(sparams->dst + offset, sparams->src, send_bytes); 607 608 offset += pl_size; 609 } 610 611 mutex_unlock(&sdev->ipc->tx_mutex); 612 613 kfree(partdata); 614 return err; 615 } 616 617 /* 618 * IPC get()/set() for kcontrols. 619 */ 620 int snd_sof_ipc_set_get_comp_data(struct snd_sof_control *scontrol, 621 u32 ipc_cmd, 622 enum sof_ipc_ctrl_type ctrl_type, 623 enum sof_ipc_ctrl_cmd ctrl_cmd, 624 bool send) 625 { 626 struct snd_soc_component *scomp = scontrol->scomp; 627 struct sof_ipc_ctrl_data *cdata = scontrol->control_data; 628 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 629 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 630 struct sof_ipc_fw_version *v = &ready->version; 631 struct sof_ipc_ctrl_data_params sparams; 632 size_t send_bytes; 633 int err; 634 635 /* read or write firmware volume */ 636 if (scontrol->readback_offset != 0) { 637 /* write/read value header via mmaped region */ 638 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) * 639 cdata->num_elems; 640 if (send) 641 snd_sof_dsp_block_write(sdev, sdev->mmio_bar, 642 scontrol->readback_offset, 643 cdata->chanv, send_bytes); 644 645 else 646 snd_sof_dsp_block_read(sdev, sdev->mmio_bar, 647 scontrol->readback_offset, 648 cdata->chanv, send_bytes); 649 return 0; 650 } 651 652 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd; 653 cdata->cmd = ctrl_cmd; 654 cdata->type = ctrl_type; 655 cdata->comp_id = scontrol->comp_id; 656 cdata->msg_index = 0; 657 658 /* calculate header and data size */ 659 switch (cdata->type) { 660 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 661 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 662 sparams.msg_bytes = scontrol->num_channels * 663 sizeof(struct sof_ipc_ctrl_value_chan); 664 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 665 sparams.elems = scontrol->num_channels; 666 break; 667 case SOF_CTRL_TYPE_VALUE_COMP_GET: 668 case SOF_CTRL_TYPE_VALUE_COMP_SET: 669 sparams.msg_bytes = scontrol->num_channels * 670 sizeof(struct sof_ipc_ctrl_value_comp); 671 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 672 sparams.elems = scontrol->num_channels; 673 break; 674 case SOF_CTRL_TYPE_DATA_GET: 675 case SOF_CTRL_TYPE_DATA_SET: 676 sparams.msg_bytes = cdata->data->size; 677 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + 678 sizeof(struct sof_abi_hdr); 679 sparams.elems = cdata->data->size; 680 break; 681 default: 682 return -EINVAL; 683 } 684 685 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes; 686 cdata->num_elems = sparams.elems; 687 cdata->elems_remaining = 0; 688 689 /* send normal size ipc in one part */ 690 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) { 691 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata, 692 cdata->rhdr.hdr.size, cdata, 693 cdata->rhdr.hdr.size); 694 695 if (err < 0) 696 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n", 697 cdata->comp_id); 698 699 return err; 700 } 701 702 /* data is bigger than max ipc size, chop into smaller pieces */ 703 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n", 704 cdata->rhdr.hdr.size, scontrol->size); 705 706 /* large messages is only supported from ABI 3.3.0 onwards */ 707 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { 708 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 709 return -EINVAL; 710 } 711 712 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send); 713 714 if (err < 0) 715 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n", 716 cdata->comp_id); 717 718 return err; 719 } 720 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data); 721 722 /* 723 * IPC layer enumeration. 724 */ 725 726 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 727 size_t dspbox_size, u32 hostbox, 728 size_t hostbox_size) 729 { 730 sdev->dsp_box.offset = dspbox; 731 sdev->dsp_box.size = dspbox_size; 732 sdev->host_box.offset = hostbox; 733 sdev->host_box.size = hostbox_size; 734 return 0; 735 } 736 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init); 737 738 int snd_sof_ipc_valid(struct snd_sof_dev *sdev) 739 { 740 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 741 struct sof_ipc_fw_version *v = &ready->version; 742 743 dev_info(sdev->dev, 744 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, 745 v->micro, v->tag); 746 dev_info(sdev->dev, 747 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n", 748 SOF_ABI_VERSION_MAJOR(v->abi_version), 749 SOF_ABI_VERSION_MINOR(v->abi_version), 750 SOF_ABI_VERSION_PATCH(v->abi_version), 751 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH); 752 753 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { 754 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 755 return -EINVAL; 756 } 757 758 if (v->abi_version > SOF_ABI_VERSION) { 759 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) { 760 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n"); 761 } else { 762 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n"); 763 return -EINVAL; 764 } 765 } 766 767 if (ready->flags & SOF_IPC_INFO_BUILD) { 768 dev_info(sdev->dev, 769 "Firmware debug build %d on %s-%s - options:\n" 770 " GDB: %s\n" 771 " lock debug: %s\n" 772 " lock vdebug: %s\n", 773 v->build, v->date, v->time, 774 (ready->flags & SOF_IPC_INFO_GDB) ? 775 "enabled" : "disabled", 776 (ready->flags & SOF_IPC_INFO_LOCKS) ? 777 "enabled" : "disabled", 778 (ready->flags & SOF_IPC_INFO_LOCKSV) ? 779 "enabled" : "disabled"); 780 } 781 782 /* copy the fw_version into debugfs at first boot */ 783 memcpy(&sdev->fw_version, v, sizeof(*v)); 784 785 return 0; 786 } 787 EXPORT_SYMBOL(snd_sof_ipc_valid); 788 789 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev) 790 { 791 struct snd_sof_ipc *ipc; 792 struct snd_sof_ipc_msg *msg; 793 794 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL); 795 if (!ipc) 796 return NULL; 797 798 mutex_init(&ipc->tx_mutex); 799 ipc->sdev = sdev; 800 msg = &ipc->msg; 801 802 /* indicate that we aren't sending a message ATM */ 803 msg->ipc_complete = true; 804 805 /* pre-allocate message data */ 806 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 807 GFP_KERNEL); 808 if (!msg->msg_data) 809 return NULL; 810 811 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 812 GFP_KERNEL); 813 if (!msg->reply_data) 814 return NULL; 815 816 init_waitqueue_head(&msg->waitq); 817 818 return ipc; 819 } 820 EXPORT_SYMBOL(snd_sof_ipc_init); 821 822 void snd_sof_ipc_free(struct snd_sof_dev *sdev) 823 { 824 struct snd_sof_ipc *ipc = sdev->ipc; 825 826 if (!ipc) 827 return; 828 829 /* disable sending of ipc's */ 830 mutex_lock(&ipc->tx_mutex); 831 ipc->disable_ipc_tx = true; 832 mutex_unlock(&ipc->tx_mutex); 833 } 834 EXPORT_SYMBOL(snd_sof_ipc_free); 835