1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // 10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided 11 // by platform driver code. 12 // 13 14 #include <linux/mutex.h> 15 #include <linux/types.h> 16 17 #include "sof-priv.h" 18 #include "sof-audio.h" 19 #include "ops.h" 20 21 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_type); 22 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd); 23 24 /* 25 * IPC message Tx/Rx message handling. 26 */ 27 28 /* SOF generic IPC data */ 29 struct snd_sof_ipc { 30 struct snd_sof_dev *sdev; 31 32 /* protects messages and the disable flag */ 33 struct mutex tx_mutex; 34 /* disables further sending of ipc's */ 35 bool disable_ipc_tx; 36 37 struct snd_sof_ipc_msg msg; 38 }; 39 40 struct sof_ipc_ctrl_data_params { 41 size_t msg_bytes; 42 size_t hdr_bytes; 43 size_t pl_size; 44 size_t elems; 45 u32 num_msg; 46 u8 *src; 47 u8 *dst; 48 }; 49 50 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 51 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 52 { 53 u8 *str; 54 u8 *str2 = NULL; 55 u32 glb; 56 u32 type; 57 bool vdbg = false; 58 59 glb = cmd & SOF_GLB_TYPE_MASK; 60 type = cmd & SOF_CMD_TYPE_MASK; 61 62 switch (glb) { 63 case SOF_IPC_GLB_REPLY: 64 str = "GLB_REPLY"; break; 65 case SOF_IPC_GLB_COMPOUND: 66 str = "GLB_COMPOUND"; break; 67 case SOF_IPC_GLB_TPLG_MSG: 68 str = "GLB_TPLG_MSG"; 69 switch (type) { 70 case SOF_IPC_TPLG_COMP_NEW: 71 str2 = "COMP_NEW"; break; 72 case SOF_IPC_TPLG_COMP_FREE: 73 str2 = "COMP_FREE"; break; 74 case SOF_IPC_TPLG_COMP_CONNECT: 75 str2 = "COMP_CONNECT"; break; 76 case SOF_IPC_TPLG_PIPE_NEW: 77 str2 = "PIPE_NEW"; break; 78 case SOF_IPC_TPLG_PIPE_FREE: 79 str2 = "PIPE_FREE"; break; 80 case SOF_IPC_TPLG_PIPE_CONNECT: 81 str2 = "PIPE_CONNECT"; break; 82 case SOF_IPC_TPLG_PIPE_COMPLETE: 83 str2 = "PIPE_COMPLETE"; break; 84 case SOF_IPC_TPLG_BUFFER_NEW: 85 str2 = "BUFFER_NEW"; break; 86 case SOF_IPC_TPLG_BUFFER_FREE: 87 str2 = "BUFFER_FREE"; break; 88 default: 89 str2 = "unknown type"; break; 90 } 91 break; 92 case SOF_IPC_GLB_PM_MSG: 93 str = "GLB_PM_MSG"; 94 switch (type) { 95 case SOF_IPC_PM_CTX_SAVE: 96 str2 = "CTX_SAVE"; break; 97 case SOF_IPC_PM_CTX_RESTORE: 98 str2 = "CTX_RESTORE"; break; 99 case SOF_IPC_PM_CTX_SIZE: 100 str2 = "CTX_SIZE"; break; 101 case SOF_IPC_PM_CLK_SET: 102 str2 = "CLK_SET"; break; 103 case SOF_IPC_PM_CLK_GET: 104 str2 = "CLK_GET"; break; 105 case SOF_IPC_PM_CLK_REQ: 106 str2 = "CLK_REQ"; break; 107 case SOF_IPC_PM_CORE_ENABLE: 108 str2 = "CORE_ENABLE"; break; 109 case SOF_IPC_PM_GATE: 110 str2 = "GATE"; break; 111 default: 112 str2 = "unknown type"; break; 113 } 114 break; 115 case SOF_IPC_GLB_COMP_MSG: 116 str = "GLB_COMP_MSG"; 117 switch (type) { 118 case SOF_IPC_COMP_SET_VALUE: 119 str2 = "SET_VALUE"; break; 120 case SOF_IPC_COMP_GET_VALUE: 121 str2 = "GET_VALUE"; break; 122 case SOF_IPC_COMP_SET_DATA: 123 str2 = "SET_DATA"; break; 124 case SOF_IPC_COMP_GET_DATA: 125 str2 = "GET_DATA"; break; 126 default: 127 str2 = "unknown type"; break; 128 } 129 break; 130 case SOF_IPC_GLB_STREAM_MSG: 131 str = "GLB_STREAM_MSG"; 132 switch (type) { 133 case SOF_IPC_STREAM_PCM_PARAMS: 134 str2 = "PCM_PARAMS"; break; 135 case SOF_IPC_STREAM_PCM_PARAMS_REPLY: 136 str2 = "PCM_REPLY"; break; 137 case SOF_IPC_STREAM_PCM_FREE: 138 str2 = "PCM_FREE"; break; 139 case SOF_IPC_STREAM_TRIG_START: 140 str2 = "TRIG_START"; break; 141 case SOF_IPC_STREAM_TRIG_STOP: 142 str2 = "TRIG_STOP"; break; 143 case SOF_IPC_STREAM_TRIG_PAUSE: 144 str2 = "TRIG_PAUSE"; break; 145 case SOF_IPC_STREAM_TRIG_RELEASE: 146 str2 = "TRIG_RELEASE"; break; 147 case SOF_IPC_STREAM_TRIG_DRAIN: 148 str2 = "TRIG_DRAIN"; break; 149 case SOF_IPC_STREAM_TRIG_XRUN: 150 str2 = "TRIG_XRUN"; break; 151 case SOF_IPC_STREAM_POSITION: 152 vdbg = true; 153 str2 = "POSITION"; break; 154 case SOF_IPC_STREAM_VORBIS_PARAMS: 155 str2 = "VORBIS_PARAMS"; break; 156 case SOF_IPC_STREAM_VORBIS_FREE: 157 str2 = "VORBIS_FREE"; break; 158 default: 159 str2 = "unknown type"; break; 160 } 161 break; 162 case SOF_IPC_FW_READY: 163 str = "FW_READY"; break; 164 case SOF_IPC_GLB_DAI_MSG: 165 str = "GLB_DAI_MSG"; 166 switch (type) { 167 case SOF_IPC_DAI_CONFIG: 168 str2 = "CONFIG"; break; 169 case SOF_IPC_DAI_LOOPBACK: 170 str2 = "LOOPBACK"; break; 171 default: 172 str2 = "unknown type"; break; 173 } 174 break; 175 case SOF_IPC_GLB_TRACE_MSG: 176 str = "GLB_TRACE_MSG"; 177 switch (type) { 178 case SOF_IPC_TRACE_DMA_PARAMS: 179 str2 = "DMA_PARAMS"; break; 180 case SOF_IPC_TRACE_DMA_POSITION: 181 str2 = "DMA_POSITION"; break; 182 case SOF_IPC_TRACE_DMA_PARAMS_EXT: 183 str2 = "DMA_PARAMS_EXT"; break; 184 case SOF_IPC_TRACE_FILTER_UPDATE: 185 str2 = "FILTER_UPDATE"; break; 186 case SOF_IPC_TRACE_DMA_FREE: 187 str2 = "DMA_FREE"; break; 188 default: 189 str2 = "unknown type"; break; 190 } 191 break; 192 case SOF_IPC_GLB_TEST_MSG: 193 str = "GLB_TEST_MSG"; 194 switch (type) { 195 case SOF_IPC_TEST_IPC_FLOOD: 196 str2 = "IPC_FLOOD"; break; 197 default: 198 str2 = "unknown type"; break; 199 } 200 break; 201 case SOF_IPC_GLB_DEBUG: 202 str = "GLB_DEBUG"; 203 switch (type) { 204 case SOF_IPC_DEBUG_MEM_USAGE: 205 str2 = "MEM_USAGE"; break; 206 default: 207 str2 = "unknown type"; break; 208 } 209 break; 210 case SOF_IPC_GLB_PROBE: 211 str = "GLB_PROBE"; 212 switch (type) { 213 case SOF_IPC_PROBE_INIT: 214 str2 = "INIT"; break; 215 case SOF_IPC_PROBE_DEINIT: 216 str2 = "DEINIT"; break; 217 case SOF_IPC_PROBE_DMA_ADD: 218 str2 = "DMA_ADD"; break; 219 case SOF_IPC_PROBE_DMA_INFO: 220 str2 = "DMA_INFO"; break; 221 case SOF_IPC_PROBE_DMA_REMOVE: 222 str2 = "DMA_REMOVE"; break; 223 case SOF_IPC_PROBE_POINT_ADD: 224 str2 = "POINT_ADD"; break; 225 case SOF_IPC_PROBE_POINT_INFO: 226 str2 = "POINT_INFO"; break; 227 case SOF_IPC_PROBE_POINT_REMOVE: 228 str2 = "POINT_REMOVE"; break; 229 default: 230 str2 = "unknown type"; break; 231 } 232 break; 233 default: 234 str = "unknown GLB command"; break; 235 } 236 237 if (str2) { 238 if (vdbg) 239 dev_vdbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 240 else 241 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 242 } else { 243 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str); 244 } 245 } 246 #else 247 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 248 { 249 if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG) 250 dev_dbg(dev, "%s: 0x%x\n", text, cmd); 251 } 252 #endif 253 254 /* wait for IPC message reply */ 255 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg, 256 void *reply_data) 257 { 258 struct snd_sof_dev *sdev = ipc->sdev; 259 struct sof_ipc_cmd_hdr *hdr = msg->msg_data; 260 int ret; 261 262 /* wait for DSP IPC completion */ 263 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 264 msecs_to_jiffies(sdev->ipc_timeout)); 265 266 if (ret == 0) { 267 dev_err(sdev->dev, 268 "ipc tx timed out for %#x (msg/reply size: %d/%zu)\n", 269 hdr->cmd, hdr->size, msg->reply_size); 270 snd_sof_handle_fw_exception(ipc->sdev); 271 ret = -ETIMEDOUT; 272 } else { 273 ret = msg->reply_error; 274 if (ret < 0) { 275 dev_err(sdev->dev, 276 "ipc tx error for %#x (msg/reply size: %d/%zu): %d\n", 277 hdr->cmd, hdr->size, msg->reply_size, ret); 278 } else { 279 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd); 280 if (msg->reply_size) 281 /* copy the data returned from DSP */ 282 memcpy(reply_data, msg->reply_data, 283 msg->reply_size); 284 } 285 286 /* re-enable dumps after successful IPC tx */ 287 if (sdev->ipc_dump_printed) { 288 sdev->dbg_dump_printed = false; 289 sdev->ipc_dump_printed = false; 290 } 291 } 292 293 return ret; 294 } 295 296 /* send IPC message from host to DSP */ 297 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header, 298 void *msg_data, size_t msg_bytes, 299 void *reply_data, size_t reply_bytes) 300 { 301 struct snd_sof_dev *sdev = ipc->sdev; 302 struct snd_sof_ipc_msg *msg; 303 int ret; 304 305 if (ipc->disable_ipc_tx || sdev->fw_state != SOF_FW_BOOT_COMPLETE) 306 return -ENODEV; 307 308 /* 309 * The spin-lock is also still needed to protect message objects against 310 * other atomic contexts. 311 */ 312 spin_lock_irq(&sdev->ipc_lock); 313 314 /* initialise the message */ 315 msg = &ipc->msg; 316 317 msg->header = header; 318 msg->msg_size = msg_bytes; 319 msg->reply_size = reply_bytes; 320 msg->reply_error = 0; 321 322 /* attach any data */ 323 if (msg_bytes) 324 memcpy(msg->msg_data, msg_data, msg_bytes); 325 326 sdev->msg = msg; 327 328 ret = snd_sof_dsp_send_msg(sdev, msg); 329 /* Next reply that we receive will be related to this message */ 330 if (!ret) 331 msg->ipc_complete = false; 332 333 spin_unlock_irq(&sdev->ipc_lock); 334 335 if (ret) { 336 dev_err_ratelimited(sdev->dev, 337 "error: ipc tx failed with error %d\n", 338 ret); 339 return ret; 340 } 341 342 ipc_log_header(sdev->dev, "ipc tx", msg->header); 343 344 /* now wait for completion */ 345 return tx_wait_done(ipc, msg, reply_data); 346 } 347 348 /* send IPC message from host to DSP */ 349 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 350 void *msg_data, size_t msg_bytes, void *reply_data, 351 size_t reply_bytes) 352 { 353 const struct sof_dsp_power_state target_state = { 354 .state = SOF_DSP_PM_D0, 355 }; 356 int ret; 357 358 /* ensure the DSP is in D0 before sending a new IPC */ 359 ret = snd_sof_dsp_set_power_state(ipc->sdev, &target_state); 360 if (ret < 0) { 361 dev_err(ipc->sdev->dev, "error: resuming DSP %d\n", ret); 362 return ret; 363 } 364 365 return sof_ipc_tx_message_no_pm(ipc, header, msg_data, msg_bytes, 366 reply_data, reply_bytes); 367 } 368 EXPORT_SYMBOL(sof_ipc_tx_message); 369 370 /* 371 * send IPC message from host to DSP without modifying the DSP state. 372 * This will be used for IPC's that can be handled by the DSP 373 * even in a low-power D0 substate. 374 */ 375 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header, 376 void *msg_data, size_t msg_bytes, 377 void *reply_data, size_t reply_bytes) 378 { 379 int ret; 380 381 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE || 382 reply_bytes > SOF_IPC_MSG_MAX_SIZE) 383 return -ENOBUFS; 384 385 /* Serialise IPC TX */ 386 mutex_lock(&ipc->tx_mutex); 387 388 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes, 389 reply_data, reply_bytes); 390 391 mutex_unlock(&ipc->tx_mutex); 392 393 return ret; 394 } 395 EXPORT_SYMBOL(sof_ipc_tx_message_no_pm); 396 397 /* Generic helper function to retrieve the reply */ 398 void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev) 399 { 400 struct snd_sof_ipc_msg *msg = sdev->msg; 401 struct sof_ipc_reply reply; 402 int ret = 0; 403 404 /* 405 * Sometimes, there is unexpected reply ipc arriving. The reply 406 * ipc belongs to none of the ipcs sent from driver. 407 * In this case, the driver must ignore the ipc. 408 */ 409 if (!msg) { 410 dev_warn(sdev->dev, "unexpected ipc interrupt raised!\n"); 411 return; 412 } 413 414 /* get the generic reply */ 415 snd_sof_dsp_mailbox_read(sdev, sdev->host_box.offset, &reply, 416 sizeof(reply)); 417 418 if (reply.error < 0) { 419 memcpy(msg->reply_data, &reply, sizeof(reply)); 420 ret = reply.error; 421 } else if (!reply.hdr.size) { 422 /* Reply should always be >= sizeof(struct sof_ipc_reply) */ 423 if (msg->reply_size) 424 dev_err(sdev->dev, 425 "empty reply received, expected %zu bytes\n", 426 msg->reply_size); 427 else 428 dev_err(sdev->dev, "empty reply received\n"); 429 430 ret = -EINVAL; 431 } else if (msg->reply_size > 0) { 432 if (reply.hdr.size == msg->reply_size) { 433 ret = 0; 434 } else if (reply.hdr.size < msg->reply_size) { 435 dev_dbg(sdev->dev, 436 "reply size (%u) is less than expected (%zu)\n", 437 reply.hdr.size, msg->reply_size); 438 439 msg->reply_size = reply.hdr.size; 440 ret = 0; 441 } else { 442 dev_err(sdev->dev, 443 "reply size (%u) exceeds the buffer size (%zu)\n", 444 reply.hdr.size, msg->reply_size); 445 ret = -EINVAL; 446 } 447 448 /* get the full message if reply.hdr.size <= msg->reply_size */ 449 if (!ret) 450 snd_sof_dsp_mailbox_read(sdev, sdev->host_box.offset, 451 msg->reply_data, msg->reply_size); 452 } 453 454 msg->reply_error = ret; 455 } 456 EXPORT_SYMBOL(snd_sof_ipc_get_reply); 457 458 /* handle reply message from DSP */ 459 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id) 460 { 461 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 462 463 if (msg->ipc_complete) { 464 dev_dbg(sdev->dev, 465 "no reply expected, received 0x%x, will be ignored", 466 msg_id); 467 return; 468 } 469 470 /* wake up and return the error if we have waiters on this message ? */ 471 msg->ipc_complete = true; 472 wake_up(&msg->waitq); 473 } 474 EXPORT_SYMBOL(snd_sof_ipc_reply); 475 476 static void ipc_comp_notification(struct snd_sof_dev *sdev, 477 struct sof_ipc_cmd_hdr *hdr) 478 { 479 u32 msg_type = hdr->cmd & SOF_CMD_TYPE_MASK; 480 struct sof_ipc_ctrl_data *cdata; 481 int ret; 482 483 switch (msg_type) { 484 case SOF_IPC_COMP_GET_VALUE: 485 case SOF_IPC_COMP_GET_DATA: 486 cdata = kmalloc(hdr->size, GFP_KERNEL); 487 if (!cdata) 488 return; 489 490 /* read back full message */ 491 ret = snd_sof_ipc_msg_data(sdev, NULL, cdata, hdr->size); 492 if (ret < 0) { 493 dev_err(sdev->dev, 494 "error: failed to read component event: %d\n", ret); 495 goto err; 496 } 497 break; 498 default: 499 dev_err(sdev->dev, "error: unhandled component message %#x\n", msg_type); 500 return; 501 } 502 503 snd_sof_control_notify(sdev, cdata); 504 505 err: 506 kfree(cdata); 507 } 508 509 /* DSP firmware has sent host a message */ 510 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 511 { 512 struct sof_ipc_cmd_hdr hdr; 513 u32 cmd, type; 514 int err; 515 516 /* read back header */ 517 err = snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); 518 if (err < 0) { 519 dev_warn(sdev->dev, "failed to read IPC header: %d\n", err); 520 return; 521 } 522 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd); 523 524 cmd = hdr.cmd & SOF_GLB_TYPE_MASK; 525 type = hdr.cmd & SOF_CMD_TYPE_MASK; 526 527 /* check message type */ 528 switch (cmd) { 529 case SOF_IPC_GLB_REPLY: 530 dev_err(sdev->dev, "error: ipc reply unknown\n"); 531 break; 532 case SOF_IPC_FW_READY: 533 /* check for FW boot completion */ 534 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) { 535 err = sof_ops(sdev)->fw_ready(sdev, cmd); 536 if (err < 0) 537 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED); 538 else 539 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK); 540 541 /* wake up firmware loader */ 542 wake_up(&sdev->boot_wait); 543 } 544 break; 545 case SOF_IPC_GLB_COMPOUND: 546 case SOF_IPC_GLB_TPLG_MSG: 547 case SOF_IPC_GLB_PM_MSG: 548 break; 549 case SOF_IPC_GLB_COMP_MSG: 550 ipc_comp_notification(sdev, &hdr); 551 break; 552 case SOF_IPC_GLB_STREAM_MSG: 553 /* need to pass msg id into the function */ 554 ipc_stream_message(sdev, hdr.cmd); 555 break; 556 case SOF_IPC_GLB_TRACE_MSG: 557 ipc_trace_message(sdev, type); 558 break; 559 default: 560 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd); 561 break; 562 } 563 564 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd); 565 } 566 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx); 567 568 /* 569 * IPC trace mechanism. 570 */ 571 572 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_type) 573 { 574 struct sof_ipc_dma_trace_posn posn; 575 int ret; 576 577 switch (msg_type) { 578 case SOF_IPC_TRACE_DMA_POSITION: 579 /* read back full message */ 580 ret = snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn)); 581 if (ret < 0) 582 dev_warn(sdev->dev, "failed to read trace position: %d\n", ret); 583 else 584 snd_sof_trace_update_pos(sdev, &posn); 585 break; 586 default: 587 dev_err(sdev->dev, "error: unhandled trace message %#x\n", msg_type); 588 break; 589 } 590 } 591 592 /* 593 * IPC stream position. 594 */ 595 596 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id) 597 { 598 struct snd_soc_component *scomp = sdev->component; 599 struct snd_sof_pcm_stream *stream; 600 struct sof_ipc_stream_posn posn; 601 struct snd_sof_pcm *spcm; 602 int direction, ret; 603 604 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 605 if (!spcm) { 606 dev_err(sdev->dev, 607 "error: period elapsed for unknown stream, msg_id %d\n", 608 msg_id); 609 return; 610 } 611 612 stream = &spcm->stream[direction]; 613 ret = snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 614 if (ret < 0) { 615 dev_warn(sdev->dev, "failed to read stream position: %d\n", ret); 616 return; 617 } 618 619 dev_vdbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n", 620 posn.host_posn, posn.dai_posn, posn.wallclock); 621 622 memcpy(&stream->posn, &posn, sizeof(posn)); 623 624 if (spcm->pcm.compress) 625 snd_sof_compr_fragment_elapsed(stream->cstream); 626 else if (stream->substream->runtime && 627 !stream->substream->runtime->no_period_wakeup) 628 /* only inform ALSA for period_wakeup mode */ 629 snd_sof_pcm_period_elapsed(stream->substream); 630 } 631 632 /* DSP notifies host of an XRUN within FW */ 633 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id) 634 { 635 struct snd_soc_component *scomp = sdev->component; 636 struct snd_sof_pcm_stream *stream; 637 struct sof_ipc_stream_posn posn; 638 struct snd_sof_pcm *spcm; 639 int direction, ret; 640 641 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 642 if (!spcm) { 643 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n", 644 msg_id); 645 return; 646 } 647 648 stream = &spcm->stream[direction]; 649 ret = snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 650 if (ret < 0) { 651 dev_warn(sdev->dev, "failed to read overrun position: %d\n", ret); 652 return; 653 } 654 655 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n", 656 posn.host_posn, posn.xrun_comp_id, posn.xrun_size); 657 658 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP) 659 /* stop PCM on XRUN - used for pipeline debug */ 660 memcpy(&stream->posn, &posn, sizeof(posn)); 661 snd_pcm_stop_xrun(stream->substream); 662 #endif 663 } 664 665 /* stream notifications from DSP FW */ 666 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd) 667 { 668 /* get msg cmd type and msd id */ 669 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK; 670 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd); 671 672 switch (msg_type) { 673 case SOF_IPC_STREAM_POSITION: 674 ipc_period_elapsed(sdev, msg_id); 675 break; 676 case SOF_IPC_STREAM_TRIG_XRUN: 677 ipc_xrun(sdev, msg_id); 678 break; 679 default: 680 dev_err(sdev->dev, "error: unhandled stream message %#x\n", 681 msg_id); 682 break; 683 } 684 } 685 686 /* get stream position IPC - use faster MMIO method if available on platform */ 687 int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp, 688 struct snd_sof_pcm *spcm, int direction, 689 struct sof_ipc_stream_posn *posn) 690 { 691 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 692 struct sof_ipc_stream stream; 693 int err; 694 695 /* read position via slower IPC */ 696 stream.hdr.size = sizeof(stream); 697 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION; 698 stream.comp_id = spcm->stream[direction].comp_id; 699 700 /* send IPC to the DSP */ 701 err = sof_ipc_tx_message(sdev->ipc, 702 stream.hdr.cmd, &stream, sizeof(stream), posn, 703 sizeof(*posn)); 704 if (err < 0) { 705 dev_err(sdev->dev, "error: failed to get stream %d position\n", 706 stream.comp_id); 707 return err; 708 } 709 710 return 0; 711 } 712 EXPORT_SYMBOL(snd_sof_ipc_stream_posn); 713 714 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type, 715 struct sof_ipc_ctrl_data *src, 716 struct sof_ipc_ctrl_data *dst, 717 struct sof_ipc_ctrl_data_params *sparams) 718 { 719 switch (ctrl_type) { 720 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 721 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 722 sparams->src = (u8 *)src->chanv; 723 sparams->dst = (u8 *)dst->chanv; 724 break; 725 case SOF_CTRL_TYPE_DATA_GET: 726 case SOF_CTRL_TYPE_DATA_SET: 727 sparams->src = (u8 *)src->data->data; 728 sparams->dst = (u8 *)dst->data->data; 729 break; 730 default: 731 return -EINVAL; 732 } 733 734 /* calculate payload size and number of messages */ 735 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes; 736 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size); 737 738 return 0; 739 } 740 741 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev, 742 struct sof_ipc_ctrl_data *cdata, 743 struct sof_ipc_ctrl_data_params *sparams, 744 bool set) 745 { 746 struct sof_ipc_ctrl_data *partdata; 747 size_t send_bytes; 748 size_t offset = 0; 749 size_t msg_bytes; 750 size_t pl_size; 751 int err; 752 int i; 753 754 /* allocate max ipc size because we have at least one */ 755 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 756 if (!partdata) 757 return -ENOMEM; 758 759 if (set) 760 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata, 761 sparams); 762 else 763 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 764 sparams); 765 if (err < 0) { 766 kfree(partdata); 767 return err; 768 } 769 770 msg_bytes = sparams->msg_bytes; 771 pl_size = sparams->pl_size; 772 773 /* copy the header data */ 774 memcpy(partdata, cdata, sparams->hdr_bytes); 775 776 /* Serialise IPC TX */ 777 mutex_lock(&sdev->ipc->tx_mutex); 778 779 /* copy the payload data in a loop */ 780 for (i = 0; i < sparams->num_msg; i++) { 781 send_bytes = min(msg_bytes, pl_size); 782 partdata->num_elems = send_bytes; 783 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes; 784 partdata->msg_index = i; 785 msg_bytes -= send_bytes; 786 partdata->elems_remaining = msg_bytes; 787 788 if (set) 789 memcpy(sparams->dst, sparams->src + offset, send_bytes); 790 791 err = sof_ipc_tx_message_unlocked(sdev->ipc, 792 partdata->rhdr.hdr.cmd, 793 partdata, 794 partdata->rhdr.hdr.size, 795 partdata, 796 partdata->rhdr.hdr.size); 797 if (err < 0) 798 break; 799 800 if (!set) 801 memcpy(sparams->dst + offset, sparams->src, send_bytes); 802 803 offset += pl_size; 804 } 805 806 mutex_unlock(&sdev->ipc->tx_mutex); 807 808 kfree(partdata); 809 return err; 810 } 811 812 /* 813 * IPC get()/set() for kcontrols. 814 */ 815 int snd_sof_ipc_set_get_comp_data(struct snd_sof_control *scontrol, bool set) 816 { 817 struct snd_soc_component *scomp = scontrol->scomp; 818 struct sof_ipc_ctrl_data *cdata = scontrol->control_data; 819 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 820 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 821 struct sof_ipc_fw_version *v = &ready->version; 822 struct sof_ipc_ctrl_data_params sparams; 823 enum sof_ipc_ctrl_type ctrl_type; 824 struct snd_sof_widget *swidget; 825 bool widget_found = false; 826 size_t send_bytes; 827 u32 ipc_cmd; 828 int err; 829 830 list_for_each_entry(swidget, &sdev->widget_list, list) { 831 if (swidget->comp_id == scontrol->comp_id) { 832 widget_found = true; 833 break; 834 } 835 } 836 837 if (!widget_found) { 838 dev_err(sdev->dev, "error: can't find widget with id %d\n", scontrol->comp_id); 839 return -EINVAL; 840 } 841 842 /* 843 * Volatile controls should always be part of static pipelines and the widget use_count 844 * would always be > 0 in this case. For the others, just return the cached value if the 845 * widget is not set up. 846 */ 847 if (!swidget->use_count) 848 return 0; 849 850 /* read or write firmware volume */ 851 if (scontrol->readback_offset != 0) { 852 /* write/read value header via mmaped region */ 853 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) * 854 cdata->num_elems; 855 if (set) 856 err = snd_sof_dsp_block_write(sdev, SOF_FW_BLK_TYPE_IRAM, 857 scontrol->readback_offset, 858 cdata->chanv, send_bytes); 859 860 else 861 err = snd_sof_dsp_block_read(sdev, SOF_FW_BLK_TYPE_IRAM, 862 scontrol->readback_offset, 863 cdata->chanv, send_bytes); 864 865 if (err) 866 dev_err_once(sdev->dev, "error: %s TYPE_IRAM failed\n", 867 set ? "write to" : "read from"); 868 return err; 869 } 870 871 /* 872 * Select the IPC cmd and the ctrl_type based on the ctrl_cmd and the 873 * direction 874 * Note: SOF_CTRL_TYPE_VALUE_COMP_* is not used and supported currently 875 * for ctrl_type 876 */ 877 if (cdata->cmd == SOF_CTRL_CMD_BINARY) { 878 ipc_cmd = set ? SOF_IPC_COMP_SET_DATA : SOF_IPC_COMP_GET_DATA; 879 ctrl_type = set ? SOF_CTRL_TYPE_DATA_SET : SOF_CTRL_TYPE_DATA_GET; 880 } else { 881 ipc_cmd = set ? SOF_IPC_COMP_SET_VALUE : SOF_IPC_COMP_GET_VALUE; 882 ctrl_type = set ? SOF_CTRL_TYPE_VALUE_CHAN_SET : SOF_CTRL_TYPE_VALUE_CHAN_GET; 883 } 884 885 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd; 886 cdata->type = ctrl_type; 887 cdata->comp_id = scontrol->comp_id; 888 cdata->msg_index = 0; 889 890 /* calculate header and data size */ 891 switch (cdata->type) { 892 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 893 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 894 sparams.msg_bytes = scontrol->num_channels * 895 sizeof(struct sof_ipc_ctrl_value_chan); 896 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 897 sparams.elems = scontrol->num_channels; 898 break; 899 case SOF_CTRL_TYPE_DATA_GET: 900 case SOF_CTRL_TYPE_DATA_SET: 901 sparams.msg_bytes = cdata->data->size; 902 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + 903 sizeof(struct sof_abi_hdr); 904 sparams.elems = cdata->data->size; 905 break; 906 default: 907 return -EINVAL; 908 } 909 910 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes; 911 cdata->num_elems = sparams.elems; 912 cdata->elems_remaining = 0; 913 914 /* send normal size ipc in one part */ 915 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) { 916 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata, 917 cdata->rhdr.hdr.size, cdata, 918 cdata->rhdr.hdr.size); 919 920 if (err < 0) 921 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n", 922 cdata->comp_id); 923 924 return err; 925 } 926 927 /* data is bigger than max ipc size, chop into smaller pieces */ 928 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n", 929 cdata->rhdr.hdr.size, scontrol->size); 930 931 /* large messages is only supported from ABI 3.3.0 onwards */ 932 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { 933 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 934 return -EINVAL; 935 } 936 937 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, set); 938 939 if (err < 0) 940 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n", 941 cdata->comp_id); 942 943 return err; 944 } 945 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data); 946 947 int snd_sof_ipc_valid(struct snd_sof_dev *sdev) 948 { 949 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 950 struct sof_ipc_fw_version *v = &ready->version; 951 952 dev_info(sdev->dev, 953 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, 954 v->micro, v->tag); 955 dev_info(sdev->dev, 956 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n", 957 SOF_ABI_VERSION_MAJOR(v->abi_version), 958 SOF_ABI_VERSION_MINOR(v->abi_version), 959 SOF_ABI_VERSION_PATCH(v->abi_version), 960 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH); 961 962 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { 963 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 964 return -EINVAL; 965 } 966 967 if (SOF_ABI_VERSION_MINOR(v->abi_version) > SOF_ABI_MINOR) { 968 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) { 969 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n"); 970 } else { 971 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n"); 972 return -EINVAL; 973 } 974 } 975 976 if (ready->flags & SOF_IPC_INFO_BUILD) { 977 dev_info(sdev->dev, 978 "Firmware debug build %d on %s-%s - options:\n" 979 " GDB: %s\n" 980 " lock debug: %s\n" 981 " lock vdebug: %s\n", 982 v->build, v->date, v->time, 983 (ready->flags & SOF_IPC_INFO_GDB) ? 984 "enabled" : "disabled", 985 (ready->flags & SOF_IPC_INFO_LOCKS) ? 986 "enabled" : "disabled", 987 (ready->flags & SOF_IPC_INFO_LOCKSV) ? 988 "enabled" : "disabled"); 989 } 990 991 /* copy the fw_version into debugfs at first boot */ 992 memcpy(&sdev->fw_version, v, sizeof(*v)); 993 994 return 0; 995 } 996 EXPORT_SYMBOL(snd_sof_ipc_valid); 997 998 int sof_ipc_init_msg_memory(struct snd_sof_dev *sdev) 999 { 1000 struct snd_sof_ipc_msg *msg; 1001 1002 msg = &sdev->ipc->msg; 1003 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 1004 if (!msg->msg_data) 1005 return -ENOMEM; 1006 1007 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 1008 if (!msg->reply_data) 1009 return -ENOMEM; 1010 1011 return 0; 1012 } 1013 1014 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev) 1015 { 1016 struct snd_sof_ipc *ipc; 1017 struct snd_sof_ipc_msg *msg; 1018 1019 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL); 1020 if (!ipc) 1021 return NULL; 1022 1023 mutex_init(&ipc->tx_mutex); 1024 ipc->sdev = sdev; 1025 msg = &ipc->msg; 1026 1027 /* indicate that we aren't sending a message ATM */ 1028 msg->ipc_complete = true; 1029 1030 init_waitqueue_head(&msg->waitq); 1031 1032 return ipc; 1033 } 1034 EXPORT_SYMBOL(snd_sof_ipc_init); 1035 1036 void snd_sof_ipc_free(struct snd_sof_dev *sdev) 1037 { 1038 struct snd_sof_ipc *ipc = sdev->ipc; 1039 1040 if (!ipc) 1041 return; 1042 1043 /* disable sending of ipc's */ 1044 mutex_lock(&ipc->tx_mutex); 1045 ipc->disable_ipc_tx = true; 1046 mutex_unlock(&ipc->tx_mutex); 1047 } 1048 EXPORT_SYMBOL(snd_sof_ipc_free); 1049