1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // 10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided 11 // by platform driver code. 12 // 13 14 #include <linux/mutex.h> 15 #include <linux/types.h> 16 17 #include "sof-priv.h" 18 #include "ops.h" 19 20 /* 21 * IPC message default size and timeout (ms). 22 * TODO: allow platforms to set size and timeout. 23 */ 24 #define IPC_TIMEOUT_MS 300 25 26 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id); 27 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd); 28 29 /* 30 * IPC message Tx/Rx message handling. 31 */ 32 33 /* SOF generic IPC data */ 34 struct snd_sof_ipc { 35 struct snd_sof_dev *sdev; 36 37 /* protects messages and the disable flag */ 38 struct mutex tx_mutex; 39 /* disables further sending of ipc's */ 40 bool disable_ipc_tx; 41 42 struct snd_sof_ipc_msg msg; 43 }; 44 45 struct sof_ipc_ctrl_data_params { 46 size_t msg_bytes; 47 size_t hdr_bytes; 48 size_t pl_size; 49 size_t elems; 50 u32 num_msg; 51 u8 *src; 52 u8 *dst; 53 }; 54 55 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 56 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 57 { 58 u8 *str; 59 u8 *str2 = NULL; 60 u32 glb; 61 u32 type; 62 63 glb = cmd & SOF_GLB_TYPE_MASK; 64 type = cmd & SOF_CMD_TYPE_MASK; 65 66 switch (glb) { 67 case SOF_IPC_GLB_REPLY: 68 str = "GLB_REPLY"; break; 69 case SOF_IPC_GLB_COMPOUND: 70 str = "GLB_COMPOUND"; break; 71 case SOF_IPC_GLB_TPLG_MSG: 72 str = "GLB_TPLG_MSG"; 73 switch (type) { 74 case SOF_IPC_TPLG_COMP_NEW: 75 str2 = "COMP_NEW"; break; 76 case SOF_IPC_TPLG_COMP_FREE: 77 str2 = "COMP_FREE"; break; 78 case SOF_IPC_TPLG_COMP_CONNECT: 79 str2 = "COMP_CONNECT"; break; 80 case SOF_IPC_TPLG_PIPE_NEW: 81 str2 = "PIPE_NEW"; break; 82 case SOF_IPC_TPLG_PIPE_FREE: 83 str2 = "PIPE_FREE"; break; 84 case SOF_IPC_TPLG_PIPE_CONNECT: 85 str2 = "PIPE_CONNECT"; break; 86 case SOF_IPC_TPLG_PIPE_COMPLETE: 87 str2 = "PIPE_COMPLETE"; break; 88 case SOF_IPC_TPLG_BUFFER_NEW: 89 str2 = "BUFFER_NEW"; break; 90 case SOF_IPC_TPLG_BUFFER_FREE: 91 str2 = "BUFFER_FREE"; break; 92 default: 93 str2 = "unknown type"; break; 94 } 95 break; 96 case SOF_IPC_GLB_PM_MSG: 97 str = "GLB_PM_MSG"; 98 switch (type) { 99 case SOF_IPC_PM_CTX_SAVE: 100 str2 = "CTX_SAVE"; break; 101 case SOF_IPC_PM_CTX_RESTORE: 102 str2 = "CTX_RESTORE"; break; 103 case SOF_IPC_PM_CTX_SIZE: 104 str2 = "CTX_SIZE"; break; 105 case SOF_IPC_PM_CLK_SET: 106 str2 = "CLK_SET"; break; 107 case SOF_IPC_PM_CLK_GET: 108 str2 = "CLK_GET"; break; 109 case SOF_IPC_PM_CLK_REQ: 110 str2 = "CLK_REQ"; break; 111 case SOF_IPC_PM_CORE_ENABLE: 112 str2 = "CORE_ENABLE"; break; 113 default: 114 str2 = "unknown type"; break; 115 } 116 break; 117 case SOF_IPC_GLB_COMP_MSG: 118 str = "GLB_COMP_MSG"; 119 switch (type) { 120 case SOF_IPC_COMP_SET_VALUE: 121 str2 = "SET_VALUE"; break; 122 case SOF_IPC_COMP_GET_VALUE: 123 str2 = "GET_VALUE"; break; 124 case SOF_IPC_COMP_SET_DATA: 125 str2 = "SET_DATA"; break; 126 case SOF_IPC_COMP_GET_DATA: 127 str2 = "GET_DATA"; break; 128 default: 129 str2 = "unknown type"; break; 130 } 131 break; 132 case SOF_IPC_GLB_STREAM_MSG: 133 str = "GLB_STREAM_MSG"; 134 switch (type) { 135 case SOF_IPC_STREAM_PCM_PARAMS: 136 str2 = "PCM_PARAMS"; break; 137 case SOF_IPC_STREAM_PCM_PARAMS_REPLY: 138 str2 = "PCM_REPLY"; break; 139 case SOF_IPC_STREAM_PCM_FREE: 140 str2 = "PCM_FREE"; break; 141 case SOF_IPC_STREAM_TRIG_START: 142 str2 = "TRIG_START"; break; 143 case SOF_IPC_STREAM_TRIG_STOP: 144 str2 = "TRIG_STOP"; break; 145 case SOF_IPC_STREAM_TRIG_PAUSE: 146 str2 = "TRIG_PAUSE"; break; 147 case SOF_IPC_STREAM_TRIG_RELEASE: 148 str2 = "TRIG_RELEASE"; break; 149 case SOF_IPC_STREAM_TRIG_DRAIN: 150 str2 = "TRIG_DRAIN"; break; 151 case SOF_IPC_STREAM_TRIG_XRUN: 152 str2 = "TRIG_XRUN"; break; 153 case SOF_IPC_STREAM_POSITION: 154 str2 = "POSITION"; break; 155 case SOF_IPC_STREAM_VORBIS_PARAMS: 156 str2 = "VORBIS_PARAMS"; break; 157 case SOF_IPC_STREAM_VORBIS_FREE: 158 str2 = "VORBIS_FREE"; break; 159 default: 160 str2 = "unknown type"; break; 161 } 162 break; 163 case SOF_IPC_FW_READY: 164 str = "FW_READY"; break; 165 case SOF_IPC_GLB_DAI_MSG: 166 str = "GLB_DAI_MSG"; 167 switch (type) { 168 case SOF_IPC_DAI_CONFIG: 169 str2 = "CONFIG"; break; 170 case SOF_IPC_DAI_LOOPBACK: 171 str2 = "LOOPBACK"; break; 172 default: 173 str2 = "unknown type"; break; 174 } 175 break; 176 case SOF_IPC_GLB_TRACE_MSG: 177 str = "GLB_TRACE_MSG"; break; 178 case SOF_IPC_GLB_TEST_MSG: 179 str = "GLB_TEST_MSG"; 180 switch (type) { 181 case SOF_IPC_TEST_IPC_FLOOD: 182 str2 = "IPC_FLOOD"; break; 183 default: 184 str2 = "unknown type"; break; 185 } 186 break; 187 default: 188 str = "unknown GLB command"; break; 189 } 190 191 if (str2) 192 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 193 else 194 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str); 195 } 196 #else 197 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 198 { 199 dev_dbg(dev, "%s: 0x%x\n", text, cmd); 200 } 201 #endif 202 203 /* wait for IPC message reply */ 204 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg, 205 void *reply_data) 206 { 207 struct snd_sof_dev *sdev = ipc->sdev; 208 struct sof_ipc_cmd_hdr *hdr = msg->msg_data; 209 int ret; 210 211 /* wait for DSP IPC completion */ 212 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 213 msecs_to_jiffies(IPC_TIMEOUT_MS)); 214 215 if (ret == 0) { 216 dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n", 217 hdr->cmd, hdr->size); 218 snd_sof_dsp_dbg_dump(ipc->sdev, SOF_DBG_REGS | SOF_DBG_MBOX); 219 snd_sof_ipc_dump(ipc->sdev); 220 snd_sof_trace_notify_for_error(ipc->sdev); 221 ret = -ETIMEDOUT; 222 } else { 223 /* copy the data returned from DSP */ 224 ret = msg->reply_error; 225 if (msg->reply_size) 226 memcpy(reply_data, msg->reply_data, msg->reply_size); 227 if (ret < 0) 228 dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n", 229 hdr->cmd, msg->reply_size); 230 else 231 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd); 232 } 233 234 return ret; 235 } 236 237 /* send IPC message from host to DSP */ 238 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header, 239 void *msg_data, size_t msg_bytes, 240 void *reply_data, size_t reply_bytes) 241 { 242 struct snd_sof_dev *sdev = ipc->sdev; 243 struct snd_sof_ipc_msg *msg; 244 int ret; 245 246 if (ipc->disable_ipc_tx) 247 return -ENODEV; 248 249 /* 250 * The spin-lock is also still needed to protect message objects against 251 * other atomic contexts. 252 */ 253 spin_lock_irq(&sdev->ipc_lock); 254 255 /* initialise the message */ 256 msg = &ipc->msg; 257 258 msg->header = header; 259 msg->msg_size = msg_bytes; 260 msg->reply_size = reply_bytes; 261 msg->reply_error = 0; 262 263 /* attach any data */ 264 if (msg_bytes) 265 memcpy(msg->msg_data, msg_data, msg_bytes); 266 267 sdev->msg = msg; 268 269 ret = snd_sof_dsp_send_msg(sdev, msg); 270 /* Next reply that we receive will be related to this message */ 271 if (!ret) 272 msg->ipc_complete = false; 273 274 spin_unlock_irq(&sdev->ipc_lock); 275 276 if (ret < 0) { 277 /* So far IPC TX never fails, consider making the above void */ 278 dev_err_ratelimited(sdev->dev, 279 "error: ipc tx failed with error %d\n", 280 ret); 281 return ret; 282 } 283 284 ipc_log_header(sdev->dev, "ipc tx", msg->header); 285 286 /* now wait for completion */ 287 if (!ret) 288 ret = tx_wait_done(ipc, msg, reply_data); 289 290 return ret; 291 } 292 293 /* send IPC message from host to DSP */ 294 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 295 void *msg_data, size_t msg_bytes, void *reply_data, 296 size_t reply_bytes) 297 { 298 int ret; 299 300 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE || 301 reply_bytes > SOF_IPC_MSG_MAX_SIZE) 302 return -ENOBUFS; 303 304 /* Serialise IPC TX */ 305 mutex_lock(&ipc->tx_mutex); 306 307 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes, 308 reply_data, reply_bytes); 309 310 mutex_unlock(&ipc->tx_mutex); 311 312 return ret; 313 } 314 EXPORT_SYMBOL(sof_ipc_tx_message); 315 316 /* handle reply message from DSP */ 317 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id) 318 { 319 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 320 321 if (msg->ipc_complete) { 322 dev_err(sdev->dev, "error: no reply expected, received 0x%x", 323 msg_id); 324 return -EINVAL; 325 } 326 327 /* wake up and return the error if we have waiters on this message ? */ 328 msg->ipc_complete = true; 329 wake_up(&msg->waitq); 330 331 return 0; 332 } 333 EXPORT_SYMBOL(snd_sof_ipc_reply); 334 335 /* DSP firmware has sent host a message */ 336 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 337 { 338 struct sof_ipc_cmd_hdr hdr; 339 u32 cmd, type; 340 int err = 0; 341 342 /* read back header */ 343 snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); 344 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd); 345 346 cmd = hdr.cmd & SOF_GLB_TYPE_MASK; 347 type = hdr.cmd & SOF_CMD_TYPE_MASK; 348 349 /* check message type */ 350 switch (cmd) { 351 case SOF_IPC_GLB_REPLY: 352 dev_err(sdev->dev, "error: ipc reply unknown\n"); 353 break; 354 case SOF_IPC_FW_READY: 355 /* check for FW boot completion */ 356 if (!sdev->boot_complete) { 357 err = sof_ops(sdev)->fw_ready(sdev, cmd); 358 if (err < 0) { 359 /* 360 * this indicates a mismatch in ABI 361 * between the driver and fw 362 */ 363 dev_err(sdev->dev, "error: ABI mismatch %d\n", 364 err); 365 } else { 366 /* firmware boot completed OK */ 367 sdev->boot_complete = true; 368 } 369 370 /* wake up firmware loader */ 371 wake_up(&sdev->boot_wait); 372 } 373 break; 374 case SOF_IPC_GLB_COMPOUND: 375 case SOF_IPC_GLB_TPLG_MSG: 376 case SOF_IPC_GLB_PM_MSG: 377 case SOF_IPC_GLB_COMP_MSG: 378 break; 379 case SOF_IPC_GLB_STREAM_MSG: 380 /* need to pass msg id into the function */ 381 ipc_stream_message(sdev, hdr.cmd); 382 break; 383 case SOF_IPC_GLB_TRACE_MSG: 384 ipc_trace_message(sdev, type); 385 break; 386 default: 387 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd); 388 break; 389 } 390 391 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd); 392 } 393 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx); 394 395 /* 396 * IPC trace mechanism. 397 */ 398 399 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id) 400 { 401 struct sof_ipc_dma_trace_posn posn; 402 403 switch (msg_id) { 404 case SOF_IPC_TRACE_DMA_POSITION: 405 /* read back full message */ 406 snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn)); 407 snd_sof_trace_update_pos(sdev, &posn); 408 break; 409 default: 410 dev_err(sdev->dev, "error: unhandled trace message %x\n", 411 msg_id); 412 break; 413 } 414 } 415 416 /* 417 * IPC stream position. 418 */ 419 420 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id) 421 { 422 struct snd_sof_pcm_stream *stream; 423 struct sof_ipc_stream_posn posn; 424 struct snd_sof_pcm *spcm; 425 int direction; 426 427 spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction); 428 if (!spcm) { 429 dev_err(sdev->dev, 430 "error: period elapsed for unknown stream, msg_id %d\n", 431 msg_id); 432 return; 433 } 434 435 stream = &spcm->stream[direction]; 436 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 437 438 dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n", 439 posn.host_posn, posn.dai_posn, posn.wallclock); 440 441 memcpy(&stream->posn, &posn, sizeof(posn)); 442 443 /* only inform ALSA for period_wakeup mode */ 444 if (!stream->substream->runtime->no_period_wakeup) 445 snd_sof_pcm_period_elapsed(stream->substream); 446 } 447 448 /* DSP notifies host of an XRUN within FW */ 449 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id) 450 { 451 struct snd_sof_pcm_stream *stream; 452 struct sof_ipc_stream_posn posn; 453 struct snd_sof_pcm *spcm; 454 int direction; 455 456 spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction); 457 if (!spcm) { 458 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n", 459 msg_id); 460 return; 461 } 462 463 stream = &spcm->stream[direction]; 464 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 465 466 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n", 467 posn.host_posn, posn.xrun_comp_id, posn.xrun_size); 468 469 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP) 470 /* stop PCM on XRUN - used for pipeline debug */ 471 memcpy(&stream->posn, &posn, sizeof(posn)); 472 snd_pcm_stop_xrun(stream->substream); 473 #endif 474 } 475 476 /* stream notifications from DSP FW */ 477 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd) 478 { 479 /* get msg cmd type and msd id */ 480 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK; 481 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd); 482 483 switch (msg_type) { 484 case SOF_IPC_STREAM_POSITION: 485 ipc_period_elapsed(sdev, msg_id); 486 break; 487 case SOF_IPC_STREAM_TRIG_XRUN: 488 ipc_xrun(sdev, msg_id); 489 break; 490 default: 491 dev_err(sdev->dev, "error: unhandled stream message %x\n", 492 msg_id); 493 break; 494 } 495 } 496 497 /* get stream position IPC - use faster MMIO method if available on platform */ 498 int snd_sof_ipc_stream_posn(struct snd_sof_dev *sdev, 499 struct snd_sof_pcm *spcm, int direction, 500 struct sof_ipc_stream_posn *posn) 501 { 502 struct sof_ipc_stream stream; 503 int err; 504 505 /* read position via slower IPC */ 506 stream.hdr.size = sizeof(stream); 507 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION; 508 stream.comp_id = spcm->stream[direction].comp_id; 509 510 /* send IPC to the DSP */ 511 err = sof_ipc_tx_message(sdev->ipc, 512 stream.hdr.cmd, &stream, sizeof(stream), &posn, 513 sizeof(*posn)); 514 if (err < 0) { 515 dev_err(sdev->dev, "error: failed to get stream %d position\n", 516 stream.comp_id); 517 return err; 518 } 519 520 return 0; 521 } 522 EXPORT_SYMBOL(snd_sof_ipc_stream_posn); 523 524 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type, 525 struct sof_ipc_ctrl_data *src, 526 struct sof_ipc_ctrl_data *dst, 527 struct sof_ipc_ctrl_data_params *sparams) 528 { 529 switch (ctrl_type) { 530 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 531 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 532 sparams->src = (u8 *)src->chanv; 533 sparams->dst = (u8 *)dst->chanv; 534 break; 535 case SOF_CTRL_TYPE_VALUE_COMP_GET: 536 case SOF_CTRL_TYPE_VALUE_COMP_SET: 537 sparams->src = (u8 *)src->compv; 538 sparams->dst = (u8 *)dst->compv; 539 break; 540 case SOF_CTRL_TYPE_DATA_GET: 541 case SOF_CTRL_TYPE_DATA_SET: 542 sparams->src = (u8 *)src->data->data; 543 sparams->dst = (u8 *)dst->data->data; 544 break; 545 default: 546 return -EINVAL; 547 } 548 549 /* calculate payload size and number of messages */ 550 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes; 551 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size); 552 553 return 0; 554 } 555 556 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev, 557 struct sof_ipc_ctrl_data *cdata, 558 struct sof_ipc_ctrl_data_params *sparams, 559 bool send) 560 { 561 struct sof_ipc_ctrl_data *partdata; 562 size_t send_bytes; 563 size_t offset = 0; 564 size_t msg_bytes; 565 size_t pl_size; 566 int err; 567 int i; 568 569 /* allocate max ipc size because we have at least one */ 570 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 571 if (!partdata) 572 return -ENOMEM; 573 574 if (send) 575 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata, 576 sparams); 577 else 578 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 579 sparams); 580 if (err < 0) 581 return err; 582 583 msg_bytes = sparams->msg_bytes; 584 pl_size = sparams->pl_size; 585 586 /* copy the header data */ 587 memcpy(partdata, cdata, sparams->hdr_bytes); 588 589 /* Serialise IPC TX */ 590 mutex_lock(&sdev->ipc->tx_mutex); 591 592 /* copy the payload data in a loop */ 593 for (i = 0; i < sparams->num_msg; i++) { 594 send_bytes = min(msg_bytes, pl_size); 595 partdata->num_elems = send_bytes; 596 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes; 597 partdata->msg_index = i; 598 msg_bytes -= send_bytes; 599 partdata->elems_remaining = msg_bytes; 600 601 if (send) 602 memcpy(sparams->dst, sparams->src + offset, send_bytes); 603 604 err = sof_ipc_tx_message_unlocked(sdev->ipc, 605 partdata->rhdr.hdr.cmd, 606 partdata, 607 partdata->rhdr.hdr.size, 608 partdata, 609 partdata->rhdr.hdr.size); 610 if (err < 0) 611 break; 612 613 if (!send) 614 memcpy(sparams->dst + offset, sparams->src, send_bytes); 615 616 offset += pl_size; 617 } 618 619 mutex_unlock(&sdev->ipc->tx_mutex); 620 621 kfree(partdata); 622 return err; 623 } 624 625 /* 626 * IPC get()/set() for kcontrols. 627 */ 628 int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc *ipc, 629 struct snd_sof_control *scontrol, 630 u32 ipc_cmd, 631 enum sof_ipc_ctrl_type ctrl_type, 632 enum sof_ipc_ctrl_cmd ctrl_cmd, 633 bool send) 634 { 635 struct sof_ipc_ctrl_data *cdata = scontrol->control_data; 636 struct snd_sof_dev *sdev = ipc->sdev; 637 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 638 struct sof_ipc_fw_version *v = &ready->version; 639 struct sof_ipc_ctrl_data_params sparams; 640 size_t send_bytes; 641 int err; 642 643 /* read or write firmware volume */ 644 if (scontrol->readback_offset != 0) { 645 /* write/read value header via mmaped region */ 646 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) * 647 cdata->num_elems; 648 if (send) 649 snd_sof_dsp_block_write(sdev, sdev->mmio_bar, 650 scontrol->readback_offset, 651 cdata->chanv, send_bytes); 652 653 else 654 snd_sof_dsp_block_read(sdev, sdev->mmio_bar, 655 scontrol->readback_offset, 656 cdata->chanv, send_bytes); 657 return 0; 658 } 659 660 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd; 661 cdata->cmd = ctrl_cmd; 662 cdata->type = ctrl_type; 663 cdata->comp_id = scontrol->comp_id; 664 cdata->msg_index = 0; 665 666 /* calculate header and data size */ 667 switch (cdata->type) { 668 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 669 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 670 sparams.msg_bytes = scontrol->num_channels * 671 sizeof(struct sof_ipc_ctrl_value_chan); 672 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 673 sparams.elems = scontrol->num_channels; 674 break; 675 case SOF_CTRL_TYPE_VALUE_COMP_GET: 676 case SOF_CTRL_TYPE_VALUE_COMP_SET: 677 sparams.msg_bytes = scontrol->num_channels * 678 sizeof(struct sof_ipc_ctrl_value_comp); 679 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 680 sparams.elems = scontrol->num_channels; 681 break; 682 case SOF_CTRL_TYPE_DATA_GET: 683 case SOF_CTRL_TYPE_DATA_SET: 684 sparams.msg_bytes = cdata->data->size; 685 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + 686 sizeof(struct sof_abi_hdr); 687 sparams.elems = cdata->data->size; 688 break; 689 default: 690 return -EINVAL; 691 } 692 693 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes; 694 cdata->num_elems = sparams.elems; 695 cdata->elems_remaining = 0; 696 697 /* send normal size ipc in one part */ 698 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) { 699 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata, 700 cdata->rhdr.hdr.size, cdata, 701 cdata->rhdr.hdr.size); 702 703 if (err < 0) 704 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n", 705 cdata->comp_id); 706 707 return err; 708 } 709 710 /* data is bigger than max ipc size, chop into smaller pieces */ 711 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n", 712 cdata->rhdr.hdr.size, scontrol->size); 713 714 /* large messages is only supported from ABI 3.3.0 onwards */ 715 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { 716 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 717 return -EINVAL; 718 } 719 720 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send); 721 722 if (err < 0) 723 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n", 724 cdata->comp_id); 725 726 return err; 727 } 728 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data); 729 730 /* 731 * IPC layer enumeration. 732 */ 733 734 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 735 size_t dspbox_size, u32 hostbox, 736 size_t hostbox_size) 737 { 738 sdev->dsp_box.offset = dspbox; 739 sdev->dsp_box.size = dspbox_size; 740 sdev->host_box.offset = hostbox; 741 sdev->host_box.size = hostbox_size; 742 return 0; 743 } 744 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init); 745 746 int snd_sof_ipc_valid(struct snd_sof_dev *sdev) 747 { 748 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 749 struct sof_ipc_fw_version *v = &ready->version; 750 751 dev_info(sdev->dev, 752 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, 753 v->micro, v->tag); 754 dev_info(sdev->dev, 755 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n", 756 SOF_ABI_VERSION_MAJOR(v->abi_version), 757 SOF_ABI_VERSION_MINOR(v->abi_version), 758 SOF_ABI_VERSION_PATCH(v->abi_version), 759 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH); 760 761 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { 762 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 763 return -EINVAL; 764 } 765 766 if (v->abi_version > SOF_ABI_VERSION) { 767 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) { 768 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n"); 769 } else { 770 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n"); 771 return -EINVAL; 772 } 773 } 774 775 if (ready->flags & SOF_IPC_INFO_BUILD) { 776 dev_info(sdev->dev, 777 "Firmware debug build %d on %s-%s - options:\n" 778 " GDB: %s\n" 779 " lock debug: %s\n" 780 " lock vdebug: %s\n", 781 v->build, v->date, v->time, 782 ready->flags & SOF_IPC_INFO_GDB ? 783 "enabled" : "disabled", 784 ready->flags & SOF_IPC_INFO_LOCKS ? 785 "enabled" : "disabled", 786 ready->flags & SOF_IPC_INFO_LOCKSV ? 787 "enabled" : "disabled"); 788 } 789 790 /* copy the fw_version into debugfs at first boot */ 791 memcpy(&sdev->fw_version, v, sizeof(*v)); 792 793 return 0; 794 } 795 EXPORT_SYMBOL(snd_sof_ipc_valid); 796 797 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev) 798 { 799 struct snd_sof_ipc *ipc; 800 struct snd_sof_ipc_msg *msg; 801 802 /* check if mandatory ops required for ipc are defined */ 803 if (!sof_ops(sdev)->fw_ready) { 804 dev_err(sdev->dev, "error: ipc mandatory ops not defined\n"); 805 return NULL; 806 } 807 808 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL); 809 if (!ipc) 810 return NULL; 811 812 mutex_init(&ipc->tx_mutex); 813 ipc->sdev = sdev; 814 msg = &ipc->msg; 815 816 /* indicate that we aren't sending a message ATM */ 817 msg->ipc_complete = true; 818 819 /* pre-allocate message data */ 820 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 821 GFP_KERNEL); 822 if (!msg->msg_data) 823 return NULL; 824 825 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 826 GFP_KERNEL); 827 if (!msg->reply_data) 828 return NULL; 829 830 init_waitqueue_head(&msg->waitq); 831 832 return ipc; 833 } 834 EXPORT_SYMBOL(snd_sof_ipc_init); 835 836 void snd_sof_ipc_free(struct snd_sof_dev *sdev) 837 { 838 struct snd_sof_ipc *ipc = sdev->ipc; 839 840 /* disable sending of ipc's */ 841 mutex_lock(&ipc->tx_mutex); 842 ipc->disable_ipc_tx = true; 843 mutex_unlock(&ipc->tx_mutex); 844 } 845 EXPORT_SYMBOL(snd_sof_ipc_free); 846