xref: /openbmc/linux/sound/soc/sof/ipc.c (revision 7b73a9c8)
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //
10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided
11 // by platform driver code.
12 //
13 
14 #include <linux/mutex.h>
15 #include <linux/types.h>
16 
17 #include "sof-priv.h"
18 #include "ops.h"
19 
20 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id);
21 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd);
22 
23 /*
24  * IPC message Tx/Rx message handling.
25  */
26 
27 /* SOF generic IPC data */
28 struct snd_sof_ipc {
29 	struct snd_sof_dev *sdev;
30 
31 	/* protects messages and the disable flag */
32 	struct mutex tx_mutex;
33 	/* disables further sending of ipc's */
34 	bool disable_ipc_tx;
35 
36 	struct snd_sof_ipc_msg msg;
37 };
38 
39 struct sof_ipc_ctrl_data_params {
40 	size_t msg_bytes;
41 	size_t hdr_bytes;
42 	size_t pl_size;
43 	size_t elems;
44 	u32 num_msg;
45 	u8 *src;
46 	u8 *dst;
47 };
48 
49 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
50 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
51 {
52 	u8 *str;
53 	u8 *str2 = NULL;
54 	u32 glb;
55 	u32 type;
56 
57 	glb = cmd & SOF_GLB_TYPE_MASK;
58 	type = cmd & SOF_CMD_TYPE_MASK;
59 
60 	switch (glb) {
61 	case SOF_IPC_GLB_REPLY:
62 		str = "GLB_REPLY"; break;
63 	case SOF_IPC_GLB_COMPOUND:
64 		str = "GLB_COMPOUND"; break;
65 	case SOF_IPC_GLB_TPLG_MSG:
66 		str = "GLB_TPLG_MSG";
67 		switch (type) {
68 		case SOF_IPC_TPLG_COMP_NEW:
69 			str2 = "COMP_NEW"; break;
70 		case SOF_IPC_TPLG_COMP_FREE:
71 			str2 = "COMP_FREE"; break;
72 		case SOF_IPC_TPLG_COMP_CONNECT:
73 			str2 = "COMP_CONNECT"; break;
74 		case SOF_IPC_TPLG_PIPE_NEW:
75 			str2 = "PIPE_NEW"; break;
76 		case SOF_IPC_TPLG_PIPE_FREE:
77 			str2 = "PIPE_FREE"; break;
78 		case SOF_IPC_TPLG_PIPE_CONNECT:
79 			str2 = "PIPE_CONNECT"; break;
80 		case SOF_IPC_TPLG_PIPE_COMPLETE:
81 			str2 = "PIPE_COMPLETE"; break;
82 		case SOF_IPC_TPLG_BUFFER_NEW:
83 			str2 = "BUFFER_NEW"; break;
84 		case SOF_IPC_TPLG_BUFFER_FREE:
85 			str2 = "BUFFER_FREE"; break;
86 		default:
87 			str2 = "unknown type"; break;
88 		}
89 		break;
90 	case SOF_IPC_GLB_PM_MSG:
91 		str = "GLB_PM_MSG";
92 		switch (type) {
93 		case SOF_IPC_PM_CTX_SAVE:
94 			str2 = "CTX_SAVE"; break;
95 		case SOF_IPC_PM_CTX_RESTORE:
96 			str2 = "CTX_RESTORE"; break;
97 		case SOF_IPC_PM_CTX_SIZE:
98 			str2 = "CTX_SIZE"; break;
99 		case SOF_IPC_PM_CLK_SET:
100 			str2 = "CLK_SET"; break;
101 		case SOF_IPC_PM_CLK_GET:
102 			str2 = "CLK_GET"; break;
103 		case SOF_IPC_PM_CLK_REQ:
104 			str2 = "CLK_REQ"; break;
105 		case SOF_IPC_PM_CORE_ENABLE:
106 			str2 = "CORE_ENABLE"; break;
107 		default:
108 			str2 = "unknown type"; break;
109 		}
110 		break;
111 	case SOF_IPC_GLB_COMP_MSG:
112 		str = "GLB_COMP_MSG";
113 		switch (type) {
114 		case SOF_IPC_COMP_SET_VALUE:
115 			str2 = "SET_VALUE"; break;
116 		case SOF_IPC_COMP_GET_VALUE:
117 			str2 = "GET_VALUE"; break;
118 		case SOF_IPC_COMP_SET_DATA:
119 			str2 = "SET_DATA"; break;
120 		case SOF_IPC_COMP_GET_DATA:
121 			str2 = "GET_DATA"; break;
122 		default:
123 			str2 = "unknown type"; break;
124 		}
125 		break;
126 	case SOF_IPC_GLB_STREAM_MSG:
127 		str = "GLB_STREAM_MSG";
128 		switch (type) {
129 		case SOF_IPC_STREAM_PCM_PARAMS:
130 			str2 = "PCM_PARAMS"; break;
131 		case SOF_IPC_STREAM_PCM_PARAMS_REPLY:
132 			str2 = "PCM_REPLY"; break;
133 		case SOF_IPC_STREAM_PCM_FREE:
134 			str2 = "PCM_FREE"; break;
135 		case SOF_IPC_STREAM_TRIG_START:
136 			str2 = "TRIG_START"; break;
137 		case SOF_IPC_STREAM_TRIG_STOP:
138 			str2 = "TRIG_STOP"; break;
139 		case SOF_IPC_STREAM_TRIG_PAUSE:
140 			str2 = "TRIG_PAUSE"; break;
141 		case SOF_IPC_STREAM_TRIG_RELEASE:
142 			str2 = "TRIG_RELEASE"; break;
143 		case SOF_IPC_STREAM_TRIG_DRAIN:
144 			str2 = "TRIG_DRAIN"; break;
145 		case SOF_IPC_STREAM_TRIG_XRUN:
146 			str2 = "TRIG_XRUN"; break;
147 		case SOF_IPC_STREAM_POSITION:
148 			str2 = "POSITION"; break;
149 		case SOF_IPC_STREAM_VORBIS_PARAMS:
150 			str2 = "VORBIS_PARAMS"; break;
151 		case SOF_IPC_STREAM_VORBIS_FREE:
152 			str2 = "VORBIS_FREE"; break;
153 		default:
154 			str2 = "unknown type"; break;
155 		}
156 		break;
157 	case SOF_IPC_FW_READY:
158 		str = "FW_READY"; break;
159 	case SOF_IPC_GLB_DAI_MSG:
160 		str = "GLB_DAI_MSG";
161 		switch (type) {
162 		case SOF_IPC_DAI_CONFIG:
163 			str2 = "CONFIG"; break;
164 		case SOF_IPC_DAI_LOOPBACK:
165 			str2 = "LOOPBACK"; break;
166 		default:
167 			str2 = "unknown type"; break;
168 		}
169 		break;
170 	case SOF_IPC_GLB_TRACE_MSG:
171 		str = "GLB_TRACE_MSG"; break;
172 	case SOF_IPC_GLB_TEST_MSG:
173 		str = "GLB_TEST_MSG";
174 		switch (type) {
175 		case SOF_IPC_TEST_IPC_FLOOD:
176 			str2 = "IPC_FLOOD"; break;
177 		default:
178 			str2 = "unknown type"; break;
179 		}
180 		break;
181 	default:
182 		str = "unknown GLB command"; break;
183 	}
184 
185 	if (str2)
186 		dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
187 	else
188 		dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str);
189 }
190 #else
191 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
192 {
193 	if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG)
194 		dev_dbg(dev, "%s: 0x%x\n", text, cmd);
195 }
196 #endif
197 
198 /* wait for IPC message reply */
199 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg,
200 			void *reply_data)
201 {
202 	struct snd_sof_dev *sdev = ipc->sdev;
203 	struct sof_ipc_cmd_hdr *hdr = msg->msg_data;
204 	int ret;
205 
206 	/* wait for DSP IPC completion */
207 	ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
208 				 msecs_to_jiffies(sdev->ipc_timeout));
209 
210 	if (ret == 0) {
211 		dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n",
212 			hdr->cmd, hdr->size);
213 		snd_sof_handle_fw_exception(ipc->sdev);
214 		ret = -ETIMEDOUT;
215 	} else {
216 		/* copy the data returned from DSP */
217 		ret = msg->reply_error;
218 		if (msg->reply_size)
219 			memcpy(reply_data, msg->reply_data, msg->reply_size);
220 		if (ret < 0)
221 			dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n",
222 				hdr->cmd, msg->reply_size);
223 		else
224 			ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd);
225 	}
226 
227 	return ret;
228 }
229 
230 /* send IPC message from host to DSP */
231 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header,
232 				       void *msg_data, size_t msg_bytes,
233 				       void *reply_data, size_t reply_bytes)
234 {
235 	struct snd_sof_dev *sdev = ipc->sdev;
236 	struct snd_sof_ipc_msg *msg;
237 	int ret;
238 
239 	if (ipc->disable_ipc_tx)
240 		return -ENODEV;
241 
242 	/*
243 	 * The spin-lock is also still needed to protect message objects against
244 	 * other atomic contexts.
245 	 */
246 	spin_lock_irq(&sdev->ipc_lock);
247 
248 	/* initialise the message */
249 	msg = &ipc->msg;
250 
251 	msg->header = header;
252 	msg->msg_size = msg_bytes;
253 	msg->reply_size = reply_bytes;
254 	msg->reply_error = 0;
255 
256 	/* attach any data */
257 	if (msg_bytes)
258 		memcpy(msg->msg_data, msg_data, msg_bytes);
259 
260 	sdev->msg = msg;
261 
262 	ret = snd_sof_dsp_send_msg(sdev, msg);
263 	/* Next reply that we receive will be related to this message */
264 	if (!ret)
265 		msg->ipc_complete = false;
266 
267 	spin_unlock_irq(&sdev->ipc_lock);
268 
269 	if (ret < 0) {
270 		/* So far IPC TX never fails, consider making the above void */
271 		dev_err_ratelimited(sdev->dev,
272 				    "error: ipc tx failed with error %d\n",
273 				    ret);
274 		return ret;
275 	}
276 
277 	ipc_log_header(sdev->dev, "ipc tx", msg->header);
278 
279 	/* now wait for completion */
280 	if (!ret)
281 		ret = tx_wait_done(ipc, msg, reply_data);
282 
283 	return ret;
284 }
285 
286 /* send IPC message from host to DSP */
287 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
288 		       void *msg_data, size_t msg_bytes, void *reply_data,
289 		       size_t reply_bytes)
290 {
291 	int ret;
292 
293 	if (msg_bytes > SOF_IPC_MSG_MAX_SIZE ||
294 	    reply_bytes > SOF_IPC_MSG_MAX_SIZE)
295 		return -ENOBUFS;
296 
297 	/* Serialise IPC TX */
298 	mutex_lock(&ipc->tx_mutex);
299 
300 	ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes,
301 					  reply_data, reply_bytes);
302 
303 	mutex_unlock(&ipc->tx_mutex);
304 
305 	return ret;
306 }
307 EXPORT_SYMBOL(sof_ipc_tx_message);
308 
309 /* handle reply message from DSP */
310 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id)
311 {
312 	struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
313 
314 	if (msg->ipc_complete) {
315 		dev_err(sdev->dev, "error: no reply expected, received 0x%x",
316 			msg_id);
317 		return -EINVAL;
318 	}
319 
320 	/* wake up and return the error if we have waiters on this message ? */
321 	msg->ipc_complete = true;
322 	wake_up(&msg->waitq);
323 
324 	return 0;
325 }
326 EXPORT_SYMBOL(snd_sof_ipc_reply);
327 
328 /* DSP firmware has sent host a message  */
329 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
330 {
331 	struct sof_ipc_cmd_hdr hdr;
332 	u32 cmd, type;
333 	int err = 0;
334 
335 	/* read back header */
336 	snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr));
337 	ipc_log_header(sdev->dev, "ipc rx", hdr.cmd);
338 
339 	cmd = hdr.cmd & SOF_GLB_TYPE_MASK;
340 	type = hdr.cmd & SOF_CMD_TYPE_MASK;
341 
342 	/* check message type */
343 	switch (cmd) {
344 	case SOF_IPC_GLB_REPLY:
345 		dev_err(sdev->dev, "error: ipc reply unknown\n");
346 		break;
347 	case SOF_IPC_FW_READY:
348 		/* check for FW boot completion */
349 		if (!sdev->boot_complete) {
350 			err = sof_ops(sdev)->fw_ready(sdev, cmd);
351 			if (err < 0) {
352 				/*
353 				 * this indicates a mismatch in ABI
354 				 * between the driver and fw
355 				 */
356 				dev_err(sdev->dev, "error: ABI mismatch %d\n",
357 					err);
358 			} else {
359 				/* firmware boot completed OK */
360 				sdev->boot_complete = true;
361 			}
362 
363 			/* wake up firmware loader */
364 			wake_up(&sdev->boot_wait);
365 		}
366 		break;
367 	case SOF_IPC_GLB_COMPOUND:
368 	case SOF_IPC_GLB_TPLG_MSG:
369 	case SOF_IPC_GLB_PM_MSG:
370 	case SOF_IPC_GLB_COMP_MSG:
371 		break;
372 	case SOF_IPC_GLB_STREAM_MSG:
373 		/* need to pass msg id into the function */
374 		ipc_stream_message(sdev, hdr.cmd);
375 		break;
376 	case SOF_IPC_GLB_TRACE_MSG:
377 		ipc_trace_message(sdev, type);
378 		break;
379 	default:
380 		dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd);
381 		break;
382 	}
383 
384 	ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd);
385 }
386 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx);
387 
388 /*
389  * IPC trace mechanism.
390  */
391 
392 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id)
393 {
394 	struct sof_ipc_dma_trace_posn posn;
395 
396 	switch (msg_id) {
397 	case SOF_IPC_TRACE_DMA_POSITION:
398 		/* read back full message */
399 		snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn));
400 		snd_sof_trace_update_pos(sdev, &posn);
401 		break;
402 	default:
403 		dev_err(sdev->dev, "error: unhandled trace message %x\n",
404 			msg_id);
405 		break;
406 	}
407 }
408 
409 /*
410  * IPC stream position.
411  */
412 
413 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
414 {
415 	struct snd_sof_pcm_stream *stream;
416 	struct sof_ipc_stream_posn posn;
417 	struct snd_sof_pcm *spcm;
418 	int direction;
419 
420 	spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction);
421 	if (!spcm) {
422 		dev_err(sdev->dev,
423 			"error: period elapsed for unknown stream, msg_id %d\n",
424 			msg_id);
425 		return;
426 	}
427 
428 	stream = &spcm->stream[direction];
429 	snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
430 
431 	dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
432 		posn.host_posn, posn.dai_posn, posn.wallclock);
433 
434 	memcpy(&stream->posn, &posn, sizeof(posn));
435 
436 	/* only inform ALSA for period_wakeup mode */
437 	if (!stream->substream->runtime->no_period_wakeup)
438 		snd_sof_pcm_period_elapsed(stream->substream);
439 }
440 
441 /* DSP notifies host of an XRUN within FW */
442 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id)
443 {
444 	struct snd_sof_pcm_stream *stream;
445 	struct sof_ipc_stream_posn posn;
446 	struct snd_sof_pcm *spcm;
447 	int direction;
448 
449 	spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction);
450 	if (!spcm) {
451 		dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n",
452 			msg_id);
453 		return;
454 	}
455 
456 	stream = &spcm->stream[direction];
457 	snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
458 
459 	dev_dbg(sdev->dev,  "posn XRUN: host %llx comp %d size %d\n",
460 		posn.host_posn, posn.xrun_comp_id, posn.xrun_size);
461 
462 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
463 	/* stop PCM on XRUN - used for pipeline debug */
464 	memcpy(&stream->posn, &posn, sizeof(posn));
465 	snd_pcm_stop_xrun(stream->substream);
466 #endif
467 }
468 
469 /* stream notifications from DSP FW */
470 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd)
471 {
472 	/* get msg cmd type and msd id */
473 	u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK;
474 	u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd);
475 
476 	switch (msg_type) {
477 	case SOF_IPC_STREAM_POSITION:
478 		ipc_period_elapsed(sdev, msg_id);
479 		break;
480 	case SOF_IPC_STREAM_TRIG_XRUN:
481 		ipc_xrun(sdev, msg_id);
482 		break;
483 	default:
484 		dev_err(sdev->dev, "error: unhandled stream message %x\n",
485 			msg_id);
486 		break;
487 	}
488 }
489 
490 /* get stream position IPC - use faster MMIO method if available on platform */
491 int snd_sof_ipc_stream_posn(struct snd_sof_dev *sdev,
492 			    struct snd_sof_pcm *spcm, int direction,
493 			    struct sof_ipc_stream_posn *posn)
494 {
495 	struct sof_ipc_stream stream;
496 	int err;
497 
498 	/* read position via slower IPC */
499 	stream.hdr.size = sizeof(stream);
500 	stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION;
501 	stream.comp_id = spcm->stream[direction].comp_id;
502 
503 	/* send IPC to the DSP */
504 	err = sof_ipc_tx_message(sdev->ipc,
505 				 stream.hdr.cmd, &stream, sizeof(stream), &posn,
506 				 sizeof(*posn));
507 	if (err < 0) {
508 		dev_err(sdev->dev, "error: failed to get stream %d position\n",
509 			stream.comp_id);
510 		return err;
511 	}
512 
513 	return 0;
514 }
515 EXPORT_SYMBOL(snd_sof_ipc_stream_posn);
516 
517 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,
518 				    struct sof_ipc_ctrl_data *src,
519 				    struct sof_ipc_ctrl_data *dst,
520 				    struct sof_ipc_ctrl_data_params *sparams)
521 {
522 	switch (ctrl_type) {
523 	case SOF_CTRL_TYPE_VALUE_CHAN_GET:
524 	case SOF_CTRL_TYPE_VALUE_CHAN_SET:
525 		sparams->src = (u8 *)src->chanv;
526 		sparams->dst = (u8 *)dst->chanv;
527 		break;
528 	case SOF_CTRL_TYPE_VALUE_COMP_GET:
529 	case SOF_CTRL_TYPE_VALUE_COMP_SET:
530 		sparams->src = (u8 *)src->compv;
531 		sparams->dst = (u8 *)dst->compv;
532 		break;
533 	case SOF_CTRL_TYPE_DATA_GET:
534 	case SOF_CTRL_TYPE_DATA_SET:
535 		sparams->src = (u8 *)src->data->data;
536 		sparams->dst = (u8 *)dst->data->data;
537 		break;
538 	default:
539 		return -EINVAL;
540 	}
541 
542 	/* calculate payload size and number of messages */
543 	sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes;
544 	sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size);
545 
546 	return 0;
547 }
548 
549 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev,
550 				       struct sof_ipc_ctrl_data *cdata,
551 				       struct sof_ipc_ctrl_data_params *sparams,
552 				       bool send)
553 {
554 	struct sof_ipc_ctrl_data *partdata;
555 	size_t send_bytes;
556 	size_t offset = 0;
557 	size_t msg_bytes;
558 	size_t pl_size;
559 	int err;
560 	int i;
561 
562 	/* allocate max ipc size because we have at least one */
563 	partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
564 	if (!partdata)
565 		return -ENOMEM;
566 
567 	if (send)
568 		err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata,
569 					       sparams);
570 	else
571 		err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata,
572 					       sparams);
573 	if (err < 0) {
574 		kfree(partdata);
575 		return err;
576 	}
577 
578 	msg_bytes = sparams->msg_bytes;
579 	pl_size = sparams->pl_size;
580 
581 	/* copy the header data */
582 	memcpy(partdata, cdata, sparams->hdr_bytes);
583 
584 	/* Serialise IPC TX */
585 	mutex_lock(&sdev->ipc->tx_mutex);
586 
587 	/* copy the payload data in a loop */
588 	for (i = 0; i < sparams->num_msg; i++) {
589 		send_bytes = min(msg_bytes, pl_size);
590 		partdata->num_elems = send_bytes;
591 		partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes;
592 		partdata->msg_index = i;
593 		msg_bytes -= send_bytes;
594 		partdata->elems_remaining = msg_bytes;
595 
596 		if (send)
597 			memcpy(sparams->dst, sparams->src + offset, send_bytes);
598 
599 		err = sof_ipc_tx_message_unlocked(sdev->ipc,
600 						  partdata->rhdr.hdr.cmd,
601 						  partdata,
602 						  partdata->rhdr.hdr.size,
603 						  partdata,
604 						  partdata->rhdr.hdr.size);
605 		if (err < 0)
606 			break;
607 
608 		if (!send)
609 			memcpy(sparams->dst + offset, sparams->src, send_bytes);
610 
611 		offset += pl_size;
612 	}
613 
614 	mutex_unlock(&sdev->ipc->tx_mutex);
615 
616 	kfree(partdata);
617 	return err;
618 }
619 
620 /*
621  * IPC get()/set() for kcontrols.
622  */
623 int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc *ipc,
624 				  struct snd_sof_control *scontrol,
625 				  u32 ipc_cmd,
626 				  enum sof_ipc_ctrl_type ctrl_type,
627 				  enum sof_ipc_ctrl_cmd ctrl_cmd,
628 				  bool send)
629 {
630 	struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
631 	struct snd_sof_dev *sdev = ipc->sdev;
632 	struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
633 	struct sof_ipc_fw_version *v = &ready->version;
634 	struct sof_ipc_ctrl_data_params sparams;
635 	size_t send_bytes;
636 	int err;
637 
638 	/* read or write firmware volume */
639 	if (scontrol->readback_offset != 0) {
640 		/* write/read value header via mmaped region */
641 		send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) *
642 		cdata->num_elems;
643 		if (send)
644 			snd_sof_dsp_block_write(sdev, sdev->mmio_bar,
645 						scontrol->readback_offset,
646 						cdata->chanv, send_bytes);
647 
648 		else
649 			snd_sof_dsp_block_read(sdev, sdev->mmio_bar,
650 					       scontrol->readback_offset,
651 					       cdata->chanv, send_bytes);
652 		return 0;
653 	}
654 
655 	cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd;
656 	cdata->cmd = ctrl_cmd;
657 	cdata->type = ctrl_type;
658 	cdata->comp_id = scontrol->comp_id;
659 	cdata->msg_index = 0;
660 
661 	/* calculate header and data size */
662 	switch (cdata->type) {
663 	case SOF_CTRL_TYPE_VALUE_CHAN_GET:
664 	case SOF_CTRL_TYPE_VALUE_CHAN_SET:
665 		sparams.msg_bytes = scontrol->num_channels *
666 			sizeof(struct sof_ipc_ctrl_value_chan);
667 		sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
668 		sparams.elems = scontrol->num_channels;
669 		break;
670 	case SOF_CTRL_TYPE_VALUE_COMP_GET:
671 	case SOF_CTRL_TYPE_VALUE_COMP_SET:
672 		sparams.msg_bytes = scontrol->num_channels *
673 			sizeof(struct sof_ipc_ctrl_value_comp);
674 		sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
675 		sparams.elems = scontrol->num_channels;
676 		break;
677 	case SOF_CTRL_TYPE_DATA_GET:
678 	case SOF_CTRL_TYPE_DATA_SET:
679 		sparams.msg_bytes = cdata->data->size;
680 		sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) +
681 			sizeof(struct sof_abi_hdr);
682 		sparams.elems = cdata->data->size;
683 		break;
684 	default:
685 		return -EINVAL;
686 	}
687 
688 	cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes;
689 	cdata->num_elems = sparams.elems;
690 	cdata->elems_remaining = 0;
691 
692 	/* send normal size ipc in one part */
693 	if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) {
694 		err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata,
695 					 cdata->rhdr.hdr.size, cdata,
696 					 cdata->rhdr.hdr.size);
697 
698 		if (err < 0)
699 			dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n",
700 				cdata->comp_id);
701 
702 		return err;
703 	}
704 
705 	/* data is bigger than max ipc size, chop into smaller pieces */
706 	dev_dbg(sdev->dev, "large ipc size %u, control size %u\n",
707 		cdata->rhdr.hdr.size, scontrol->size);
708 
709 	/* large messages is only supported from ABI 3.3.0 onwards */
710 	if (v->abi_version < SOF_ABI_VER(3, 3, 0)) {
711 		dev_err(sdev->dev, "error: incompatible FW ABI version\n");
712 		return -EINVAL;
713 	}
714 
715 	err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send);
716 
717 	if (err < 0)
718 		dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n",
719 			cdata->comp_id);
720 
721 	return err;
722 }
723 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data);
724 
725 /*
726  * IPC layer enumeration.
727  */
728 
729 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox,
730 			     size_t dspbox_size, u32 hostbox,
731 			     size_t hostbox_size)
732 {
733 	sdev->dsp_box.offset = dspbox;
734 	sdev->dsp_box.size = dspbox_size;
735 	sdev->host_box.offset = hostbox;
736 	sdev->host_box.size = hostbox_size;
737 	return 0;
738 }
739 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init);
740 
741 int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
742 {
743 	struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
744 	struct sof_ipc_fw_version *v = &ready->version;
745 
746 	dev_info(sdev->dev,
747 		 "Firmware info: version %d:%d:%d-%s\n",  v->major, v->minor,
748 		 v->micro, v->tag);
749 	dev_info(sdev->dev,
750 		 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
751 		 SOF_ABI_VERSION_MAJOR(v->abi_version),
752 		 SOF_ABI_VERSION_MINOR(v->abi_version),
753 		 SOF_ABI_VERSION_PATCH(v->abi_version),
754 		 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH);
755 
756 	if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) {
757 		dev_err(sdev->dev, "error: incompatible FW ABI version\n");
758 		return -EINVAL;
759 	}
760 
761 	if (v->abi_version > SOF_ABI_VERSION) {
762 		if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) {
763 			dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n");
764 		} else {
765 			dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n");
766 			return -EINVAL;
767 		}
768 	}
769 
770 	if (ready->flags & SOF_IPC_INFO_BUILD) {
771 		dev_info(sdev->dev,
772 			 "Firmware debug build %d on %s-%s - options:\n"
773 			 " GDB: %s\n"
774 			 " lock debug: %s\n"
775 			 " lock vdebug: %s\n",
776 			 v->build, v->date, v->time,
777 			 (ready->flags & SOF_IPC_INFO_GDB) ?
778 				"enabled" : "disabled",
779 			 (ready->flags & SOF_IPC_INFO_LOCKS) ?
780 				"enabled" : "disabled",
781 			 (ready->flags & SOF_IPC_INFO_LOCKSV) ?
782 				"enabled" : "disabled");
783 	}
784 
785 	/* copy the fw_version into debugfs at first boot */
786 	memcpy(&sdev->fw_version, v, sizeof(*v));
787 
788 	return 0;
789 }
790 EXPORT_SYMBOL(snd_sof_ipc_valid);
791 
792 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev)
793 {
794 	struct snd_sof_ipc *ipc;
795 	struct snd_sof_ipc_msg *msg;
796 
797 	ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL);
798 	if (!ipc)
799 		return NULL;
800 
801 	mutex_init(&ipc->tx_mutex);
802 	ipc->sdev = sdev;
803 	msg = &ipc->msg;
804 
805 	/* indicate that we aren't sending a message ATM */
806 	msg->ipc_complete = true;
807 
808 	/* pre-allocate message data */
809 	msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
810 				     GFP_KERNEL);
811 	if (!msg->msg_data)
812 		return NULL;
813 
814 	msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE,
815 				       GFP_KERNEL);
816 	if (!msg->reply_data)
817 		return NULL;
818 
819 	init_waitqueue_head(&msg->waitq);
820 
821 	return ipc;
822 }
823 EXPORT_SYMBOL(snd_sof_ipc_init);
824 
825 void snd_sof_ipc_free(struct snd_sof_dev *sdev)
826 {
827 	struct snd_sof_ipc *ipc = sdev->ipc;
828 
829 	if (!ipc)
830 		return;
831 
832 	/* disable sending of ipc's */
833 	mutex_lock(&ipc->tx_mutex);
834 	ipc->disable_ipc_tx = true;
835 	mutex_unlock(&ipc->tx_mutex);
836 }
837 EXPORT_SYMBOL(snd_sof_ipc_free);
838