1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // 10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided 11 // by platform driver code. 12 // 13 14 #include <linux/mutex.h> 15 #include <linux/types.h> 16 17 #include "sof-priv.h" 18 #include "ops.h" 19 20 /* 21 * IPC message default size and timeout (ms). 22 * TODO: allow platforms to set size and timeout. 23 */ 24 #define IPC_TIMEOUT_MS 300 25 26 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id); 27 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd); 28 29 /* 30 * IPC message Tx/Rx message handling. 31 */ 32 33 /* SOF generic IPC data */ 34 struct snd_sof_ipc { 35 struct snd_sof_dev *sdev; 36 37 /* protects messages and the disable flag */ 38 struct mutex tx_mutex; 39 /* disables further sending of ipc's */ 40 bool disable_ipc_tx; 41 42 struct snd_sof_ipc_msg msg; 43 }; 44 45 struct sof_ipc_ctrl_data_params { 46 size_t msg_bytes; 47 size_t hdr_bytes; 48 size_t pl_size; 49 size_t elems; 50 u32 num_msg; 51 u8 *src; 52 u8 *dst; 53 }; 54 55 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 56 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 57 { 58 u8 *str; 59 u8 *str2 = NULL; 60 u32 glb; 61 u32 type; 62 63 glb = cmd & SOF_GLB_TYPE_MASK; 64 type = cmd & SOF_CMD_TYPE_MASK; 65 66 switch (glb) { 67 case SOF_IPC_GLB_REPLY: 68 str = "GLB_REPLY"; break; 69 case SOF_IPC_GLB_COMPOUND: 70 str = "GLB_COMPOUND"; break; 71 case SOF_IPC_GLB_TPLG_MSG: 72 str = "GLB_TPLG_MSG"; 73 switch (type) { 74 case SOF_IPC_TPLG_COMP_NEW: 75 str2 = "COMP_NEW"; break; 76 case SOF_IPC_TPLG_COMP_FREE: 77 str2 = "COMP_FREE"; break; 78 case SOF_IPC_TPLG_COMP_CONNECT: 79 str2 = "COMP_CONNECT"; break; 80 case SOF_IPC_TPLG_PIPE_NEW: 81 str2 = "PIPE_NEW"; break; 82 case SOF_IPC_TPLG_PIPE_FREE: 83 str2 = "PIPE_FREE"; break; 84 case SOF_IPC_TPLG_PIPE_CONNECT: 85 str2 = "PIPE_CONNECT"; break; 86 case SOF_IPC_TPLG_PIPE_COMPLETE: 87 str2 = "PIPE_COMPLETE"; break; 88 case SOF_IPC_TPLG_BUFFER_NEW: 89 str2 = "BUFFER_NEW"; break; 90 case SOF_IPC_TPLG_BUFFER_FREE: 91 str2 = "BUFFER_FREE"; break; 92 default: 93 str2 = "unknown type"; break; 94 } 95 break; 96 case SOF_IPC_GLB_PM_MSG: 97 str = "GLB_PM_MSG"; 98 switch (type) { 99 case SOF_IPC_PM_CTX_SAVE: 100 str2 = "CTX_SAVE"; break; 101 case SOF_IPC_PM_CTX_RESTORE: 102 str2 = "CTX_RESTORE"; break; 103 case SOF_IPC_PM_CTX_SIZE: 104 str2 = "CTX_SIZE"; break; 105 case SOF_IPC_PM_CLK_SET: 106 str2 = "CLK_SET"; break; 107 case SOF_IPC_PM_CLK_GET: 108 str2 = "CLK_GET"; break; 109 case SOF_IPC_PM_CLK_REQ: 110 str2 = "CLK_REQ"; break; 111 case SOF_IPC_PM_CORE_ENABLE: 112 str2 = "CORE_ENABLE"; break; 113 default: 114 str2 = "unknown type"; break; 115 } 116 break; 117 case SOF_IPC_GLB_COMP_MSG: 118 str = "GLB_COMP_MSG: SET_VALUE"; 119 switch (type) { 120 case SOF_IPC_COMP_SET_VALUE: 121 str2 = "SET_VALUE"; break; 122 case SOF_IPC_COMP_GET_VALUE: 123 str2 = "GET_VALUE"; break; 124 case SOF_IPC_COMP_SET_DATA: 125 str2 = "SET_DATA"; break; 126 case SOF_IPC_COMP_GET_DATA: 127 str2 = "GET_DATA"; break; 128 default: 129 str2 = "unknown type"; break; 130 } 131 break; 132 case SOF_IPC_GLB_STREAM_MSG: 133 str = "GLB_STREAM_MSG"; 134 switch (type) { 135 case SOF_IPC_STREAM_PCM_PARAMS: 136 str2 = "PCM_PARAMS"; break; 137 case SOF_IPC_STREAM_PCM_PARAMS_REPLY: 138 str2 = "PCM_REPLY"; break; 139 case SOF_IPC_STREAM_PCM_FREE: 140 str2 = "PCM_FREE"; break; 141 case SOF_IPC_STREAM_TRIG_START: 142 str2 = "TRIG_START"; break; 143 case SOF_IPC_STREAM_TRIG_STOP: 144 str2 = "TRIG_STOP"; break; 145 case SOF_IPC_STREAM_TRIG_PAUSE: 146 str2 = "TRIG_PAUSE"; break; 147 case SOF_IPC_STREAM_TRIG_RELEASE: 148 str2 = "TRIG_RELEASE"; break; 149 case SOF_IPC_STREAM_TRIG_DRAIN: 150 str2 = "TRIG_DRAIN"; break; 151 case SOF_IPC_STREAM_TRIG_XRUN: 152 str2 = "TRIG_XRUN"; break; 153 case SOF_IPC_STREAM_POSITION: 154 str2 = "POSITION"; break; 155 case SOF_IPC_STREAM_VORBIS_PARAMS: 156 str2 = "VORBIS_PARAMS"; break; 157 case SOF_IPC_STREAM_VORBIS_FREE: 158 str2 = "VORBIS_FREE"; break; 159 default: 160 str2 = "unknown type"; break; 161 } 162 break; 163 case SOF_IPC_FW_READY: 164 str = "FW_READY"; break; 165 case SOF_IPC_GLB_DAI_MSG: 166 str = "GLB_DAI_MSG"; 167 switch (type) { 168 case SOF_IPC_DAI_CONFIG: 169 str2 = "CONFIG"; break; 170 case SOF_IPC_DAI_LOOPBACK: 171 str2 = "LOOPBACK"; break; 172 default: 173 str2 = "unknown type"; break; 174 } 175 break; 176 case SOF_IPC_GLB_TRACE_MSG: 177 str = "GLB_TRACE_MSG"; break; 178 default: 179 str = "unknown GLB command"; break; 180 } 181 182 if (str2) 183 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 184 else 185 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str); 186 } 187 #else 188 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 189 { 190 dev_dbg(dev, "%s: 0x%x\n", text, cmd); 191 } 192 #endif 193 194 /* wait for IPC message reply */ 195 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg, 196 void *reply_data) 197 { 198 struct snd_sof_dev *sdev = ipc->sdev; 199 struct sof_ipc_cmd_hdr *hdr = msg->msg_data; 200 int ret; 201 202 /* wait for DSP IPC completion */ 203 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 204 msecs_to_jiffies(IPC_TIMEOUT_MS)); 205 206 if (ret == 0) { 207 dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n", 208 hdr->cmd, hdr->size); 209 snd_sof_dsp_dbg_dump(ipc->sdev, SOF_DBG_REGS | SOF_DBG_MBOX); 210 snd_sof_ipc_dump(ipc->sdev); 211 snd_sof_trace_notify_for_error(ipc->sdev); 212 ret = -ETIMEDOUT; 213 } else { 214 /* copy the data returned from DSP */ 215 ret = msg->reply_error; 216 if (msg->reply_size) 217 memcpy(reply_data, msg->reply_data, msg->reply_size); 218 if (ret < 0) 219 dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n", 220 hdr->cmd, msg->reply_size); 221 else 222 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd); 223 } 224 225 return ret; 226 } 227 228 /* send IPC message from host to DSP */ 229 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header, 230 void *msg_data, size_t msg_bytes, 231 void *reply_data, size_t reply_bytes) 232 { 233 struct snd_sof_dev *sdev = ipc->sdev; 234 struct snd_sof_ipc_msg *msg; 235 int ret; 236 237 if (ipc->disable_ipc_tx) 238 return -ENODEV; 239 240 /* 241 * The spin-lock is also still needed to protect message objects against 242 * other atomic contexts. 243 */ 244 spin_lock_irq(&sdev->ipc_lock); 245 246 /* initialise the message */ 247 msg = &ipc->msg; 248 249 msg->header = header; 250 msg->msg_size = msg_bytes; 251 msg->reply_size = reply_bytes; 252 msg->reply_error = 0; 253 254 /* attach any data */ 255 if (msg_bytes) 256 memcpy(msg->msg_data, msg_data, msg_bytes); 257 258 sdev->msg = msg; 259 260 ret = snd_sof_dsp_send_msg(sdev, msg); 261 /* Next reply that we receive will be related to this message */ 262 if (!ret) 263 msg->ipc_complete = false; 264 265 spin_unlock_irq(&sdev->ipc_lock); 266 267 if (ret < 0) { 268 /* So far IPC TX never fails, consider making the above void */ 269 dev_err_ratelimited(sdev->dev, 270 "error: ipc tx failed with error %d\n", 271 ret); 272 return ret; 273 } 274 275 ipc_log_header(sdev->dev, "ipc tx", msg->header); 276 277 /* now wait for completion */ 278 if (!ret) 279 ret = tx_wait_done(ipc, msg, reply_data); 280 281 return ret; 282 } 283 284 /* send IPC message from host to DSP */ 285 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 286 void *msg_data, size_t msg_bytes, void *reply_data, 287 size_t reply_bytes) 288 { 289 int ret; 290 291 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE || 292 reply_bytes > SOF_IPC_MSG_MAX_SIZE) 293 return -ENOBUFS; 294 295 /* Serialise IPC TX */ 296 mutex_lock(&ipc->tx_mutex); 297 298 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes, 299 reply_data, reply_bytes); 300 301 mutex_unlock(&ipc->tx_mutex); 302 303 return ret; 304 } 305 EXPORT_SYMBOL(sof_ipc_tx_message); 306 307 /* handle reply message from DSP */ 308 int snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id) 309 { 310 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 311 unsigned long flags; 312 313 /* 314 * Protect against a theoretical race with sof_ipc_tx_message(): if the 315 * DSP is fast enough to receive an IPC message, reply to it, and the 316 * host interrupt processing calls this function on a different core 317 * from the one, where the sending is taking place, the message might 318 * not yet be marked as expecting a reply. 319 */ 320 spin_lock_irqsave(&sdev->ipc_lock, flags); 321 322 if (msg->ipc_complete) { 323 spin_unlock_irqrestore(&sdev->ipc_lock, flags); 324 dev_err(sdev->dev, "error: no reply expected, received 0x%x", 325 msg_id); 326 return -EINVAL; 327 } 328 329 /* wake up and return the error if we have waiters on this message ? */ 330 msg->ipc_complete = true; 331 wake_up(&msg->waitq); 332 333 spin_unlock_irqrestore(&sdev->ipc_lock, flags); 334 335 return 0; 336 } 337 EXPORT_SYMBOL(snd_sof_ipc_reply); 338 339 /* DSP firmware has sent host a message */ 340 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 341 { 342 struct sof_ipc_cmd_hdr hdr; 343 u32 cmd, type; 344 int err = 0; 345 346 /* read back header */ 347 snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); 348 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd); 349 350 cmd = hdr.cmd & SOF_GLB_TYPE_MASK; 351 type = hdr.cmd & SOF_CMD_TYPE_MASK; 352 353 /* check message type */ 354 switch (cmd) { 355 case SOF_IPC_GLB_REPLY: 356 dev_err(sdev->dev, "error: ipc reply unknown\n"); 357 break; 358 case SOF_IPC_FW_READY: 359 /* check for FW boot completion */ 360 if (!sdev->boot_complete) { 361 err = sof_ops(sdev)->fw_ready(sdev, cmd); 362 if (err < 0) { 363 /* 364 * this indicates a mismatch in ABI 365 * between the driver and fw 366 */ 367 dev_err(sdev->dev, "error: ABI mismatch %d\n", 368 err); 369 } else { 370 /* firmware boot completed OK */ 371 sdev->boot_complete = true; 372 } 373 374 /* wake up firmware loader */ 375 wake_up(&sdev->boot_wait); 376 } 377 break; 378 case SOF_IPC_GLB_COMPOUND: 379 case SOF_IPC_GLB_TPLG_MSG: 380 case SOF_IPC_GLB_PM_MSG: 381 case SOF_IPC_GLB_COMP_MSG: 382 break; 383 case SOF_IPC_GLB_STREAM_MSG: 384 /* need to pass msg id into the function */ 385 ipc_stream_message(sdev, hdr.cmd); 386 break; 387 case SOF_IPC_GLB_TRACE_MSG: 388 ipc_trace_message(sdev, type); 389 break; 390 default: 391 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd); 392 break; 393 } 394 395 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd); 396 } 397 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx); 398 399 /* 400 * IPC trace mechanism. 401 */ 402 403 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id) 404 { 405 struct sof_ipc_dma_trace_posn posn; 406 407 switch (msg_id) { 408 case SOF_IPC_TRACE_DMA_POSITION: 409 /* read back full message */ 410 snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn)); 411 snd_sof_trace_update_pos(sdev, &posn); 412 break; 413 default: 414 dev_err(sdev->dev, "error: unhandled trace message %x\n", 415 msg_id); 416 break; 417 } 418 } 419 420 /* 421 * IPC stream position. 422 */ 423 424 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id) 425 { 426 struct snd_sof_pcm_stream *stream; 427 struct sof_ipc_stream_posn posn; 428 struct snd_sof_pcm *spcm; 429 int direction; 430 431 spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction); 432 if (!spcm) { 433 dev_err(sdev->dev, 434 "error: period elapsed for unknown stream, msg_id %d\n", 435 msg_id); 436 return; 437 } 438 439 stream = &spcm->stream[direction]; 440 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 441 442 dev_dbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n", 443 posn.host_posn, posn.dai_posn, posn.wallclock); 444 445 memcpy(&stream->posn, &posn, sizeof(posn)); 446 447 /* only inform ALSA for period_wakeup mode */ 448 if (!stream->substream->runtime->no_period_wakeup) 449 snd_sof_pcm_period_elapsed(stream->substream); 450 } 451 452 /* DSP notifies host of an XRUN within FW */ 453 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id) 454 { 455 struct snd_sof_pcm_stream *stream; 456 struct sof_ipc_stream_posn posn; 457 struct snd_sof_pcm *spcm; 458 int direction; 459 460 spcm = snd_sof_find_spcm_comp(sdev, msg_id, &direction); 461 if (!spcm) { 462 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n", 463 msg_id); 464 return; 465 } 466 467 stream = &spcm->stream[direction]; 468 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 469 470 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n", 471 posn.host_posn, posn.xrun_comp_id, posn.xrun_size); 472 473 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP) 474 /* stop PCM on XRUN - used for pipeline debug */ 475 memcpy(&stream->posn, &posn, sizeof(posn)); 476 snd_pcm_stop_xrun(stream->substream); 477 #endif 478 } 479 480 /* stream notifications from DSP FW */ 481 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd) 482 { 483 /* get msg cmd type and msd id */ 484 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK; 485 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd); 486 487 switch (msg_type) { 488 case SOF_IPC_STREAM_POSITION: 489 ipc_period_elapsed(sdev, msg_id); 490 break; 491 case SOF_IPC_STREAM_TRIG_XRUN: 492 ipc_xrun(sdev, msg_id); 493 break; 494 default: 495 dev_err(sdev->dev, "error: unhandled stream message %x\n", 496 msg_id); 497 break; 498 } 499 } 500 501 /* get stream position IPC - use faster MMIO method if available on platform */ 502 int snd_sof_ipc_stream_posn(struct snd_sof_dev *sdev, 503 struct snd_sof_pcm *spcm, int direction, 504 struct sof_ipc_stream_posn *posn) 505 { 506 struct sof_ipc_stream stream; 507 int err; 508 509 /* read position via slower IPC */ 510 stream.hdr.size = sizeof(stream); 511 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION; 512 stream.comp_id = spcm->stream[direction].comp_id; 513 514 /* send IPC to the DSP */ 515 err = sof_ipc_tx_message(sdev->ipc, 516 stream.hdr.cmd, &stream, sizeof(stream), &posn, 517 sizeof(*posn)); 518 if (err < 0) { 519 dev_err(sdev->dev, "error: failed to get stream %d position\n", 520 stream.comp_id); 521 return err; 522 } 523 524 return 0; 525 } 526 EXPORT_SYMBOL(snd_sof_ipc_stream_posn); 527 528 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type, 529 struct sof_ipc_ctrl_data *src, 530 struct sof_ipc_ctrl_data *dst, 531 struct sof_ipc_ctrl_data_params *sparams) 532 { 533 switch (ctrl_type) { 534 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 535 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 536 sparams->src = (u8 *)src->chanv; 537 sparams->dst = (u8 *)dst->chanv; 538 break; 539 case SOF_CTRL_TYPE_VALUE_COMP_GET: 540 case SOF_CTRL_TYPE_VALUE_COMP_SET: 541 sparams->src = (u8 *)src->compv; 542 sparams->dst = (u8 *)dst->compv; 543 break; 544 case SOF_CTRL_TYPE_DATA_GET: 545 case SOF_CTRL_TYPE_DATA_SET: 546 sparams->src = (u8 *)src->data->data; 547 sparams->dst = (u8 *)dst->data->data; 548 break; 549 default: 550 return -EINVAL; 551 } 552 553 /* calculate payload size and number of messages */ 554 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes; 555 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size); 556 557 return 0; 558 } 559 560 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev, 561 struct sof_ipc_ctrl_data *cdata, 562 struct sof_ipc_ctrl_data_params *sparams, 563 bool send) 564 { 565 struct sof_ipc_ctrl_data *partdata; 566 size_t send_bytes; 567 size_t offset = 0; 568 size_t msg_bytes; 569 size_t pl_size; 570 int err; 571 int i; 572 573 /* allocate max ipc size because we have at least one */ 574 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 575 if (!partdata) 576 return -ENOMEM; 577 578 if (send) 579 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata, 580 sparams); 581 else 582 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 583 sparams); 584 if (err < 0) 585 return err; 586 587 msg_bytes = sparams->msg_bytes; 588 pl_size = sparams->pl_size; 589 590 /* copy the header data */ 591 memcpy(partdata, cdata, sparams->hdr_bytes); 592 593 /* Serialise IPC TX */ 594 mutex_lock(&sdev->ipc->tx_mutex); 595 596 /* copy the payload data in a loop */ 597 for (i = 0; i < sparams->num_msg; i++) { 598 send_bytes = min(msg_bytes, pl_size); 599 partdata->num_elems = send_bytes; 600 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes; 601 partdata->msg_index = i; 602 msg_bytes -= send_bytes; 603 partdata->elems_remaining = msg_bytes; 604 605 if (send) 606 memcpy(sparams->dst, sparams->src + offset, send_bytes); 607 608 err = sof_ipc_tx_message_unlocked(sdev->ipc, 609 partdata->rhdr.hdr.cmd, 610 partdata, 611 partdata->rhdr.hdr.size, 612 partdata, 613 partdata->rhdr.hdr.size); 614 if (err < 0) 615 break; 616 617 if (!send) 618 memcpy(sparams->dst + offset, sparams->src, send_bytes); 619 620 offset += pl_size; 621 } 622 623 mutex_unlock(&sdev->ipc->tx_mutex); 624 625 kfree(partdata); 626 return err; 627 } 628 629 /* 630 * IPC get()/set() for kcontrols. 631 */ 632 int snd_sof_ipc_set_get_comp_data(struct snd_sof_ipc *ipc, 633 struct snd_sof_control *scontrol, 634 u32 ipc_cmd, 635 enum sof_ipc_ctrl_type ctrl_type, 636 enum sof_ipc_ctrl_cmd ctrl_cmd, 637 bool send) 638 { 639 struct sof_ipc_ctrl_data *cdata = scontrol->control_data; 640 struct snd_sof_dev *sdev = ipc->sdev; 641 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 642 struct sof_ipc_fw_version *v = &ready->version; 643 struct sof_ipc_ctrl_data_params sparams; 644 size_t send_bytes; 645 int err; 646 647 /* read or write firmware volume */ 648 if (scontrol->readback_offset != 0) { 649 /* write/read value header via mmaped region */ 650 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) * 651 cdata->num_elems; 652 if (send) 653 snd_sof_dsp_block_write(sdev, sdev->mmio_bar, 654 scontrol->readback_offset, 655 cdata->chanv, send_bytes); 656 657 else 658 snd_sof_dsp_block_read(sdev, sdev->mmio_bar, 659 scontrol->readback_offset, 660 cdata->chanv, send_bytes); 661 return 0; 662 } 663 664 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd; 665 cdata->cmd = ctrl_cmd; 666 cdata->type = ctrl_type; 667 cdata->comp_id = scontrol->comp_id; 668 cdata->msg_index = 0; 669 670 /* calculate header and data size */ 671 switch (cdata->type) { 672 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 673 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 674 sparams.msg_bytes = scontrol->num_channels * 675 sizeof(struct sof_ipc_ctrl_value_chan); 676 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 677 sparams.elems = scontrol->num_channels; 678 break; 679 case SOF_CTRL_TYPE_VALUE_COMP_GET: 680 case SOF_CTRL_TYPE_VALUE_COMP_SET: 681 sparams.msg_bytes = scontrol->num_channels * 682 sizeof(struct sof_ipc_ctrl_value_comp); 683 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 684 sparams.elems = scontrol->num_channels; 685 break; 686 case SOF_CTRL_TYPE_DATA_GET: 687 case SOF_CTRL_TYPE_DATA_SET: 688 sparams.msg_bytes = cdata->data->size; 689 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + 690 sizeof(struct sof_abi_hdr); 691 sparams.elems = cdata->data->size; 692 break; 693 default: 694 return -EINVAL; 695 } 696 697 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes; 698 cdata->num_elems = sparams.elems; 699 cdata->elems_remaining = 0; 700 701 /* send normal size ipc in one part */ 702 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) { 703 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata, 704 cdata->rhdr.hdr.size, cdata, 705 cdata->rhdr.hdr.size); 706 707 if (err < 0) 708 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n", 709 cdata->comp_id); 710 711 return err; 712 } 713 714 /* data is bigger than max ipc size, chop into smaller pieces */ 715 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n", 716 cdata->rhdr.hdr.size, scontrol->size); 717 718 /* large messages is only supported from ABI 3.3.0 onwards */ 719 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { 720 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 721 return -EINVAL; 722 } 723 724 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send); 725 726 if (err < 0) 727 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n", 728 cdata->comp_id); 729 730 return err; 731 } 732 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data); 733 734 /* 735 * IPC layer enumeration. 736 */ 737 738 int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 739 size_t dspbox_size, u32 hostbox, 740 size_t hostbox_size) 741 { 742 sdev->dsp_box.offset = dspbox; 743 sdev->dsp_box.size = dspbox_size; 744 sdev->host_box.offset = hostbox; 745 sdev->host_box.size = hostbox_size; 746 return 0; 747 } 748 EXPORT_SYMBOL(snd_sof_dsp_mailbox_init); 749 750 int snd_sof_ipc_valid(struct snd_sof_dev *sdev) 751 { 752 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 753 struct sof_ipc_fw_version *v = &ready->version; 754 755 dev_info(sdev->dev, 756 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, 757 v->micro, v->tag); 758 dev_info(sdev->dev, 759 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n", 760 SOF_ABI_VERSION_MAJOR(v->abi_version), 761 SOF_ABI_VERSION_MINOR(v->abi_version), 762 SOF_ABI_VERSION_PATCH(v->abi_version), 763 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH); 764 765 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { 766 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 767 return -EINVAL; 768 } 769 770 if (v->abi_version > SOF_ABI_VERSION) { 771 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) { 772 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n"); 773 } else { 774 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n"); 775 return -EINVAL; 776 } 777 } 778 779 if (ready->debug.bits.build) { 780 dev_info(sdev->dev, 781 "Firmware debug build %d on %s-%s - options:\n" 782 " GDB: %s\n" 783 " lock debug: %s\n" 784 " lock vdebug: %s\n", 785 v->build, v->date, v->time, 786 ready->debug.bits.gdb ? "enabled" : "disabled", 787 ready->debug.bits.locks ? "enabled" : "disabled", 788 ready->debug.bits.locks_verbose ? "enabled" : "disabled"); 789 } 790 791 /* copy the fw_version into debugfs at first boot */ 792 memcpy(&sdev->fw_version, v, sizeof(*v)); 793 794 return 0; 795 } 796 EXPORT_SYMBOL(snd_sof_ipc_valid); 797 798 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev) 799 { 800 struct snd_sof_ipc *ipc; 801 struct snd_sof_ipc_msg *msg; 802 803 /* check if mandatory ops required for ipc are defined */ 804 if (!sof_ops(sdev)->fw_ready) { 805 dev_err(sdev->dev, "error: ipc mandatory ops not defined\n"); 806 return NULL; 807 } 808 809 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL); 810 if (!ipc) 811 return NULL; 812 813 mutex_init(&ipc->tx_mutex); 814 ipc->sdev = sdev; 815 msg = &ipc->msg; 816 817 /* indicate that we aren't sending a message ATM */ 818 msg->ipc_complete = true; 819 820 /* pre-allocate message data */ 821 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 822 GFP_KERNEL); 823 if (!msg->msg_data) 824 return NULL; 825 826 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 827 GFP_KERNEL); 828 if (!msg->reply_data) 829 return NULL; 830 831 init_waitqueue_head(&msg->waitq); 832 833 return ipc; 834 } 835 EXPORT_SYMBOL(snd_sof_ipc_init); 836 837 void snd_sof_ipc_free(struct snd_sof_dev *sdev) 838 { 839 struct snd_sof_ipc *ipc = sdev->ipc; 840 841 /* disable sending of ipc's */ 842 mutex_lock(&ipc->tx_mutex); 843 ipc->disable_ipc_tx = true; 844 mutex_unlock(&ipc->tx_mutex); 845 } 846 EXPORT_SYMBOL(snd_sof_ipc_free); 847