1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018-2022 Intel Corporation. All rights reserved. 7 // 8 9 /* 10 * Hardware interface for audio DSP on Skylake and Kabylake. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/firmware.h> 17 #include <linux/fs.h> 18 #include <linux/interrupt.h> 19 #include <linux/module.h> 20 #include <linux/slab.h> 21 #include <linux/pci.h> 22 #include <linux/pm_runtime.h> 23 #include <sound/hdaudio_ext.h> 24 #include <sound/pcm_params.h> 25 #include <sound/sof.h> 26 27 #include "../sof-priv.h" 28 #include "../ops.h" 29 #include "hda.h" 30 #include "../sof-audio.h" 31 32 #define SRAM_MEMORY_WINDOW_BASE 0x8000 33 34 static const __maybe_unused struct snd_sof_debugfs_map skl_dsp_debugfs[] = { 35 {"hda", HDA_DSP_HDA_BAR, 0, 0x4000}, 36 {"pp", HDA_DSP_PP_BAR, 0, 0x1000}, 37 {"dsp", HDA_DSP_BAR, 0, 0x10000}, 38 }; 39 40 static int __maybe_unused skl_dsp_ipc_get_window_offset(struct snd_sof_dev *sdev, u32 id) 41 { 42 return SRAM_MEMORY_WINDOW_BASE + (0x2000 * id); 43 } 44 45 /* skylake ops */ 46 struct snd_sof_dsp_ops sof_skl_ops = { 47 /* 48 * the ops are left empty at this stage since the SOF releases do not 49 * support SKL/KBL. 50 * The ops will be populated when support for the Intel IPC4 is added 51 * to the SOF driver 52 */ 53 }; 54 EXPORT_SYMBOL(sof_skl_ops); 55 56 const struct sof_intel_dsp_desc skl_chip_info = { 57 .cores_num = 2, 58 .init_core_mask = 1, 59 .host_managed_cores_mask = GENMASK(1, 0), 60 .ipc_req = HDA_DSP_REG_HIPCI, 61 .ipc_req_mask = HDA_DSP_REG_HIPCI_BUSY, 62 .ipc_ack = HDA_DSP_REG_HIPCIE, 63 .ipc_ack_mask = HDA_DSP_REG_HIPCIE_DONE, 64 .ipc_ctl = HDA_DSP_REG_HIPCCTL, 65 .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS_SKL, 66 .rom_init_timeout = 300, 67 .check_ipc_irq = hda_dsp_check_ipc_irq, 68 .hw_ip_version = SOF_INTEL_CAVS_1_5, 69 }; 70 EXPORT_SYMBOL_NS(skl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON); 71