1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/acpi.h> 22 #include <linux/module.h> 23 #include <linux/soundwire/sdw.h> 24 #include <linux/soundwire/sdw_intel.h> 25 #include <sound/intel-nhlt.h> 26 #include <sound/sof.h> 27 #include <sound/sof/xtensa.h> 28 #include "../sof-audio.h" 29 #include "../ops.h" 30 #include "hda.h" 31 32 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 33 #include <sound/soc-acpi-intel-match.h> 34 #endif 35 36 /* platform specific devices */ 37 #include "shim.h" 38 39 #define EXCEPT_MAX_HDR_SIZE 0x400 40 41 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 42 43 /* 44 * The default for SoundWire clock stop quirks is to power gate the IP 45 * and do a Bus Reset, this will need to be modified when the DSP 46 * needs to remain in D0i3 so that the Master does not lose context 47 * and enumeration is not required on clock restart 48 */ 49 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; 50 module_param(sdw_clock_stop_quirks, int, 0444); 51 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); 52 53 static int sdw_params_stream(struct device *dev, 54 struct sdw_intel_stream_params_data *params_data) 55 { 56 struct snd_sof_dev *sdev = dev_get_drvdata(dev); 57 struct snd_soc_dai *d = params_data->dai; 58 struct sof_ipc_dai_config config; 59 struct sof_ipc_reply reply; 60 int link_id = params_data->link_id; 61 int alh_stream_id = params_data->alh_stream_id; 62 int ret; 63 u32 size = sizeof(config); 64 65 memset(&config, 0, size); 66 config.hdr.size = size; 67 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG; 68 config.type = SOF_DAI_INTEL_ALH; 69 config.dai_index = (link_id << 8) | (d->id); 70 config.alh.stream_id = alh_stream_id; 71 72 /* send message to DSP */ 73 ret = sof_ipc_tx_message(sdev->ipc, 74 config.hdr.cmd, &config, size, &reply, 75 sizeof(reply)); 76 if (ret < 0) { 77 dev_err(sdev->dev, 78 "error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n", 79 link_id, d->id, alh_stream_id); 80 } 81 82 return ret; 83 } 84 85 static int sdw_free_stream(struct device *dev, 86 struct sdw_intel_stream_free_data *free_data) 87 { 88 struct snd_sof_dev *sdev = dev_get_drvdata(dev); 89 struct snd_soc_dai *d = free_data->dai; 90 struct sof_ipc_dai_config config; 91 struct sof_ipc_reply reply; 92 int link_id = free_data->link_id; 93 int ret; 94 u32 size = sizeof(config); 95 96 memset(&config, 0, size); 97 config.hdr.size = size; 98 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG; 99 config.type = SOF_DAI_INTEL_ALH; 100 config.dai_index = (link_id << 8) | d->id; 101 config.alh.stream_id = 0xFFFF; /* invalid value on purpose */ 102 103 /* send message to DSP */ 104 ret = sof_ipc_tx_message(sdev->ipc, 105 config.hdr.cmd, &config, size, &reply, 106 sizeof(reply)); 107 if (ret < 0) { 108 dev_err(sdev->dev, 109 "error: failed to free stream for link %d dai->id %d\n", 110 link_id, d->id); 111 } 112 113 return ret; 114 } 115 116 static const struct sdw_intel_ops sdw_callback = { 117 .params_stream = sdw_params_stream, 118 .free_stream = sdw_free_stream, 119 }; 120 121 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) 122 { 123 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable); 124 } 125 126 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 127 { 128 struct sof_intel_hda_dev *hdev; 129 acpi_handle handle; 130 int ret; 131 132 handle = ACPI_HANDLE(sdev->dev); 133 134 /* save ACPI info for the probe step */ 135 hdev = sdev->pdata->hw_pdata; 136 137 ret = sdw_intel_acpi_scan(handle, &hdev->info); 138 if (ret < 0) 139 return -EINVAL; 140 141 return 0; 142 } 143 144 static int hda_sdw_probe(struct snd_sof_dev *sdev) 145 { 146 struct sof_intel_hda_dev *hdev; 147 struct sdw_intel_res res; 148 void *sdw; 149 150 hdev = sdev->pdata->hw_pdata; 151 152 memset(&res, 0, sizeof(res)); 153 154 res.mmio_base = sdev->bar[HDA_DSP_BAR]; 155 res.irq = sdev->ipc_irq; 156 res.handle = hdev->info.handle; 157 res.parent = sdev->dev; 158 res.ops = &sdw_callback; 159 res.dev = sdev->dev; 160 res.clock_stop_quirks = sdw_clock_stop_quirks; 161 162 /* 163 * ops and arg fields are not populated for now, 164 * they will be needed when the DAI callbacks are 165 * provided 166 */ 167 168 /* we could filter links here if needed, e.g for quirks */ 169 res.count = hdev->info.count; 170 res.link_mask = hdev->info.link_mask; 171 172 sdw = sdw_intel_probe(&res); 173 if (!sdw) { 174 dev_err(sdev->dev, "error: SoundWire probe failed\n"); 175 return -EINVAL; 176 } 177 178 /* save context */ 179 hdev->sdw = sdw; 180 181 return 0; 182 } 183 184 int hda_sdw_startup(struct snd_sof_dev *sdev) 185 { 186 struct sof_intel_hda_dev *hdev; 187 188 hdev = sdev->pdata->hw_pdata; 189 190 if (!hdev->sdw) 191 return 0; 192 193 return sdw_intel_startup(hdev->sdw); 194 } 195 196 static int hda_sdw_exit(struct snd_sof_dev *sdev) 197 { 198 struct sof_intel_hda_dev *hdev; 199 200 hdev = sdev->pdata->hw_pdata; 201 202 hda_sdw_int_enable(sdev, false); 203 204 if (hdev->sdw) 205 sdw_intel_exit(hdev->sdw); 206 hdev->sdw = NULL; 207 208 return 0; 209 } 210 211 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 212 { 213 struct sof_intel_hda_dev *hdev; 214 bool ret = false; 215 u32 irq_status; 216 217 hdev = sdev->pdata->hw_pdata; 218 219 if (!hdev->sdw) 220 return ret; 221 222 /* store status */ 223 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); 224 225 /* invalid message ? */ 226 if (irq_status == 0xffffffff) 227 goto out; 228 229 /* SDW message ? */ 230 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW) 231 ret = true; 232 233 out: 234 return ret; 235 } 236 237 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 238 { 239 return sdw_intel_thread(irq, context); 240 } 241 242 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 243 { 244 struct sof_intel_hda_dev *hdev; 245 246 hdev = sdev->pdata->hw_pdata; 247 if (hdev->sdw && 248 snd_sof_dsp_read(sdev, HDA_DSP_BAR, 249 HDA_DSP_REG_SNDW_WAKE_STS)) 250 return true; 251 252 return false; 253 } 254 255 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) 256 { 257 struct sof_intel_hda_dev *hdev; 258 259 hdev = sdev->pdata->hw_pdata; 260 if (!hdev->sdw) 261 return; 262 263 sdw_intel_process_wakeen_event(hdev->sdw); 264 } 265 266 #endif 267 268 /* 269 * Debug 270 */ 271 272 struct hda_dsp_msg_code { 273 u32 code; 274 const char *msg; 275 }; 276 277 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI); 278 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 279 module_param_named(use_msi, hda_use_msi, bool, 0444); 280 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 281 #endif 282 283 static char *hda_model; 284 module_param(hda_model, charp, 0444); 285 MODULE_PARM_DESC(hda_model, "Use the given HDA board model."); 286 287 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 288 static int hda_dmic_num = -1; 289 module_param_named(dmic_num, hda_dmic_num, int, 0444); 290 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 291 292 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI); 293 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); 294 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver"); 295 #endif 296 297 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = { 298 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"}, 299 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"}, 300 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"}, 301 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 302 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 303 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 304 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 305 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 306 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 307 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 308 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 309 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 310 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 311 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 312 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 313 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 314 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 315 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 316 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 317 }; 318 319 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev) 320 { 321 u32 status; 322 int i; 323 324 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 325 HDA_ADSP_FW_STATUS_SKL); 326 327 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 328 if (status == hda_dsp_rom_msg[i].code) { 329 dev_err(sdev->dev, "%s - code %8.8x\n", 330 hda_dsp_rom_msg[i].msg, status); 331 return; 332 } 333 } 334 335 /* not for us, must be generic sof message */ 336 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 337 } 338 339 static void hda_dsp_get_status(struct snd_sof_dev *sdev) 340 { 341 u32 status; 342 int i; 343 344 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 345 HDA_DSP_SRAM_REG_ROM_STATUS); 346 347 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 348 if (status == hda_dsp_rom_msg[i].code) { 349 dev_err(sdev->dev, "%s - code %8.8x\n", 350 hda_dsp_rom_msg[i].msg, status); 351 return; 352 } 353 } 354 355 /* not for us, must be generic sof message */ 356 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 357 } 358 359 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 360 struct sof_ipc_dsp_oops_xtensa *xoops, 361 struct sof_ipc_panic_info *panic_info, 362 u32 *stack, size_t stack_words) 363 { 364 u32 offset = sdev->dsp_oops_offset; 365 366 /* first read registers */ 367 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 368 369 /* note: variable AR register array is not read */ 370 371 /* then get panic info */ 372 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 373 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 374 xoops->arch_hdr.totalsize); 375 return; 376 } 377 offset += xoops->arch_hdr.totalsize; 378 sof_block_read(sdev, sdev->mmio_bar, offset, 379 panic_info, sizeof(*panic_info)); 380 381 /* then get the stack */ 382 offset += sizeof(*panic_info); 383 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 384 stack_words * sizeof(u32)); 385 } 386 387 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags) 388 { 389 struct sof_ipc_dsp_oops_xtensa xoops; 390 struct sof_ipc_panic_info panic_info; 391 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 392 u32 status, panic; 393 394 /* try APL specific status message types first */ 395 hda_dsp_get_status_skl(sdev); 396 397 /* now try generic SOF status messages */ 398 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 399 HDA_ADSP_ERROR_CODE_SKL); 400 401 /*TODO: Check: there is no define in spec, but it is used in the code*/ 402 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 403 HDA_ADSP_ERROR_CODE_SKL + 0x4); 404 405 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 406 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 407 HDA_DSP_STACK_DUMP_SIZE); 408 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 409 stack, HDA_DSP_STACK_DUMP_SIZE); 410 } else { 411 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 412 status, panic); 413 hda_dsp_get_status_skl(sdev); 414 } 415 } 416 417 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 418 { 419 struct sof_ipc_dsp_oops_xtensa xoops; 420 struct sof_ipc_panic_info panic_info; 421 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 422 u32 status, panic; 423 424 /* try APL specific status message types first */ 425 hda_dsp_get_status(sdev); 426 427 /* now try generic SOF status messages */ 428 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 429 HDA_DSP_SRAM_REG_FW_STATUS); 430 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 431 432 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 433 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 434 HDA_DSP_STACK_DUMP_SIZE); 435 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 436 stack, HDA_DSP_STACK_DUMP_SIZE); 437 } else { 438 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 439 status, panic); 440 hda_dsp_get_status(sdev); 441 } 442 } 443 444 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 445 { 446 struct hdac_bus *bus = sof_to_bus(sdev); 447 u32 adspis; 448 u32 intsts; 449 u32 intctl; 450 u32 ppsts; 451 u8 rirbsts; 452 453 /* read key IRQ stats and config registers */ 454 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 455 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 456 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 457 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 458 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 459 460 dev_err(sdev->dev, 461 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 462 intsts, intctl, rirbsts); 463 dev_err(sdev->dev, 464 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", 465 ppsts, adspis); 466 } 467 468 void hda_ipc_dump(struct snd_sof_dev *sdev) 469 { 470 u32 hipcie; 471 u32 hipct; 472 u32 hipcctl; 473 474 hda_ipc_irq_dump(sdev); 475 476 /* read IPC status */ 477 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 478 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 479 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 480 481 /* dump the IPC regs */ 482 /* TODO: parse the raw msg */ 483 dev_err(sdev->dev, 484 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 485 hipcie, hipct, hipcctl); 486 } 487 488 static int hda_init(struct snd_sof_dev *sdev) 489 { 490 struct hda_bus *hbus; 491 struct hdac_bus *bus; 492 struct pci_dev *pci = to_pci_dev(sdev->dev); 493 int ret; 494 495 hbus = sof_to_hbus(sdev); 496 bus = sof_to_bus(sdev); 497 498 /* HDA bus init */ 499 sof_hda_bus_init(bus, &pci->dev); 500 501 bus->use_posbuf = 1; 502 bus->bdl_pos_adj = 0; 503 bus->sync_write = 1; 504 505 mutex_init(&hbus->prepare_mutex); 506 hbus->pci = pci; 507 hbus->mixer_assigned = -1; 508 hbus->modelname = hda_model; 509 510 /* initialise hdac bus */ 511 bus->addr = pci_resource_start(pci, 0); 512 #if IS_ENABLED(CONFIG_PCI) 513 bus->remap_addr = pci_ioremap_bar(pci, 0); 514 #endif 515 if (!bus->remap_addr) { 516 dev_err(bus->dev, "error: ioremap error\n"); 517 return -ENXIO; 518 } 519 520 /* HDA base */ 521 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 522 523 /* init i915 and HDMI codecs */ 524 ret = hda_codec_i915_init(sdev); 525 if (ret < 0) 526 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n"); 527 528 /* get controller capabilities */ 529 ret = hda_dsp_ctrl_get_caps(sdev); 530 if (ret < 0) 531 dev_err(sdev->dev, "error: get caps error\n"); 532 533 return ret; 534 } 535 536 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 537 538 static int check_nhlt_dmic(struct snd_sof_dev *sdev) 539 { 540 struct nhlt_acpi_table *nhlt; 541 int dmic_num; 542 543 nhlt = intel_nhlt_init(sdev->dev); 544 if (nhlt) { 545 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 546 intel_nhlt_free(nhlt); 547 if (dmic_num == 2 || dmic_num == 4) 548 return dmic_num; 549 } 550 551 return 0; 552 } 553 554 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 555 const char *sof_tplg_filename, 556 const char *idisp_str, 557 const char *dmic_str) 558 { 559 const char *tplg_filename = NULL; 560 char *filename; 561 char *split_ext; 562 563 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL); 564 if (!filename) 565 return NULL; 566 567 /* this assumes a .tplg extension */ 568 split_ext = strsep(&filename, "."); 569 if (split_ext) { 570 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 571 "%s%s%s.tplg", 572 split_ext, idisp_str, dmic_str); 573 if (!tplg_filename) 574 return NULL; 575 } 576 return tplg_filename; 577 } 578 579 #endif 580 581 static int hda_init_caps(struct snd_sof_dev *sdev) 582 { 583 struct hdac_bus *bus = sof_to_bus(sdev); 584 struct snd_sof_pdata *pdata = sdev->pdata; 585 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 586 struct hdac_ext_link *hlink; 587 #endif 588 struct sof_intel_hda_dev *hdev = pdata->hw_pdata; 589 u32 link_mask; 590 int ret = 0; 591 592 device_disable_async_suspend(bus->dev); 593 594 /* check if dsp is there */ 595 if (bus->ppcap) 596 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 597 598 /* Init HDA controller after i915 init */ 599 ret = hda_dsp_ctrl_init_chip(sdev, true); 600 if (ret < 0) { 601 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 602 ret); 603 return ret; 604 } 605 606 /* scan SoundWire capabilities exposed by DSDT */ 607 ret = hda_sdw_acpi_scan(sdev); 608 if (ret < 0) { 609 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n"); 610 goto skip_soundwire; 611 } 612 613 link_mask = hdev->info.link_mask; 614 if (!link_mask) { 615 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n"); 616 goto skip_soundwire; 617 } 618 619 /* 620 * probe/allocate SoundWire resources. 621 * The hardware configuration takes place in hda_sdw_startup 622 * after power rails are enabled. 623 * It's entirely possible to have a mix of I2S/DMIC/SoundWire 624 * devices, so we allocate the resources in all cases. 625 */ 626 ret = hda_sdw_probe(sdev); 627 if (ret < 0) { 628 dev_err(sdev->dev, "error: SoundWire probe error\n"); 629 return ret; 630 } 631 632 skip_soundwire: 633 634 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 635 if (bus->mlcap) 636 snd_hdac_ext_bus_get_ml_capabilities(bus); 637 638 /* create codec instances */ 639 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi); 640 641 if (!HDA_IDISP_CODEC(bus->codec_mask)) 642 hda_codec_i915_display_power(sdev, false); 643 644 /* 645 * we are done probing so decrement link counts 646 */ 647 list_for_each_entry(hlink, &bus->hlink_list, list) 648 snd_hdac_ext_bus_link_put(bus, hlink); 649 #endif 650 return 0; 651 } 652 653 static const struct sof_intel_dsp_desc 654 *get_chip_info(struct snd_sof_pdata *pdata) 655 { 656 const struct sof_dev_desc *desc = pdata->desc; 657 const struct sof_intel_dsp_desc *chip_info; 658 659 chip_info = desc->chip_info; 660 661 return chip_info; 662 } 663 664 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 665 { 666 struct snd_sof_dev *sdev = context; 667 668 /* 669 * Get global interrupt status. It includes all hardware interrupt 670 * sources in the Intel HD Audio controller. 671 */ 672 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 673 SOF_HDA_INTSTS_GIS) { 674 675 /* disable GIE interrupt */ 676 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 677 SOF_HDA_INTCTL, 678 SOF_HDA_INT_GLOBAL_EN, 679 0); 680 681 return IRQ_WAKE_THREAD; 682 } 683 684 return IRQ_NONE; 685 } 686 687 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 688 { 689 struct snd_sof_dev *sdev = context; 690 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 691 692 /* deal with streams and controller first */ 693 if (hda_dsp_check_stream_irq(sdev)) 694 hda_dsp_stream_threaded_handler(irq, sdev); 695 696 if (hda_dsp_check_ipc_irq(sdev)) 697 sof_ops(sdev)->irq_thread(irq, sdev); 698 699 if (hda_dsp_check_sdw_irq(sdev)) 700 hda_dsp_sdw_thread(irq, hdev->sdw); 701 702 if (hda_sdw_check_wakeen_irq(sdev)) 703 hda_sdw_process_wakeen(sdev); 704 705 /* enable GIE interrupt */ 706 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 707 SOF_HDA_INTCTL, 708 SOF_HDA_INT_GLOBAL_EN, 709 SOF_HDA_INT_GLOBAL_EN); 710 711 return IRQ_HANDLED; 712 } 713 714 int hda_dsp_probe(struct snd_sof_dev *sdev) 715 { 716 struct pci_dev *pci = to_pci_dev(sdev->dev); 717 struct sof_intel_hda_dev *hdev; 718 struct hdac_bus *bus; 719 const struct sof_intel_dsp_desc *chip; 720 int ret = 0; 721 722 /* 723 * detect DSP by checking class/subclass/prog-id information 724 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 725 * class=04 subclass 01 prog-if 00: DSP is present 726 * (and may be required e.g. for DMIC or SSP support) 727 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 728 */ 729 if (pci->class == 0x040300) { 730 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 731 return -ENODEV; 732 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 733 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 734 return -ENODEV; 735 } 736 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 737 738 chip = get_chip_info(sdev->pdata); 739 if (!chip) { 740 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 741 pci->device); 742 ret = -EIO; 743 goto err; 744 } 745 746 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 747 if (!hdev) 748 return -ENOMEM; 749 sdev->pdata->hw_pdata = hdev; 750 hdev->desc = chip; 751 752 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 753 PLATFORM_DEVID_NONE, 754 NULL, 0); 755 if (IS_ERR(hdev->dmic_dev)) { 756 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 757 return PTR_ERR(hdev->dmic_dev); 758 } 759 760 /* 761 * use position update IPC if either it is forced 762 * or we don't have other choice 763 */ 764 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 765 hdev->no_ipc_position = 0; 766 #else 767 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 768 #endif 769 770 /* set up HDA base */ 771 bus = sof_to_bus(sdev); 772 ret = hda_init(sdev); 773 if (ret < 0) 774 goto hdac_bus_unmap; 775 776 /* DSP base */ 777 #if IS_ENABLED(CONFIG_PCI) 778 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 779 #endif 780 if (!sdev->bar[HDA_DSP_BAR]) { 781 dev_err(sdev->dev, "error: ioremap error\n"); 782 ret = -ENXIO; 783 goto hdac_bus_unmap; 784 } 785 786 sdev->mmio_bar = HDA_DSP_BAR; 787 sdev->mailbox_bar = HDA_DSP_BAR; 788 789 /* allow 64bit DMA address if supported by H/W */ 790 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) { 791 dev_dbg(sdev->dev, "DMA mask is 64 bit\n"); 792 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64)); 793 } else { 794 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 795 dma_set_mask(&pci->dev, DMA_BIT_MASK(32)); 796 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)); 797 } 798 799 /* init streams */ 800 ret = hda_dsp_stream_init(sdev); 801 if (ret < 0) { 802 dev_err(sdev->dev, "error: failed to init streams\n"); 803 /* 804 * not all errors are due to memory issues, but trying 805 * to free everything does not harm 806 */ 807 goto free_streams; 808 } 809 810 /* 811 * register our IRQ 812 * let's try to enable msi firstly 813 * if it fails, use legacy interrupt mode 814 * TODO: support msi multiple vectors 815 */ 816 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 817 dev_info(sdev->dev, "use msi interrupt mode\n"); 818 sdev->ipc_irq = pci_irq_vector(pci, 0); 819 /* initialised to "false" by kzalloc() */ 820 sdev->msi_enabled = true; 821 } 822 823 if (!sdev->msi_enabled) { 824 dev_info(sdev->dev, "use legacy interrupt mode\n"); 825 /* 826 * in IO-APIC mode, hda->irq and ipc_irq are using the same 827 * irq number of pci->irq 828 */ 829 sdev->ipc_irq = pci->irq; 830 } 831 832 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 833 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 834 hda_dsp_interrupt_thread, 835 IRQF_SHARED, "AudioDSP", sdev); 836 if (ret < 0) { 837 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 838 sdev->ipc_irq); 839 goto free_irq_vector; 840 } 841 842 pci_set_master(pci); 843 synchronize_irq(pci->irq); 844 845 /* 846 * clear TCSEL to clear playback on some HD Audio 847 * codecs. PCI TCSEL is defined in the Intel manuals. 848 */ 849 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 850 851 /* init HDA capabilities */ 852 ret = hda_init_caps(sdev); 853 if (ret < 0) 854 goto free_ipc_irq; 855 856 /* enable ppcap interrupt */ 857 hda_dsp_ctrl_ppcap_enable(sdev, true); 858 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 859 860 /* set default mailbox offset for FW ready message */ 861 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 862 863 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work); 864 865 return 0; 866 867 free_ipc_irq: 868 free_irq(sdev->ipc_irq, sdev); 869 free_irq_vector: 870 if (sdev->msi_enabled) 871 pci_free_irq_vectors(pci); 872 free_streams: 873 hda_dsp_stream_free(sdev); 874 /* dsp_unmap: not currently used */ 875 iounmap(sdev->bar[HDA_DSP_BAR]); 876 hdac_bus_unmap: 877 iounmap(bus->remap_addr); 878 hda_codec_i915_exit(sdev); 879 err: 880 return ret; 881 } 882 883 int hda_dsp_remove(struct snd_sof_dev *sdev) 884 { 885 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 886 struct hdac_bus *bus = sof_to_bus(sdev); 887 struct pci_dev *pci = to_pci_dev(sdev->dev); 888 const struct sof_intel_dsp_desc *chip = hda->desc; 889 890 /* cancel any attempt for DSP D0I3 */ 891 cancel_delayed_work_sync(&hda->d0i3_work); 892 893 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 894 /* codec removal, invoke bus_device_remove */ 895 snd_hdac_ext_bus_device_remove(bus); 896 #endif 897 898 hda_sdw_exit(sdev); 899 900 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 901 platform_device_unregister(hda->dmic_dev); 902 903 /* disable DSP IRQ */ 904 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 905 SOF_HDA_PPCTL_PIE, 0); 906 907 /* disable CIE and GIE interrupts */ 908 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 909 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 910 911 /* disable cores */ 912 if (chip) 913 hda_dsp_core_reset_power_down(sdev, chip->cores_mask); 914 915 /* disable DSP */ 916 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 917 SOF_HDA_PPCTL_GPROCEN, 0); 918 919 free_irq(sdev->ipc_irq, sdev); 920 if (sdev->msi_enabled) 921 pci_free_irq_vectors(pci); 922 923 hda_dsp_stream_free(sdev); 924 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 925 snd_hdac_link_free_all(bus); 926 #endif 927 928 iounmap(sdev->bar[HDA_DSP_BAR]); 929 iounmap(bus->remap_addr); 930 931 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 932 snd_hdac_ext_bus_exit(bus); 933 #endif 934 hda_codec_i915_exit(sdev); 935 936 return 0; 937 } 938 939 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 940 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 941 { 942 struct hdac_bus *bus = sof_to_bus(sdev); 943 struct snd_soc_acpi_mach_params *mach_params; 944 struct snd_soc_acpi_mach *hda_mach; 945 struct snd_sof_pdata *pdata = sdev->pdata; 946 const char *tplg_filename; 947 const char *idisp_str; 948 const char *dmic_str; 949 int dmic_num = 0; 950 int codec_num = 0; 951 int i; 952 953 /* codec detection */ 954 if (!bus->codec_mask) { 955 dev_info(bus->dev, "no hda codecs found!\n"); 956 } else { 957 dev_info(bus->dev, "hda codecs found, mask %lx\n", 958 bus->codec_mask); 959 960 for (i = 0; i < HDA_MAX_CODECS; i++) { 961 if (bus->codec_mask & (1 << i)) 962 codec_num++; 963 } 964 965 /* 966 * If no machine driver is found, then: 967 * 968 * generic hda machine driver can handle: 969 * - one HDMI codec, and/or 970 * - one external HDAudio codec 971 */ 972 if (!pdata->machine && codec_num <= 2) { 973 hda_mach = snd_soc_acpi_intel_hda_machines; 974 975 /* topology: use the info from hda_machines */ 976 pdata->tplg_filename = 977 hda_mach->sof_tplg_filename; 978 979 dev_info(bus->dev, "using HDA machine driver %s now\n", 980 hda_mach->drv_name); 981 982 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask)) 983 idisp_str = "-idisp"; 984 else 985 idisp_str = ""; 986 987 /* first check NHLT for DMICs */ 988 dmic_num = check_nhlt_dmic(sdev); 989 990 /* allow for module parameter override */ 991 if (hda_dmic_num != -1) 992 dmic_num = hda_dmic_num; 993 994 switch (dmic_num) { 995 case 2: 996 dmic_str = "-2ch"; 997 break; 998 case 4: 999 dmic_str = "-4ch"; 1000 break; 1001 default: 1002 dmic_num = 0; 1003 dmic_str = ""; 1004 break; 1005 } 1006 1007 tplg_filename = pdata->tplg_filename; 1008 tplg_filename = fixup_tplg_name(sdev, tplg_filename, 1009 idisp_str, dmic_str); 1010 if (!tplg_filename) 1011 return -EINVAL; 1012 1013 dev_info(bus->dev, 1014 "DMICs detected in NHLT tables: %d\n", 1015 dmic_num); 1016 1017 pdata->machine = hda_mach; 1018 pdata->tplg_filename = tplg_filename; 1019 } 1020 } 1021 1022 /* used by hda machine driver to create dai links */ 1023 if (pdata->machine) { 1024 mach_params = (struct snd_soc_acpi_mach_params *) 1025 &pdata->machine->mach_params; 1026 mach_params->codec_mask = bus->codec_mask; 1027 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi; 1028 mach_params->dmic_num = dmic_num; 1029 } 1030 1031 return 0; 1032 } 1033 #else 1034 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 1035 { 1036 return 0; 1037 } 1038 #endif 1039 1040 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 1041 /* Check if all Slaves defined on the link can be found */ 1042 static bool link_slaves_found(struct snd_sof_dev *sdev, 1043 const struct snd_soc_acpi_link_adr *link, 1044 struct sdw_intel_ctx *sdw) 1045 { 1046 struct hdac_bus *bus = sof_to_bus(sdev); 1047 struct sdw_intel_slave_id *ids = sdw->ids; 1048 int num_slaves = sdw->num_slaves; 1049 unsigned int part_id, link_id, unique_id, mfg_id; 1050 int i, j; 1051 1052 for (i = 0; i < link->num_adr; i++) { 1053 u64 adr = link->adr_d[i].adr; 1054 1055 mfg_id = SDW_MFG_ID(adr); 1056 part_id = SDW_PART_ID(adr); 1057 link_id = SDW_DISCO_LINK_ID(adr); 1058 for (j = 0; j < num_slaves; j++) { 1059 if (ids[j].link_id != link_id || 1060 ids[j].id.part_id != part_id || 1061 ids[j].id.mfg_id != mfg_id) 1062 continue; 1063 /* 1064 * we have to check unique id 1065 * if there is more than one 1066 * Slave on the link 1067 */ 1068 unique_id = SDW_UNIQUE_ID(adr); 1069 if (link->num_adr == 1 || 1070 ids[j].id.unique_id == SDW_IGNORED_UNIQUE_ID || 1071 ids[j].id.unique_id == unique_id) { 1072 dev_dbg(bus->dev, 1073 "found %x at link %d\n", 1074 part_id, link_id); 1075 break; 1076 } 1077 } 1078 if (j == num_slaves) { 1079 dev_dbg(bus->dev, 1080 "Slave %x not found\n", 1081 part_id); 1082 return false; 1083 } 1084 } 1085 return true; 1086 } 1087 1088 static int hda_sdw_machine_select(struct snd_sof_dev *sdev) 1089 { 1090 struct snd_sof_pdata *pdata = sdev->pdata; 1091 const struct snd_soc_acpi_link_adr *link; 1092 struct hdac_bus *bus = sof_to_bus(sdev); 1093 struct snd_soc_acpi_mach *mach; 1094 struct sof_intel_hda_dev *hdev; 1095 u32 link_mask; 1096 int i; 1097 1098 hdev = pdata->hw_pdata; 1099 link_mask = hdev->info.link_mask; 1100 1101 /* 1102 * Select SoundWire machine driver if needed using the 1103 * alternate tables. This case deals with SoundWire-only 1104 * machines, for mixed cases with I2C/I2S the detection relies 1105 * on the HID list. 1106 */ 1107 if (link_mask && !pdata->machine) { 1108 for (mach = pdata->desc->alt_machines; 1109 mach && mach->link_mask; mach++) { 1110 /* 1111 * On some platforms such as Up Extreme all links 1112 * are enabled but only one link can be used by 1113 * external codec. Instead of exact match of two masks, 1114 * first check whether link_mask of mach is subset of 1115 * link_mask supported by hw and then go on searching 1116 * link_adr 1117 */ 1118 if (~link_mask & mach->link_mask) 1119 continue; 1120 1121 /* No need to match adr if there is no links defined */ 1122 if (!mach->links) 1123 break; 1124 1125 link = mach->links; 1126 for (i = 0; i < hdev->info.count && link->num_adr; 1127 i++, link++) { 1128 /* 1129 * Try next machine if any expected Slaves 1130 * are not found on this link. 1131 */ 1132 if (!link_slaves_found(sdev, link, hdev->sdw)) 1133 break; 1134 } 1135 /* Found if all Slaves are checked */ 1136 if (i == hdev->info.count || !link->num_adr) 1137 break; 1138 } 1139 if (mach && mach->link_mask) { 1140 dev_dbg(bus->dev, 1141 "SoundWire machine driver %s topology %s\n", 1142 mach->drv_name, 1143 mach->sof_tplg_filename); 1144 pdata->machine = mach; 1145 mach->mach_params.links = mach->links; 1146 mach->mach_params.link_mask = mach->link_mask; 1147 mach->mach_params.platform = dev_name(sdev->dev); 1148 pdata->fw_filename = mach->sof_fw_filename; 1149 pdata->tplg_filename = mach->sof_tplg_filename; 1150 } else { 1151 dev_info(sdev->dev, 1152 "No SoundWire machine driver found\n"); 1153 } 1154 } 1155 1156 return 0; 1157 } 1158 #else 1159 static int hda_sdw_machine_select(struct snd_sof_dev *sdev) 1160 { 1161 return 0; 1162 } 1163 #endif 1164 1165 void hda_set_mach_params(const struct snd_soc_acpi_mach *mach, 1166 struct device *dev) 1167 { 1168 struct snd_soc_acpi_mach_params *mach_params; 1169 1170 mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params; 1171 mach_params->platform = dev_name(dev); 1172 } 1173 1174 void hda_machine_select(struct snd_sof_dev *sdev) 1175 { 1176 struct snd_sof_pdata *sof_pdata = sdev->pdata; 1177 const struct sof_dev_desc *desc = sof_pdata->desc; 1178 struct snd_soc_acpi_mach *mach; 1179 1180 mach = snd_soc_acpi_find_machine(desc->machines); 1181 if (mach) { 1182 sof_pdata->tplg_filename = mach->sof_tplg_filename; 1183 sof_pdata->machine = mach; 1184 1185 if (mach->link_mask) { 1186 mach->mach_params.links = mach->links; 1187 mach->mach_params.link_mask = mach->link_mask; 1188 } 1189 } 1190 1191 /* 1192 * If I2S fails, try SoundWire 1193 */ 1194 hda_sdw_machine_select(sdev); 1195 1196 /* 1197 * Choose HDA generic machine driver if mach is NULL. 1198 * Otherwise, set certain mach params. 1199 */ 1200 hda_generic_machine_select(sdev); 1201 1202 if (!sof_pdata->machine) 1203 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 1204 } 1205 1206 MODULE_LICENSE("Dual BSD/GPL"); 1207 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 1208 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 1209 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 1210