1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/module.h> 22 #include <sound/intel-nhlt.h> 23 #include <sound/sof.h> 24 #include <sound/sof/xtensa.h> 25 #include "../ops.h" 26 #include "hda.h" 27 28 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 29 #include <sound/soc-acpi-intel-match.h> 30 #endif 31 32 /* platform specific devices */ 33 #include "shim.h" 34 35 #define EXCEPT_MAX_HDR_SIZE 0x400 36 37 /* 38 * Debug 39 */ 40 41 struct hda_dsp_msg_code { 42 u32 code; 43 const char *msg; 44 }; 45 46 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI); 47 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 48 module_param_named(use_msi, hda_use_msi, bool, 0444); 49 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 50 #endif 51 52 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 53 static int hda_dmic_num = -1; 54 module_param_named(dmic_num, hda_dmic_num, int, 0444); 55 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 56 57 static bool hda_codec_use_common_hdmi = 58 IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_COMMON_HDMI_CODEC); 59 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); 60 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver"); 61 #endif 62 63 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = { 64 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"}, 65 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"}, 66 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"}, 67 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 68 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 69 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 70 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 71 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 72 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 73 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 74 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 75 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 76 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 77 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 78 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 79 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 80 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 81 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 82 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 83 }; 84 85 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev) 86 { 87 u32 status; 88 int i; 89 90 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 91 HDA_ADSP_FW_STATUS_SKL); 92 93 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 94 if (status == hda_dsp_rom_msg[i].code) { 95 dev_err(sdev->dev, "%s - code %8.8x\n", 96 hda_dsp_rom_msg[i].msg, status); 97 return; 98 } 99 } 100 101 /* not for us, must be generic sof message */ 102 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 103 } 104 105 static void hda_dsp_get_status(struct snd_sof_dev *sdev) 106 { 107 u32 status; 108 int i; 109 110 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 111 HDA_DSP_SRAM_REG_ROM_STATUS); 112 113 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 114 if (status == hda_dsp_rom_msg[i].code) { 115 dev_err(sdev->dev, "%s - code %8.8x\n", 116 hda_dsp_rom_msg[i].msg, status); 117 return; 118 } 119 } 120 121 /* not for us, must be generic sof message */ 122 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 123 } 124 125 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 126 struct sof_ipc_dsp_oops_xtensa *xoops, 127 struct sof_ipc_panic_info *panic_info, 128 u32 *stack, size_t stack_words) 129 { 130 u32 offset = sdev->dsp_oops_offset; 131 132 /* first read registers */ 133 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 134 135 /* note: variable AR register array is not read */ 136 137 /* then get panic info */ 138 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 139 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 140 xoops->arch_hdr.totalsize); 141 return; 142 } 143 offset += xoops->arch_hdr.totalsize; 144 sof_block_read(sdev, sdev->mmio_bar, offset, 145 panic_info, sizeof(*panic_info)); 146 147 /* then get the stack */ 148 offset += sizeof(*panic_info); 149 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 150 stack_words * sizeof(u32)); 151 } 152 153 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags) 154 { 155 struct sof_ipc_dsp_oops_xtensa xoops; 156 struct sof_ipc_panic_info panic_info; 157 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 158 u32 status, panic; 159 160 /* try APL specific status message types first */ 161 hda_dsp_get_status_skl(sdev); 162 163 /* now try generic SOF status messages */ 164 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 165 HDA_ADSP_ERROR_CODE_SKL); 166 167 /*TODO: Check: there is no define in spec, but it is used in the code*/ 168 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 169 HDA_ADSP_ERROR_CODE_SKL + 0x4); 170 171 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 172 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 173 HDA_DSP_STACK_DUMP_SIZE); 174 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 175 stack, HDA_DSP_STACK_DUMP_SIZE); 176 } else { 177 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 178 status, panic); 179 hda_dsp_get_status_skl(sdev); 180 } 181 } 182 183 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 184 { 185 struct sof_ipc_dsp_oops_xtensa xoops; 186 struct sof_ipc_panic_info panic_info; 187 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 188 u32 status, panic; 189 190 /* try APL specific status message types first */ 191 hda_dsp_get_status(sdev); 192 193 /* now try generic SOF status messages */ 194 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 195 HDA_DSP_SRAM_REG_FW_STATUS); 196 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 197 198 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 199 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 200 HDA_DSP_STACK_DUMP_SIZE); 201 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 202 stack, HDA_DSP_STACK_DUMP_SIZE); 203 } else { 204 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 205 status, panic); 206 hda_dsp_get_status(sdev); 207 } 208 } 209 210 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 211 { 212 struct hdac_bus *bus = sof_to_bus(sdev); 213 u32 adspis; 214 u32 intsts; 215 u32 intctl; 216 u32 ppsts; 217 u8 rirbsts; 218 219 /* read key IRQ stats and config registers */ 220 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 221 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 222 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 223 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 224 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 225 226 dev_err(sdev->dev, 227 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 228 intsts, intctl, rirbsts); 229 dev_err(sdev->dev, 230 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", 231 ppsts, adspis); 232 } 233 234 void hda_ipc_dump(struct snd_sof_dev *sdev) 235 { 236 u32 hipcie; 237 u32 hipct; 238 u32 hipcctl; 239 240 hda_ipc_irq_dump(sdev); 241 242 /* read IPC status */ 243 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 244 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 245 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 246 247 /* dump the IPC regs */ 248 /* TODO: parse the raw msg */ 249 dev_err(sdev->dev, 250 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 251 hipcie, hipct, hipcctl); 252 } 253 254 static int hda_init(struct snd_sof_dev *sdev) 255 { 256 struct hda_bus *hbus; 257 struct hdac_bus *bus; 258 struct pci_dev *pci = to_pci_dev(sdev->dev); 259 int ret; 260 261 hbus = sof_to_hbus(sdev); 262 bus = sof_to_bus(sdev); 263 264 /* HDA bus init */ 265 sof_hda_bus_init(bus, &pci->dev); 266 267 bus->use_posbuf = 1; 268 bus->bdl_pos_adj = 0; 269 bus->sync_write = 1; 270 271 mutex_init(&hbus->prepare_mutex); 272 hbus->pci = pci; 273 hbus->mixer_assigned = -1; 274 hbus->modelname = "sofbus"; 275 276 /* initialise hdac bus */ 277 bus->addr = pci_resource_start(pci, 0); 278 #if IS_ENABLED(CONFIG_PCI) 279 bus->remap_addr = pci_ioremap_bar(pci, 0); 280 #endif 281 if (!bus->remap_addr) { 282 dev_err(bus->dev, "error: ioremap error\n"); 283 return -ENXIO; 284 } 285 286 /* HDA base */ 287 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 288 289 /* init i915 and HDMI codecs */ 290 ret = hda_codec_i915_init(sdev); 291 if (ret < 0) { 292 dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n"); 293 return ret; 294 } 295 296 /* get controller capabilities */ 297 ret = hda_dsp_ctrl_get_caps(sdev); 298 if (ret < 0) 299 dev_err(sdev->dev, "error: get caps error\n"); 300 301 return ret; 302 } 303 304 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 305 306 static int check_nhlt_dmic(struct snd_sof_dev *sdev) 307 { 308 struct nhlt_acpi_table *nhlt; 309 int dmic_num; 310 311 nhlt = intel_nhlt_init(sdev->dev); 312 if (nhlt) { 313 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 314 intel_nhlt_free(nhlt); 315 if (dmic_num == 2 || dmic_num == 4) 316 return dmic_num; 317 } 318 319 return 0; 320 } 321 322 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 323 const char *sof_tplg_filename, 324 const char *idisp_str, 325 const char *dmic_str) 326 { 327 const char *tplg_filename = NULL; 328 char *filename; 329 char *split_ext; 330 331 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL); 332 if (!filename) 333 return NULL; 334 335 /* this assumes a .tplg extension */ 336 split_ext = strsep(&filename, "."); 337 if (split_ext) { 338 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 339 "%s%s%s.tplg", 340 split_ext, idisp_str, dmic_str); 341 if (!tplg_filename) 342 return NULL; 343 } 344 return tplg_filename; 345 } 346 347 #endif 348 349 static int hda_init_caps(struct snd_sof_dev *sdev) 350 { 351 struct hdac_bus *bus = sof_to_bus(sdev); 352 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 353 struct hdac_ext_link *hlink; 354 #endif 355 int ret = 0; 356 357 device_disable_async_suspend(bus->dev); 358 359 /* check if dsp is there */ 360 if (bus->ppcap) 361 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 362 363 /* Init HDA controller after i915 init */ 364 ret = hda_dsp_ctrl_init_chip(sdev, true); 365 if (ret < 0) { 366 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 367 ret); 368 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 369 hda_codec_i915_exit(sdev); 370 #endif 371 return ret; 372 } 373 374 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 375 if (bus->mlcap) 376 snd_hdac_ext_bus_get_ml_capabilities(bus); 377 378 /* create codec instances */ 379 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi); 380 381 if (!HDA_IDISP_CODEC(bus->codec_mask)) 382 hda_codec_i915_exit(sdev); 383 384 /* 385 * we are done probing so decrement link counts 386 */ 387 list_for_each_entry(hlink, &bus->hlink_list, list) 388 snd_hdac_ext_bus_link_put(bus, hlink); 389 #endif 390 return 0; 391 } 392 393 static const struct sof_intel_dsp_desc 394 *get_chip_info(struct snd_sof_pdata *pdata) 395 { 396 const struct sof_dev_desc *desc = pdata->desc; 397 const struct sof_intel_dsp_desc *chip_info; 398 399 chip_info = desc->chip_info; 400 401 return chip_info; 402 } 403 404 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 405 { 406 struct snd_sof_dev *sdev = context; 407 408 /* 409 * Get global interrupt status. It includes all hardware interrupt 410 * sources in the Intel HD Audio controller. 411 */ 412 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 413 SOF_HDA_INTSTS_GIS) { 414 415 /* disable GIE interrupt */ 416 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 417 SOF_HDA_INTCTL, 418 SOF_HDA_INT_GLOBAL_EN, 419 0); 420 421 return IRQ_WAKE_THREAD; 422 } 423 424 return IRQ_NONE; 425 } 426 427 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 428 { 429 struct snd_sof_dev *sdev = context; 430 431 /* deal with streams and controller first */ 432 if (hda_dsp_check_stream_irq(sdev)) 433 hda_dsp_stream_threaded_handler(irq, sdev); 434 435 if (hda_dsp_check_ipc_irq(sdev)) 436 sof_ops(sdev)->irq_thread(irq, sdev); 437 438 /* enable GIE interrupt */ 439 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 440 SOF_HDA_INTCTL, 441 SOF_HDA_INT_GLOBAL_EN, 442 SOF_HDA_INT_GLOBAL_EN); 443 444 return IRQ_HANDLED; 445 } 446 447 int hda_dsp_probe(struct snd_sof_dev *sdev) 448 { 449 struct pci_dev *pci = to_pci_dev(sdev->dev); 450 struct sof_intel_hda_dev *hdev; 451 struct hdac_bus *bus; 452 const struct sof_intel_dsp_desc *chip; 453 int ret = 0; 454 455 /* 456 * detect DSP by checking class/subclass/prog-id information 457 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 458 * class=04 subclass 01 prog-if 00: DSP is present 459 * (and may be required e.g. for DMIC or SSP support) 460 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 461 */ 462 if (pci->class == 0x040300) { 463 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 464 return -ENODEV; 465 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 466 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 467 return -ENODEV; 468 } 469 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 470 471 chip = get_chip_info(sdev->pdata); 472 if (!chip) { 473 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 474 pci->device); 475 ret = -EIO; 476 goto err; 477 } 478 479 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 480 if (!hdev) 481 return -ENOMEM; 482 sdev->pdata->hw_pdata = hdev; 483 hdev->desc = chip; 484 485 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 486 PLATFORM_DEVID_NONE, 487 NULL, 0); 488 if (IS_ERR(hdev->dmic_dev)) { 489 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 490 return PTR_ERR(hdev->dmic_dev); 491 } 492 493 /* 494 * use position update IPC if either it is forced 495 * or we don't have other choice 496 */ 497 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 498 hdev->no_ipc_position = 0; 499 #else 500 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 501 #endif 502 503 /* set up HDA base */ 504 bus = sof_to_bus(sdev); 505 ret = hda_init(sdev); 506 if (ret < 0) 507 goto hdac_bus_unmap; 508 509 /* DSP base */ 510 #if IS_ENABLED(CONFIG_PCI) 511 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 512 #endif 513 if (!sdev->bar[HDA_DSP_BAR]) { 514 dev_err(sdev->dev, "error: ioremap error\n"); 515 ret = -ENXIO; 516 goto hdac_bus_unmap; 517 } 518 519 sdev->mmio_bar = HDA_DSP_BAR; 520 sdev->mailbox_bar = HDA_DSP_BAR; 521 522 /* allow 64bit DMA address if supported by H/W */ 523 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) { 524 dev_dbg(sdev->dev, "DMA mask is 64 bit\n"); 525 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64)); 526 } else { 527 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 528 dma_set_mask(&pci->dev, DMA_BIT_MASK(32)); 529 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)); 530 } 531 532 /* init streams */ 533 ret = hda_dsp_stream_init(sdev); 534 if (ret < 0) { 535 dev_err(sdev->dev, "error: failed to init streams\n"); 536 /* 537 * not all errors are due to memory issues, but trying 538 * to free everything does not harm 539 */ 540 goto free_streams; 541 } 542 543 /* 544 * register our IRQ 545 * let's try to enable msi firstly 546 * if it fails, use legacy interrupt mode 547 * TODO: support msi multiple vectors 548 */ 549 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 550 dev_info(sdev->dev, "use msi interrupt mode\n"); 551 sdev->ipc_irq = pci_irq_vector(pci, 0); 552 /* initialised to "false" by kzalloc() */ 553 sdev->msi_enabled = true; 554 } 555 556 if (!sdev->msi_enabled) { 557 dev_info(sdev->dev, "use legacy interrupt mode\n"); 558 /* 559 * in IO-APIC mode, hda->irq and ipc_irq are using the same 560 * irq number of pci->irq 561 */ 562 sdev->ipc_irq = pci->irq; 563 } 564 565 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 566 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 567 hda_dsp_interrupt_thread, 568 IRQF_SHARED, "AudioDSP", sdev); 569 if (ret < 0) { 570 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 571 sdev->ipc_irq); 572 goto free_irq_vector; 573 } 574 575 pci_set_master(pci); 576 synchronize_irq(pci->irq); 577 578 /* 579 * clear TCSEL to clear playback on some HD Audio 580 * codecs. PCI TCSEL is defined in the Intel manuals. 581 */ 582 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 583 584 /* init HDA capabilities */ 585 ret = hda_init_caps(sdev); 586 if (ret < 0) 587 goto free_ipc_irq; 588 589 /* enable ppcap interrupt */ 590 hda_dsp_ctrl_ppcap_enable(sdev, true); 591 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 592 593 /* initialize waitq for code loading */ 594 init_waitqueue_head(&sdev->waitq); 595 596 /* set default mailbox offset for FW ready message */ 597 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 598 599 return 0; 600 601 free_ipc_irq: 602 free_irq(sdev->ipc_irq, sdev); 603 free_irq_vector: 604 if (sdev->msi_enabled) 605 pci_free_irq_vectors(pci); 606 free_streams: 607 hda_dsp_stream_free(sdev); 608 /* dsp_unmap: not currently used */ 609 iounmap(sdev->bar[HDA_DSP_BAR]); 610 hdac_bus_unmap: 611 iounmap(bus->remap_addr); 612 hda_codec_i915_exit(sdev); 613 err: 614 return ret; 615 } 616 617 int hda_dsp_remove(struct snd_sof_dev *sdev) 618 { 619 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 620 struct hdac_bus *bus = sof_to_bus(sdev); 621 struct pci_dev *pci = to_pci_dev(sdev->dev); 622 const struct sof_intel_dsp_desc *chip = hda->desc; 623 624 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 625 /* codec removal, invoke bus_device_remove */ 626 snd_hdac_ext_bus_device_remove(bus); 627 #endif 628 629 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 630 platform_device_unregister(hda->dmic_dev); 631 632 /* disable DSP IRQ */ 633 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 634 SOF_HDA_PPCTL_PIE, 0); 635 636 /* disable CIE and GIE interrupts */ 637 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 638 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 639 640 /* disable cores */ 641 if (chip) 642 hda_dsp_core_reset_power_down(sdev, chip->cores_mask); 643 644 /* disable DSP */ 645 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 646 SOF_HDA_PPCTL_GPROCEN, 0); 647 648 free_irq(sdev->ipc_irq, sdev); 649 if (sdev->msi_enabled) 650 pci_free_irq_vectors(pci); 651 652 hda_dsp_stream_free(sdev); 653 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 654 snd_hdac_link_free_all(bus); 655 #endif 656 657 iounmap(sdev->bar[HDA_DSP_BAR]); 658 iounmap(bus->remap_addr); 659 660 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 661 snd_hdac_ext_bus_exit(bus); 662 #endif 663 hda_codec_i915_exit(sdev); 664 665 return 0; 666 } 667 668 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 669 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 670 { 671 struct hdac_bus *bus = sof_to_bus(sdev); 672 struct snd_soc_acpi_mach_params *mach_params; 673 struct snd_soc_acpi_mach *hda_mach; 674 struct snd_sof_pdata *pdata = sdev->pdata; 675 const char *tplg_filename; 676 const char *idisp_str; 677 const char *dmic_str; 678 int dmic_num = 0; 679 int codec_num = 0; 680 int i; 681 682 /* codec detection */ 683 if (!bus->codec_mask) { 684 dev_info(bus->dev, "no hda codecs found!\n"); 685 } else { 686 dev_info(bus->dev, "hda codecs found, mask %lx\n", 687 bus->codec_mask); 688 689 for (i = 0; i < HDA_MAX_CODECS; i++) { 690 if (bus->codec_mask & (1 << i)) 691 codec_num++; 692 } 693 694 /* 695 * If no machine driver is found, then: 696 * 697 * hda machine driver is used if : 698 * 1. there is one HDMI codec and one external HDAudio codec 699 * 2. only HDMI codec 700 */ 701 if (!pdata->machine && codec_num <= 2 && 702 HDA_IDISP_CODEC(bus->codec_mask)) { 703 hda_mach = snd_soc_acpi_intel_hda_machines; 704 705 /* topology: use the info from hda_machines */ 706 pdata->tplg_filename = 707 hda_mach->sof_tplg_filename; 708 709 dev_info(bus->dev, "using HDA machine driver %s now\n", 710 hda_mach->drv_name); 711 712 if (codec_num == 1) 713 idisp_str = "-idisp"; 714 else 715 idisp_str = ""; 716 717 /* first check NHLT for DMICs */ 718 dmic_num = check_nhlt_dmic(sdev); 719 720 /* allow for module parameter override */ 721 if (hda_dmic_num != -1) 722 dmic_num = hda_dmic_num; 723 724 switch (dmic_num) { 725 case 2: 726 dmic_str = "-2ch"; 727 break; 728 case 4: 729 dmic_str = "-4ch"; 730 break; 731 default: 732 dmic_num = 0; 733 dmic_str = ""; 734 break; 735 } 736 737 tplg_filename = pdata->tplg_filename; 738 tplg_filename = fixup_tplg_name(sdev, tplg_filename, 739 idisp_str, dmic_str); 740 if (!tplg_filename) 741 return -EINVAL; 742 743 pdata->machine = hda_mach; 744 pdata->tplg_filename = tplg_filename; 745 } 746 } 747 748 /* used by hda machine driver to create dai links */ 749 if (pdata->machine) { 750 mach_params = (struct snd_soc_acpi_mach_params *) 751 &pdata->machine->mach_params; 752 mach_params->codec_mask = bus->codec_mask; 753 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi; 754 mach_params->dmic_num = dmic_num; 755 } 756 757 return 0; 758 } 759 #else 760 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 761 { 762 return 0; 763 } 764 #endif 765 766 void hda_set_mach_params(const struct snd_soc_acpi_mach *mach, 767 struct device *dev) 768 { 769 struct snd_soc_acpi_mach_params *mach_params; 770 771 mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params; 772 mach_params->platform = dev_name(dev); 773 } 774 775 void hda_machine_select(struct snd_sof_dev *sdev) 776 { 777 struct snd_sof_pdata *sof_pdata = sdev->pdata; 778 const struct sof_dev_desc *desc = sof_pdata->desc; 779 struct snd_soc_acpi_mach *mach; 780 781 mach = snd_soc_acpi_find_machine(desc->machines); 782 if (mach) { 783 sof_pdata->tplg_filename = mach->sof_tplg_filename; 784 sof_pdata->machine = mach; 785 } 786 787 /* 788 * Choose HDA generic machine driver if mach is NULL. 789 * Otherwise, set certain mach params. 790 */ 791 hda_generic_machine_select(sdev); 792 793 if (!sof_pdata->machine) 794 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 795 } 796 797 MODULE_LICENSE("Dual BSD/GPL"); 798 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 799 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 800 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 801