xref: /openbmc/linux/sound/soc/sof/intel/hda.c (revision 8795a739)
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 //	    Rander Wang <rander.wang@intel.com>
11 //          Keyon Jie <yang.jie@linux.intel.com>
12 //
13 
14 /*
15  * Hardware interface for generic Intel audio DSP HDA IP
16  */
17 
18 #include <sound/hdaudio_ext.h>
19 #include <sound/hda_register.h>
20 
21 #include <linux/module.h>
22 #include <sound/intel-nhlt.h>
23 #include <sound/sof.h>
24 #include <sound/sof/xtensa.h>
25 #include "../ops.h"
26 #include "hda.h"
27 
28 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
29 #include <sound/soc-acpi-intel-match.h>
30 #endif
31 
32 /* platform specific devices */
33 #include "shim.h"
34 
35 #define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
36 #define IS_CNL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9dc8)
37 
38 /*
39  * Debug
40  */
41 
42 struct hda_dsp_msg_code {
43 	u32 code;
44 	const char *msg;
45 };
46 
47 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI);
48 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
49 module_param_named(use_msi, hda_use_msi, bool, 0444);
50 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
51 #endif
52 
53 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
54 static int hda_dmic_num = -1;
55 module_param_named(dmic_num, hda_dmic_num, int, 0444);
56 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
57 #endif
58 
59 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
60 	{HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
61 	{HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
62 	{HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
63 	{HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
64 	{HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
65 	{HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
66 	{HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
67 	{HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
68 	{HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
69 	{HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
70 	{HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
71 	{HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
72 	{HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
73 	{HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
74 	{HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
75 	{HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
76 	{HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
77 	{HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
78 	{HDA_DSP_ROM_NULL_FW_ENTRY,	"error: null FW entry point"},
79 };
80 
81 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
82 {
83 	u32 status;
84 	int i;
85 
86 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
87 				  HDA_ADSP_FW_STATUS_SKL);
88 
89 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
90 		if (status == hda_dsp_rom_msg[i].code) {
91 			dev_err(sdev->dev, "%s - code %8.8x\n",
92 				hda_dsp_rom_msg[i].msg, status);
93 			return;
94 		}
95 	}
96 
97 	/* not for us, must be generic sof message */
98 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
99 }
100 
101 static void hda_dsp_get_status(struct snd_sof_dev *sdev)
102 {
103 	u32 status;
104 	int i;
105 
106 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
107 				  HDA_DSP_SRAM_REG_ROM_STATUS);
108 
109 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
110 		if (status == hda_dsp_rom_msg[i].code) {
111 			dev_err(sdev->dev, "%s - code %8.8x\n",
112 				hda_dsp_rom_msg[i].msg, status);
113 			return;
114 		}
115 	}
116 
117 	/* not for us, must be generic sof message */
118 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
119 }
120 
121 static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
122 				  struct sof_ipc_dsp_oops_xtensa *xoops,
123 				  struct sof_ipc_panic_info *panic_info,
124 				  u32 *stack, size_t stack_words)
125 {
126 	u32 offset = sdev->dsp_oops_offset;
127 
128 	/* first read registers */
129 	sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
130 
131 	/* note: variable AR register array is not read */
132 
133 	/* then get panic info */
134 	offset += xoops->arch_hdr.totalsize;
135 	sof_block_read(sdev, sdev->mmio_bar, offset,
136 		       panic_info, sizeof(*panic_info));
137 
138 	/* then get the stack */
139 	offset += sizeof(*panic_info);
140 	sof_block_read(sdev, sdev->mmio_bar, offset, stack,
141 		       stack_words * sizeof(u32));
142 }
143 
144 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
145 {
146 	struct sof_ipc_dsp_oops_xtensa xoops;
147 	struct sof_ipc_panic_info panic_info;
148 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
149 	u32 status, panic;
150 
151 	/* try APL specific status message types first */
152 	hda_dsp_get_status_skl(sdev);
153 
154 	/* now try generic SOF status messages */
155 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
156 				  HDA_ADSP_ERROR_CODE_SKL);
157 
158 	/*TODO: Check: there is no define in spec, but it is used in the code*/
159 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
160 				 HDA_ADSP_ERROR_CODE_SKL + 0x4);
161 
162 	if (sdev->boot_complete) {
163 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
164 				      HDA_DSP_STACK_DUMP_SIZE);
165 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
166 				   stack, HDA_DSP_STACK_DUMP_SIZE);
167 	} else {
168 		dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
169 			status, panic);
170 		hda_dsp_get_status_skl(sdev);
171 	}
172 }
173 
174 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
175 {
176 	struct sof_ipc_dsp_oops_xtensa xoops;
177 	struct sof_ipc_panic_info panic_info;
178 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
179 	u32 status, panic;
180 
181 	/* try APL specific status message types first */
182 	hda_dsp_get_status(sdev);
183 
184 	/* now try generic SOF status messages */
185 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
186 				  HDA_DSP_SRAM_REG_FW_STATUS);
187 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
188 
189 	if (sdev->boot_complete) {
190 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
191 				      HDA_DSP_STACK_DUMP_SIZE);
192 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
193 				   stack, HDA_DSP_STACK_DUMP_SIZE);
194 	} else {
195 		dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
196 			status, panic);
197 		hda_dsp_get_status(sdev);
198 	}
199 }
200 
201 void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
202 {
203 	struct hdac_bus *bus = sof_to_bus(sdev);
204 	u32 adspis;
205 	u32 intsts;
206 	u32 intctl;
207 	u32 ppsts;
208 	u8 rirbsts;
209 
210 	/* read key IRQ stats and config registers */
211 	adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
212 	intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
213 	intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
214 	ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
215 	rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
216 
217 	dev_err(sdev->dev,
218 		"error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
219 		intsts, intctl, rirbsts);
220 	dev_err(sdev->dev,
221 		"error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
222 		ppsts, adspis);
223 }
224 
225 void hda_ipc_dump(struct snd_sof_dev *sdev)
226 {
227 	u32 hipcie;
228 	u32 hipct;
229 	u32 hipcctl;
230 
231 	hda_ipc_irq_dump(sdev);
232 
233 	/* read IPC status */
234 	hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
235 	hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
236 	hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
237 
238 	/* dump the IPC regs */
239 	/* TODO: parse the raw msg */
240 	dev_err(sdev->dev,
241 		"error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
242 		hipcie, hipct, hipcctl);
243 }
244 
245 static int hda_init(struct snd_sof_dev *sdev)
246 {
247 	struct hda_bus *hbus;
248 	struct hdac_bus *bus;
249 	struct pci_dev *pci = to_pci_dev(sdev->dev);
250 	int ret;
251 
252 	hbus = sof_to_hbus(sdev);
253 	bus = sof_to_bus(sdev);
254 
255 	/* HDA bus init */
256 	sof_hda_bus_init(bus, &pci->dev);
257 
258 	/* Workaround for a communication error on CFL (bko#199007) and CNL */
259 	if (IS_CFL(pci) || IS_CNL(pci))
260 		bus->polling_mode = 1;
261 
262 	bus->use_posbuf = 1;
263 	bus->bdl_pos_adj = 0;
264 
265 	mutex_init(&hbus->prepare_mutex);
266 	hbus->pci = pci;
267 	hbus->mixer_assigned = -1;
268 	hbus->modelname = "sofbus";
269 
270 	/* initialise hdac bus */
271 	bus->addr = pci_resource_start(pci, 0);
272 #if IS_ENABLED(CONFIG_PCI)
273 	bus->remap_addr = pci_ioremap_bar(pci, 0);
274 #endif
275 	if (!bus->remap_addr) {
276 		dev_err(bus->dev, "error: ioremap error\n");
277 		return -ENXIO;
278 	}
279 
280 	/* HDA base */
281 	sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
282 
283 	/* get controller capabilities */
284 	ret = hda_dsp_ctrl_get_caps(sdev);
285 	if (ret < 0)
286 		dev_err(sdev->dev, "error: get caps error\n");
287 
288 	return ret;
289 }
290 
291 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
292 
293 static int check_nhlt_dmic(struct snd_sof_dev *sdev)
294 {
295 	struct nhlt_acpi_table *nhlt;
296 	int dmic_num;
297 
298 	nhlt = intel_nhlt_init(sdev->dev);
299 	if (nhlt) {
300 		dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
301 		intel_nhlt_free(nhlt);
302 		if (dmic_num == 2 || dmic_num == 4)
303 			return dmic_num;
304 	}
305 
306 	return 0;
307 }
308 
309 static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
310 				   const char *sof_tplg_filename,
311 				   const char *idisp_str,
312 				   const char *dmic_str)
313 {
314 	const char *tplg_filename = NULL;
315 	char *filename;
316 	char *split_ext;
317 
318 	filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
319 	if (!filename)
320 		return NULL;
321 
322 	/* this assumes a .tplg extension */
323 	split_ext = strsep(&filename, ".");
324 	if (split_ext) {
325 		tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
326 					       "%s%s%s.tplg",
327 					       split_ext, idisp_str, dmic_str);
328 		if (!tplg_filename)
329 			return NULL;
330 	}
331 	return tplg_filename;
332 }
333 
334 #endif
335 
336 static int hda_init_caps(struct snd_sof_dev *sdev)
337 {
338 	struct hdac_bus *bus = sof_to_bus(sdev);
339 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
340 	struct hdac_ext_link *hlink;
341 	struct snd_soc_acpi_mach_params *mach_params;
342 	struct snd_soc_acpi_mach *hda_mach;
343 	struct snd_sof_pdata *pdata = sdev->pdata;
344 	struct snd_soc_acpi_mach *mach;
345 	const char *tplg_filename;
346 	const char *idisp_str;
347 	const char *dmic_str;
348 	int dmic_num;
349 	int codec_num = 0;
350 	int i;
351 #endif
352 	int ret = 0;
353 
354 	device_disable_async_suspend(bus->dev);
355 
356 	/* check if dsp is there */
357 	if (bus->ppcap)
358 		dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
359 
360 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
361 	/* init i915 and HDMI codecs */
362 	ret = hda_codec_i915_init(sdev);
363 	if (ret < 0) {
364 		dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n");
365 		return ret;
366 	}
367 #endif
368 
369 	/* Init HDA controller after i915 init */
370 	ret = hda_dsp_ctrl_init_chip(sdev, true);
371 	if (ret < 0) {
372 		dev_err(bus->dev, "error: init chip failed with ret: %d\n",
373 			ret);
374 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
375 		hda_codec_i915_exit(sdev);
376 #endif
377 		return ret;
378 	}
379 
380 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
381 	if (bus->mlcap)
382 		snd_hdac_ext_bus_get_ml_capabilities(bus);
383 
384 	/* codec detection */
385 	if (!bus->codec_mask) {
386 		dev_info(bus->dev, "no hda codecs found!\n");
387 	} else {
388 		dev_info(bus->dev, "hda codecs found, mask %lx\n",
389 			 bus->codec_mask);
390 
391 		for (i = 0; i < HDA_MAX_CODECS; i++) {
392 			if (bus->codec_mask & (1 << i))
393 				codec_num++;
394 		}
395 
396 		/*
397 		 * If no machine driver is found, then:
398 		 *
399 		 * hda machine driver is used if :
400 		 * 1. there is one HDMI codec and one external HDAudio codec
401 		 * 2. only HDMI codec
402 		 */
403 		if (!pdata->machine && codec_num <= 2 &&
404 		    HDA_IDISP_CODEC(bus->codec_mask)) {
405 			hda_mach = snd_soc_acpi_intel_hda_machines;
406 			pdata->machine = hda_mach;
407 
408 			/* topology: use the info from hda_machines */
409 			pdata->tplg_filename =
410 				hda_mach->sof_tplg_filename;
411 
412 			/* firmware: pick the first in machine list */
413 			mach = pdata->desc->machines;
414 			pdata->fw_filename = mach->sof_fw_filename;
415 
416 			dev_info(bus->dev, "using HDA machine driver %s now\n",
417 				 hda_mach->drv_name);
418 
419 			if (codec_num == 1)
420 				idisp_str = "-idisp";
421 			else
422 				idisp_str = "";
423 
424 			/* first check NHLT for DMICs */
425 			dmic_num = check_nhlt_dmic(sdev);
426 
427 			/* allow for module parameter override */
428 			if (hda_dmic_num != -1)
429 				dmic_num = hda_dmic_num;
430 
431 			switch (dmic_num) {
432 			case 2:
433 				dmic_str = "-2ch";
434 				break;
435 			case 4:
436 				dmic_str = "-4ch";
437 				break;
438 			default:
439 				dmic_num = 0;
440 				dmic_str = "";
441 				break;
442 			}
443 
444 			tplg_filename = pdata->tplg_filename;
445 			tplg_filename = fixup_tplg_name(sdev, tplg_filename,
446 							idisp_str, dmic_str);
447 			if (!tplg_filename) {
448 				hda_codec_i915_exit(sdev);
449 				return ret;
450 			}
451 			pdata->tplg_filename = tplg_filename;
452 		}
453 	}
454 
455 	/* used by hda machine driver to create dai links */
456 	if (pdata->machine) {
457 		mach_params = (struct snd_soc_acpi_mach_params *)
458 			&pdata->machine->mach_params;
459 		mach_params->codec_mask = bus->codec_mask;
460 		mach_params->platform = dev_name(sdev->dev);
461 	}
462 
463 	/* create codec instances */
464 	hda_codec_probe_bus(sdev);
465 
466 	hda_codec_i915_put(sdev);
467 
468 	/*
469 	 * we are done probing so decrement link counts
470 	 */
471 	list_for_each_entry(hlink, &bus->hlink_list, list)
472 		snd_hdac_ext_bus_link_put(bus, hlink);
473 #endif
474 	return 0;
475 }
476 
477 static const struct sof_intel_dsp_desc
478 	*get_chip_info(struct snd_sof_pdata *pdata)
479 {
480 	const struct sof_dev_desc *desc = pdata->desc;
481 	const struct sof_intel_dsp_desc *chip_info;
482 
483 	chip_info = desc->chip_info;
484 
485 	return chip_info;
486 }
487 
488 int hda_dsp_probe(struct snd_sof_dev *sdev)
489 {
490 	struct pci_dev *pci = to_pci_dev(sdev->dev);
491 	struct sof_intel_hda_dev *hdev;
492 	struct hdac_bus *bus;
493 	const struct sof_intel_dsp_desc *chip;
494 	int ret = 0;
495 
496 	/*
497 	 * detect DSP by checking class/subclass/prog-id information
498 	 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
499 	 * class=04 subclass 01 prog-if 00: DSP is present
500 	 *   (and may be required e.g. for DMIC or SSP support)
501 	 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
502 	 */
503 	if (pci->class == 0x040300) {
504 		dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
505 		return -ENODEV;
506 	} else if (pci->class != 0x040100 && pci->class != 0x040380) {
507 		dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
508 		return -ENODEV;
509 	}
510 	dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
511 
512 	chip = get_chip_info(sdev->pdata);
513 	if (!chip) {
514 		dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
515 			pci->device);
516 		ret = -EIO;
517 		goto err;
518 	}
519 
520 	hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
521 	if (!hdev)
522 		return -ENOMEM;
523 	sdev->pdata->hw_pdata = hdev;
524 	hdev->desc = chip;
525 
526 	hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
527 						       PLATFORM_DEVID_NONE,
528 						       NULL, 0);
529 	if (IS_ERR(hdev->dmic_dev)) {
530 		dev_err(sdev->dev, "error: failed to create DMIC device\n");
531 		return PTR_ERR(hdev->dmic_dev);
532 	}
533 
534 	/*
535 	 * use position update IPC if either it is forced
536 	 * or we don't have other choice
537 	 */
538 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
539 	hdev->no_ipc_position = 0;
540 #else
541 	hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
542 #endif
543 
544 	/* set up HDA base */
545 	bus = sof_to_bus(sdev);
546 	ret = hda_init(sdev);
547 	if (ret < 0)
548 		goto hdac_bus_unmap;
549 
550 	/* DSP base */
551 #if IS_ENABLED(CONFIG_PCI)
552 	sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
553 #endif
554 	if (!sdev->bar[HDA_DSP_BAR]) {
555 		dev_err(sdev->dev, "error: ioremap error\n");
556 		ret = -ENXIO;
557 		goto hdac_bus_unmap;
558 	}
559 
560 	sdev->mmio_bar = HDA_DSP_BAR;
561 	sdev->mailbox_bar = HDA_DSP_BAR;
562 
563 	/* allow 64bit DMA address if supported by H/W */
564 	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
565 		dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
566 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
567 	} else {
568 		dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
569 		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
570 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
571 	}
572 
573 	/* init streams */
574 	ret = hda_dsp_stream_init(sdev);
575 	if (ret < 0) {
576 		dev_err(sdev->dev, "error: failed to init streams\n");
577 		/*
578 		 * not all errors are due to memory issues, but trying
579 		 * to free everything does not harm
580 		 */
581 		goto free_streams;
582 	}
583 
584 	/*
585 	 * register our IRQ
586 	 * let's try to enable msi firstly
587 	 * if it fails, use legacy interrupt mode
588 	 * TODO: support msi multiple vectors
589 	 */
590 	if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
591 		dev_info(sdev->dev, "use msi interrupt mode\n");
592 		hdev->irq = pci_irq_vector(pci, 0);
593 		/* ipc irq number is the same of hda irq */
594 		sdev->ipc_irq = hdev->irq;
595 		/* initialised to "false" by kzalloc() */
596 		sdev->msi_enabled = true;
597 	}
598 
599 	if (!sdev->msi_enabled) {
600 		dev_info(sdev->dev, "use legacy interrupt mode\n");
601 		/*
602 		 * in IO-APIC mode, hda->irq and ipc_irq are using the same
603 		 * irq number of pci->irq
604 		 */
605 		hdev->irq = pci->irq;
606 		sdev->ipc_irq = pci->irq;
607 	}
608 
609 	dev_dbg(sdev->dev, "using HDA IRQ %d\n", hdev->irq);
610 	ret = request_threaded_irq(hdev->irq, hda_dsp_stream_interrupt,
611 				   hda_dsp_stream_threaded_handler,
612 				   IRQF_SHARED, "AudioHDA", bus);
613 	if (ret < 0) {
614 		dev_err(sdev->dev, "error: failed to register HDA IRQ %d\n",
615 			hdev->irq);
616 		goto free_irq_vector;
617 	}
618 
619 	dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
620 	ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_ipc_irq_handler,
621 				   sof_ops(sdev)->irq_thread, IRQF_SHARED,
622 				   "AudioDSP", sdev);
623 	if (ret < 0) {
624 		dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
625 			sdev->ipc_irq);
626 		goto free_hda_irq;
627 	}
628 
629 	pci_set_master(pci);
630 	synchronize_irq(pci->irq);
631 
632 	/*
633 	 * clear TCSEL to clear playback on some HD Audio
634 	 * codecs. PCI TCSEL is defined in the Intel manuals.
635 	 */
636 	snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
637 
638 	/* init HDA capabilities */
639 	ret = hda_init_caps(sdev);
640 	if (ret < 0)
641 		goto free_ipc_irq;
642 
643 	/* enable ppcap interrupt */
644 	hda_dsp_ctrl_ppcap_enable(sdev, true);
645 	hda_dsp_ctrl_ppcap_int_enable(sdev, true);
646 
647 	/* initialize waitq for code loading */
648 	init_waitqueue_head(&sdev->waitq);
649 
650 	/* set default mailbox offset for FW ready message */
651 	sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
652 
653 	return 0;
654 
655 free_ipc_irq:
656 	free_irq(sdev->ipc_irq, sdev);
657 free_hda_irq:
658 	free_irq(hdev->irq, bus);
659 free_irq_vector:
660 	if (sdev->msi_enabled)
661 		pci_free_irq_vectors(pci);
662 free_streams:
663 	hda_dsp_stream_free(sdev);
664 /* dsp_unmap: not currently used */
665 	iounmap(sdev->bar[HDA_DSP_BAR]);
666 hdac_bus_unmap:
667 	iounmap(bus->remap_addr);
668 err:
669 	return ret;
670 }
671 
672 int hda_dsp_remove(struct snd_sof_dev *sdev)
673 {
674 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
675 	struct hdac_bus *bus = sof_to_bus(sdev);
676 	struct pci_dev *pci = to_pci_dev(sdev->dev);
677 	const struct sof_intel_dsp_desc *chip = hda->desc;
678 
679 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
680 	/* codec removal, invoke bus_device_remove */
681 	snd_hdac_ext_bus_device_remove(bus);
682 #endif
683 
684 	if (!IS_ERR_OR_NULL(hda->dmic_dev))
685 		platform_device_unregister(hda->dmic_dev);
686 
687 	/* disable DSP IRQ */
688 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
689 				SOF_HDA_PPCTL_PIE, 0);
690 
691 	/* disable CIE and GIE interrupts */
692 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
693 				SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
694 
695 	/* disable cores */
696 	if (chip)
697 		hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
698 
699 	/* disable DSP */
700 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
701 				SOF_HDA_PPCTL_GPROCEN, 0);
702 
703 	free_irq(sdev->ipc_irq, sdev);
704 	free_irq(hda->irq, bus);
705 	if (sdev->msi_enabled)
706 		pci_free_irq_vectors(pci);
707 
708 	hda_dsp_stream_free(sdev);
709 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
710 	snd_hdac_link_free_all(bus);
711 #endif
712 
713 	iounmap(sdev->bar[HDA_DSP_BAR]);
714 	iounmap(bus->remap_addr);
715 
716 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
717 	snd_hdac_ext_bus_exit(bus);
718 #endif
719 	hda_codec_i915_exit(sdev);
720 
721 	return 0;
722 }
723 
724 MODULE_LICENSE("Dual BSD/GPL");
725