1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/acpi.h> 22 #include <linux/module.h> 23 #include <linux/soundwire/sdw.h> 24 #include <linux/soundwire/sdw_intel.h> 25 #include <sound/intel-dsp-config.h> 26 #include <sound/intel-nhlt.h> 27 #include <sound/sof.h> 28 #include <sound/sof/xtensa.h> 29 #include "../sof-audio.h" 30 #include "../sof-pci-dev.h" 31 #include "../ops.h" 32 #include "hda.h" 33 34 #define CREATE_TRACE_POINTS 35 #include <trace/events/sof_intel.h> 36 37 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 38 #include <sound/soc-acpi-intel-match.h> 39 #endif 40 41 /* platform specific devices */ 42 #include "shim.h" 43 44 #define EXCEPT_MAX_HDR_SIZE 0x400 45 #define HDA_EXT_ROM_STATUS_SIZE 8 46 47 int hda_ctrl_dai_widget_setup(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 48 struct snd_sof_dai_config_data *data) 49 { 50 struct snd_sof_widget *swidget = w->dobj.private; 51 struct snd_soc_component *component = swidget->scomp; 52 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 53 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 54 struct snd_sof_dai *sof_dai = swidget->private; 55 int ret; 56 57 if (!sof_dai) { 58 dev_err(sdev->dev, "%s: No DAI for DAI widget %s\n", __func__, w->name); 59 return -EINVAL; 60 } 61 62 if (tplg_ops->dai_config) { 63 unsigned int flags; 64 65 /* set HW_PARAMS flag along with quirks */ 66 flags = SOF_DAI_CONFIG_FLAGS_HW_PARAMS | 67 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 68 69 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 70 if (ret < 0) { 71 dev_err(sdev->dev, "%s: DAI config failed for widget %s\n", __func__, 72 w->name); 73 return ret; 74 } 75 } 76 77 return 0; 78 } 79 80 int hda_ctrl_dai_widget_free(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 81 struct snd_sof_dai_config_data *data) 82 { 83 struct snd_sof_widget *swidget = w->dobj.private; 84 struct snd_soc_component *component = swidget->scomp; 85 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 86 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 87 struct snd_sof_dai *sof_dai = swidget->private; 88 89 if (!sof_dai) { 90 dev_err(sdev->dev, "%s: No DAI for BE DAI widget %s\n", __func__, w->name); 91 return -EINVAL; 92 } 93 94 if (tplg_ops->dai_config) { 95 unsigned int flags; 96 int ret; 97 98 /* set HW_FREE flag along with any quirks */ 99 flags = SOF_DAI_CONFIG_FLAGS_HW_FREE | 100 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 101 102 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 103 if (ret < 0) 104 dev_err(sdev->dev, "%s: DAI config failed for widget '%s'\n", __func__, 105 w->name); 106 } 107 108 return 0; 109 } 110 111 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 112 113 /* 114 * The default for SoundWire clock stop quirks is to power gate the IP 115 * and do a Bus Reset, this will need to be modified when the DSP 116 * needs to remain in D0i3 so that the Master does not lose context 117 * and enumeration is not required on clock restart 118 */ 119 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; 120 module_param(sdw_clock_stop_quirks, int, 0444); 121 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); 122 123 static int sdw_params_stream(struct device *dev, 124 struct sdw_intel_stream_params_data *params_data) 125 { 126 struct snd_soc_dai *d = params_data->dai; 127 struct snd_sof_dai_config_data data; 128 struct snd_soc_dapm_widget *w; 129 130 w = snd_soc_dai_get_widget(d, params_data->stream); 131 data.dai_index = (params_data->link_id << 8) | d->id; 132 data.dai_data = params_data->alh_stream_id; 133 134 return hda_ctrl_dai_widget_setup(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 135 } 136 137 static int sdw_free_stream(struct device *dev, 138 struct sdw_intel_stream_free_data *free_data) 139 { 140 struct snd_soc_dai *d = free_data->dai; 141 struct snd_sof_dai_config_data data; 142 struct snd_soc_dapm_widget *w; 143 144 w = snd_soc_dai_get_widget(d, free_data->stream); 145 data.dai_index = (free_data->link_id << 8) | d->id; 146 147 /* send invalid stream_id */ 148 data.dai_data = 0xFFFF; 149 150 return hda_ctrl_dai_widget_free(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 151 } 152 153 struct sdw_intel_ops sdw_callback = { 154 .params_stream = sdw_params_stream, 155 .free_stream = sdw_free_stream, 156 }; 157 158 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) 159 { 160 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable); 161 } 162 163 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 164 { 165 struct sof_intel_hda_dev *hdev; 166 acpi_handle handle; 167 int ret; 168 169 handle = ACPI_HANDLE(sdev->dev); 170 171 /* save ACPI info for the probe step */ 172 hdev = sdev->pdata->hw_pdata; 173 174 ret = sdw_intel_acpi_scan(handle, &hdev->info); 175 if (ret < 0) 176 return -EINVAL; 177 178 return 0; 179 } 180 181 static int hda_sdw_probe(struct snd_sof_dev *sdev) 182 { 183 struct sof_intel_hda_dev *hdev; 184 struct sdw_intel_res res; 185 void *sdw; 186 187 hdev = sdev->pdata->hw_pdata; 188 189 memset(&res, 0, sizeof(res)); 190 191 res.mmio_base = sdev->bar[HDA_DSP_BAR]; 192 res.shim_base = hdev->desc->sdw_shim_base; 193 res.alh_base = hdev->desc->sdw_alh_base; 194 res.irq = sdev->ipc_irq; 195 res.handle = hdev->info.handle; 196 res.parent = sdev->dev; 197 res.ops = &sdw_callback; 198 res.dev = sdev->dev; 199 res.clock_stop_quirks = sdw_clock_stop_quirks; 200 201 /* 202 * ops and arg fields are not populated for now, 203 * they will be needed when the DAI callbacks are 204 * provided 205 */ 206 207 /* we could filter links here if needed, e.g for quirks */ 208 res.count = hdev->info.count; 209 res.link_mask = hdev->info.link_mask; 210 211 sdw = sdw_intel_probe(&res); 212 if (!sdw) { 213 dev_err(sdev->dev, "error: SoundWire probe failed\n"); 214 return -EINVAL; 215 } 216 217 /* save context */ 218 hdev->sdw = sdw; 219 220 return 0; 221 } 222 223 int hda_sdw_startup(struct snd_sof_dev *sdev) 224 { 225 struct sof_intel_hda_dev *hdev; 226 struct snd_sof_pdata *pdata = sdev->pdata; 227 228 hdev = sdev->pdata->hw_pdata; 229 230 if (!hdev->sdw) 231 return 0; 232 233 if (pdata->machine && !pdata->machine->mach_params.link_mask) 234 return 0; 235 236 return sdw_intel_startup(hdev->sdw); 237 } 238 239 static int hda_sdw_exit(struct snd_sof_dev *sdev) 240 { 241 struct sof_intel_hda_dev *hdev; 242 243 hdev = sdev->pdata->hw_pdata; 244 245 hda_sdw_int_enable(sdev, false); 246 247 if (hdev->sdw) 248 sdw_intel_exit(hdev->sdw); 249 hdev->sdw = NULL; 250 251 return 0; 252 } 253 254 bool hda_common_check_sdw_irq(struct snd_sof_dev *sdev) 255 { 256 struct sof_intel_hda_dev *hdev; 257 bool ret = false; 258 u32 irq_status; 259 260 hdev = sdev->pdata->hw_pdata; 261 262 if (!hdev->sdw) 263 return ret; 264 265 /* store status */ 266 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); 267 268 /* invalid message ? */ 269 if (irq_status == 0xffffffff) 270 goto out; 271 272 /* SDW message ? */ 273 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW) 274 ret = true; 275 276 out: 277 return ret; 278 } 279 280 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 281 { 282 const struct sof_intel_dsp_desc *chip; 283 284 chip = get_chip_info(sdev->pdata); 285 if (chip && chip->check_sdw_irq) 286 return chip->check_sdw_irq(sdev); 287 288 return false; 289 } 290 291 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 292 { 293 return sdw_intel_thread(irq, context); 294 } 295 296 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 297 { 298 struct sof_intel_hda_dev *hdev; 299 300 hdev = sdev->pdata->hw_pdata; 301 if (hdev->sdw && 302 snd_sof_dsp_read(sdev, HDA_DSP_BAR, 303 hdev->desc->sdw_shim_base + SDW_SHIM_WAKESTS)) 304 return true; 305 306 return false; 307 } 308 309 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) 310 { 311 struct sof_intel_hda_dev *hdev; 312 313 hdev = sdev->pdata->hw_pdata; 314 if (!hdev->sdw) 315 return; 316 317 sdw_intel_process_wakeen_event(hdev->sdw); 318 } 319 320 #else /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 321 static inline int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 322 { 323 return 0; 324 } 325 326 static inline int hda_sdw_probe(struct snd_sof_dev *sdev) 327 { 328 return 0; 329 } 330 331 static inline int hda_sdw_exit(struct snd_sof_dev *sdev) 332 { 333 return 0; 334 } 335 336 static inline bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 337 { 338 return false; 339 } 340 341 static inline irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 342 { 343 return IRQ_HANDLED; 344 } 345 346 static inline bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 347 { 348 return false; 349 } 350 351 #endif /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 352 353 /* 354 * Debug 355 */ 356 357 struct hda_dsp_msg_code { 358 u32 code; 359 const char *text; 360 }; 361 362 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 363 static bool hda_use_msi = true; 364 module_param_named(use_msi, hda_use_msi, bool, 0444); 365 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 366 #else 367 #define hda_use_msi (1) 368 #endif 369 370 int sof_hda_position_quirk = SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS; 371 module_param_named(position_quirk, sof_hda_position_quirk, int, 0444); 372 MODULE_PARM_DESC(position_quirk, "SOF HDaudio position quirk"); 373 374 static char *hda_model; 375 module_param(hda_model, charp, 0444); 376 MODULE_PARM_DESC(hda_model, "Use the given HDA board model."); 377 378 static int dmic_num_override = -1; 379 module_param_named(dmic_num, dmic_num_override, int, 0444); 380 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 381 382 static int mclk_id_override = -1; 383 module_param_named(mclk_id, mclk_id_override, int, 0444); 384 MODULE_PARM_DESC(mclk_id, "SOF SSP mclk_id"); 385 386 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 387 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI); 388 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); 389 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver"); 390 #endif 391 392 static const struct hda_dsp_msg_code hda_dsp_rom_fw_error_texts[] = { 393 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 394 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 395 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 396 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 397 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 398 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 399 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 400 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 401 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 402 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 403 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 404 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 405 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 406 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 407 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 408 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 409 }; 410 411 #define FSR_ROM_STATE_ENTRY(state) {FSR_STATE_ROM_##state, #state} 412 static const struct hda_dsp_msg_code fsr_rom_state_names[] = { 413 FSR_ROM_STATE_ENTRY(INIT), 414 FSR_ROM_STATE_ENTRY(INIT_DONE), 415 FSR_ROM_STATE_ENTRY(CSE_MANIFEST_LOADED), 416 FSR_ROM_STATE_ENTRY(FW_MANIFEST_LOADED), 417 FSR_ROM_STATE_ENTRY(FW_FW_LOADED), 418 FSR_ROM_STATE_ENTRY(FW_ENTERED), 419 FSR_ROM_STATE_ENTRY(VERIFY_FEATURE_MASK), 420 FSR_ROM_STATE_ENTRY(GET_LOAD_OFFSET), 421 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT), 422 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT_DONE), 423 /* CSE states */ 424 FSR_ROM_STATE_ENTRY(CSE_IMR_REQUEST), 425 FSR_ROM_STATE_ENTRY(CSE_IMR_GRANTED), 426 FSR_ROM_STATE_ENTRY(CSE_VALIDATE_IMAGE_REQUEST), 427 FSR_ROM_STATE_ENTRY(CSE_IMAGE_VALIDATED), 428 FSR_ROM_STATE_ENTRY(CSE_IPC_IFACE_INIT), 429 FSR_ROM_STATE_ENTRY(CSE_IPC_RESET_PHASE_1), 430 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL_ENTRY), 431 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL), 432 FSR_ROM_STATE_ENTRY(CSE_IPC_DOWN), 433 }; 434 435 #define FSR_BRINGUP_STATE_ENTRY(state) {FSR_STATE_BRINGUP_##state, #state} 436 static const struct hda_dsp_msg_code fsr_bringup_state_names[] = { 437 FSR_BRINGUP_STATE_ENTRY(INIT), 438 FSR_BRINGUP_STATE_ENTRY(INIT_DONE), 439 FSR_BRINGUP_STATE_ENTRY(HPSRAM_LOAD), 440 FSR_BRINGUP_STATE_ENTRY(UNPACK_START), 441 FSR_BRINGUP_STATE_ENTRY(IMR_RESTORE), 442 FSR_BRINGUP_STATE_ENTRY(FW_ENTERED), 443 }; 444 445 #define FSR_WAIT_STATE_ENTRY(state) {FSR_WAIT_FOR_##state, #state} 446 static const struct hda_dsp_msg_code fsr_wait_state_names[] = { 447 FSR_WAIT_STATE_ENTRY(IPC_BUSY), 448 FSR_WAIT_STATE_ENTRY(IPC_DONE), 449 FSR_WAIT_STATE_ENTRY(CACHE_INVALIDATION), 450 FSR_WAIT_STATE_ENTRY(LP_SRAM_OFF), 451 FSR_WAIT_STATE_ENTRY(DMA_BUFFER_FULL), 452 FSR_WAIT_STATE_ENTRY(CSE_CSR), 453 }; 454 455 #define FSR_MODULE_NAME_ENTRY(mod) [FSR_MOD_##mod] = #mod 456 static const char * const fsr_module_names[] = { 457 FSR_MODULE_NAME_ENTRY(ROM), 458 FSR_MODULE_NAME_ENTRY(ROM_BYP), 459 FSR_MODULE_NAME_ENTRY(BASE_FW), 460 FSR_MODULE_NAME_ENTRY(LP_BOOT), 461 FSR_MODULE_NAME_ENTRY(BRNGUP), 462 FSR_MODULE_NAME_ENTRY(ROM_EXT), 463 }; 464 465 static const char * 466 hda_dsp_get_state_text(u32 code, const struct hda_dsp_msg_code *msg_code, 467 size_t array_size) 468 { 469 int i; 470 471 for (i = 0; i < array_size; i++) { 472 if (code == msg_code[i].code) 473 return msg_code[i].text; 474 } 475 476 return NULL; 477 } 478 479 static void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level) 480 { 481 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 482 const char *state_text, *error_text, *module_text; 483 u32 fsr, state, wait_state, module, error_code; 484 485 fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg); 486 state = FSR_TO_STATE_CODE(fsr); 487 wait_state = FSR_TO_WAIT_STATE_CODE(fsr); 488 module = FSR_TO_MODULE_CODE(fsr); 489 490 if (module > FSR_MOD_ROM_EXT) 491 module_text = "unknown"; 492 else 493 module_text = fsr_module_names[module]; 494 495 if (module == FSR_MOD_BRNGUP) 496 state_text = hda_dsp_get_state_text(state, fsr_bringup_state_names, 497 ARRAY_SIZE(fsr_bringup_state_names)); 498 else 499 state_text = hda_dsp_get_state_text(state, fsr_rom_state_names, 500 ARRAY_SIZE(fsr_rom_state_names)); 501 502 /* not for us, must be generic sof message */ 503 if (!state_text) { 504 dev_printk(level, sdev->dev, "%#010x: unknown ROM status value\n", fsr); 505 return; 506 } 507 508 if (wait_state) { 509 const char *wait_state_text; 510 511 wait_state_text = hda_dsp_get_state_text(wait_state, fsr_wait_state_names, 512 ARRAY_SIZE(fsr_wait_state_names)); 513 if (!wait_state_text) 514 wait_state_text = "unknown"; 515 516 dev_printk(level, sdev->dev, 517 "%#010x: module: %s, state: %s, waiting for: %s, %s\n", 518 fsr, module_text, state_text, wait_state_text, 519 fsr & FSR_HALTED ? "not running" : "running"); 520 } else { 521 dev_printk(level, sdev->dev, "%#010x: module: %s, state: %s, %s\n", 522 fsr, module_text, state_text, 523 fsr & FSR_HALTED ? "not running" : "running"); 524 } 525 526 error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4); 527 if (!error_code) 528 return; 529 530 error_text = hda_dsp_get_state_text(error_code, hda_dsp_rom_fw_error_texts, 531 ARRAY_SIZE(hda_dsp_rom_fw_error_texts)); 532 if (!error_text) 533 error_text = "unknown"; 534 535 if (state == FSR_STATE_FW_ENTERED) 536 dev_printk(level, sdev->dev, "status code: %#x (%s)\n", error_code, 537 error_text); 538 else 539 dev_printk(level, sdev->dev, "error code: %#x (%s)\n", error_code, 540 error_text); 541 } 542 543 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 544 struct sof_ipc_dsp_oops_xtensa *xoops, 545 struct sof_ipc_panic_info *panic_info, 546 u32 *stack, size_t stack_words) 547 { 548 u32 offset = sdev->dsp_oops_offset; 549 550 /* first read registers */ 551 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 552 553 /* note: variable AR register array is not read */ 554 555 /* then get panic info */ 556 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 557 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 558 xoops->arch_hdr.totalsize); 559 return; 560 } 561 offset += xoops->arch_hdr.totalsize; 562 sof_block_read(sdev, sdev->mmio_bar, offset, 563 panic_info, sizeof(*panic_info)); 564 565 /* then get the stack */ 566 offset += sizeof(*panic_info); 567 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 568 stack_words * sizeof(u32)); 569 } 570 571 /* dump the first 8 dwords representing the extended ROM status */ 572 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level, 573 u32 flags) 574 { 575 const struct sof_intel_dsp_desc *chip; 576 char msg[128]; 577 int len = 0; 578 u32 value; 579 int i; 580 581 chip = get_chip_info(sdev->pdata); 582 for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) { 583 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4); 584 len += scnprintf(msg + len, sizeof(msg) - len, " 0x%x", value); 585 } 586 587 dev_printk(level, sdev->dev, "extended rom status: %s", msg); 588 589 } 590 591 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 592 { 593 char *level = (flags & SOF_DBG_DUMP_OPTIONAL) ? KERN_DEBUG : KERN_ERR; 594 struct sof_ipc_dsp_oops_xtensa xoops; 595 struct sof_ipc_panic_info panic_info; 596 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 597 598 /* print ROM/FW status */ 599 hda_dsp_get_state(sdev, level); 600 601 /* The firmware register dump only available with IPC3 */ 602 if (flags & SOF_DBG_DUMP_REGS && sdev->pdata->ipc_type == SOF_IPC) { 603 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); 604 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 605 606 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 607 HDA_DSP_STACK_DUMP_SIZE); 608 sof_print_oops_and_stack(sdev, level, status, panic, &xoops, 609 &panic_info, stack, HDA_DSP_STACK_DUMP_SIZE); 610 } else { 611 hda_dsp_dump_ext_rom_status(sdev, level, flags); 612 } 613 } 614 615 static bool hda_check_ipc_irq(struct snd_sof_dev *sdev) 616 { 617 const struct sof_intel_dsp_desc *chip; 618 619 chip = get_chip_info(sdev->pdata); 620 if (chip && chip->check_ipc_irq) 621 return chip->check_ipc_irq(sdev); 622 623 return false; 624 } 625 626 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 627 { 628 struct hdac_bus *bus = sof_to_bus(sdev); 629 u32 adspis; 630 u32 intsts; 631 u32 intctl; 632 u32 ppsts; 633 u8 rirbsts; 634 635 /* read key IRQ stats and config registers */ 636 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 637 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 638 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 639 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 640 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 641 642 dev_err(sdev->dev, "hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 643 intsts, intctl, rirbsts); 644 dev_err(sdev->dev, "dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", ppsts, adspis); 645 } 646 647 void hda_ipc_dump(struct snd_sof_dev *sdev) 648 { 649 u32 hipcie; 650 u32 hipct; 651 u32 hipcctl; 652 653 hda_ipc_irq_dump(sdev); 654 655 /* read IPC status */ 656 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 657 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 658 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 659 660 /* dump the IPC regs */ 661 /* TODO: parse the raw msg */ 662 dev_err(sdev->dev, "host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 663 hipcie, hipct, hipcctl); 664 } 665 666 void hda_ipc4_dump(struct snd_sof_dev *sdev) 667 { 668 u32 hipci, hipcie, hipct, hipcte, hipcctl; 669 670 hda_ipc_irq_dump(sdev); 671 672 hipci = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI); 673 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 674 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 675 hipcte = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCTE); 676 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 677 678 /* dump the IPC regs */ 679 /* TODO: parse the raw msg */ 680 dev_err(sdev->dev, "Host IPC initiator: %#x|%#x, target: %#x|%#x, ctl: %#x\n", 681 hipci, hipcie, hipct, hipcte, hipcctl); 682 } 683 684 static int hda_init(struct snd_sof_dev *sdev) 685 { 686 struct hda_bus *hbus; 687 struct hdac_bus *bus; 688 struct pci_dev *pci = to_pci_dev(sdev->dev); 689 int ret; 690 691 hbus = sof_to_hbus(sdev); 692 bus = sof_to_bus(sdev); 693 694 /* HDA bus init */ 695 sof_hda_bus_init(bus, &pci->dev); 696 697 if (sof_hda_position_quirk == SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS) 698 bus->use_posbuf = 0; 699 else 700 bus->use_posbuf = 1; 701 bus->bdl_pos_adj = 0; 702 bus->sync_write = 1; 703 704 mutex_init(&hbus->prepare_mutex); 705 hbus->pci = pci; 706 hbus->mixer_assigned = -1; 707 hbus->modelname = hda_model; 708 709 /* initialise hdac bus */ 710 bus->addr = pci_resource_start(pci, 0); 711 bus->remap_addr = pci_ioremap_bar(pci, 0); 712 if (!bus->remap_addr) { 713 dev_err(bus->dev, "error: ioremap error\n"); 714 return -ENXIO; 715 } 716 717 /* HDA base */ 718 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 719 720 /* init i915 and HDMI codecs */ 721 ret = hda_codec_i915_init(sdev); 722 if (ret < 0) 723 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n"); 724 725 /* get controller capabilities */ 726 ret = hda_dsp_ctrl_get_caps(sdev); 727 if (ret < 0) 728 dev_err(sdev->dev, "error: get caps error\n"); 729 730 return ret; 731 } 732 733 static int check_dmic_num(struct snd_sof_dev *sdev) 734 { 735 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 736 struct nhlt_acpi_table *nhlt; 737 int dmic_num = 0; 738 739 nhlt = hdev->nhlt; 740 if (nhlt) 741 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 742 743 /* allow for module parameter override */ 744 if (dmic_num_override != -1) { 745 dev_dbg(sdev->dev, 746 "overriding DMICs detected in NHLT tables %d by kernel param %d\n", 747 dmic_num, dmic_num_override); 748 dmic_num = dmic_num_override; 749 } 750 751 if (dmic_num < 0 || dmic_num > 4) { 752 dev_dbg(sdev->dev, "invalid dmic_number %d\n", dmic_num); 753 dmic_num = 0; 754 } 755 756 return dmic_num; 757 } 758 759 static int check_nhlt_ssp_mask(struct snd_sof_dev *sdev) 760 { 761 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 762 struct nhlt_acpi_table *nhlt; 763 int ssp_mask = 0; 764 765 nhlt = hdev->nhlt; 766 if (!nhlt) 767 return ssp_mask; 768 769 if (intel_nhlt_has_endpoint_type(nhlt, NHLT_LINK_SSP)) { 770 ssp_mask = intel_nhlt_ssp_endpoint_mask(nhlt, NHLT_DEVICE_I2S); 771 if (ssp_mask) 772 dev_info(sdev->dev, "NHLT_DEVICE_I2S detected, ssp_mask %#x\n", ssp_mask); 773 } 774 775 return ssp_mask; 776 } 777 778 static int check_nhlt_ssp_mclk_mask(struct snd_sof_dev *sdev, int ssp_num) 779 { 780 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 781 struct nhlt_acpi_table *nhlt; 782 783 nhlt = hdev->nhlt; 784 if (!nhlt) 785 return 0; 786 787 return intel_nhlt_ssp_mclk_mask(nhlt, ssp_num); 788 } 789 790 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 791 792 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 793 const char *sof_tplg_filename, 794 const char *idisp_str, 795 const char *dmic_str) 796 { 797 const char *tplg_filename = NULL; 798 char *filename, *tmp; 799 const char *split_ext; 800 801 filename = kstrdup(sof_tplg_filename, GFP_KERNEL); 802 if (!filename) 803 return NULL; 804 805 /* this assumes a .tplg extension */ 806 tmp = filename; 807 split_ext = strsep(&tmp, "."); 808 if (split_ext) 809 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 810 "%s%s%s.tplg", 811 split_ext, idisp_str, dmic_str); 812 kfree(filename); 813 814 return tplg_filename; 815 } 816 817 static int dmic_detect_topology_fixup(struct snd_sof_dev *sdev, 818 const char **tplg_filename, 819 const char *idisp_str, 820 int *dmic_found, 821 bool tplg_fixup) 822 { 823 const char *dmic_str; 824 int dmic_num; 825 826 /* first check for DMICs (using NHLT or module parameter) */ 827 dmic_num = check_dmic_num(sdev); 828 829 switch (dmic_num) { 830 case 1: 831 dmic_str = "-1ch"; 832 break; 833 case 2: 834 dmic_str = "-2ch"; 835 break; 836 case 3: 837 dmic_str = "-3ch"; 838 break; 839 case 4: 840 dmic_str = "-4ch"; 841 break; 842 default: 843 dmic_num = 0; 844 dmic_str = ""; 845 break; 846 } 847 848 if (tplg_fixup) { 849 const char *default_tplg_filename = *tplg_filename; 850 const char *fixed_tplg_filename; 851 852 fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename, 853 idisp_str, dmic_str); 854 if (!fixed_tplg_filename) 855 return -ENOMEM; 856 *tplg_filename = fixed_tplg_filename; 857 } 858 859 dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num); 860 *dmic_found = dmic_num; 861 862 return 0; 863 } 864 #endif 865 866 static int hda_init_caps(struct snd_sof_dev *sdev) 867 { 868 struct hdac_bus *bus = sof_to_bus(sdev); 869 struct snd_sof_pdata *pdata = sdev->pdata; 870 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 871 struct hdac_ext_link *hlink; 872 #endif 873 struct sof_intel_hda_dev *hdev = pdata->hw_pdata; 874 u32 link_mask; 875 int ret = 0; 876 877 /* check if dsp is there */ 878 if (bus->ppcap) 879 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 880 881 /* Init HDA controller after i915 init */ 882 ret = hda_dsp_ctrl_init_chip(sdev, true); 883 if (ret < 0) { 884 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 885 ret); 886 return ret; 887 } 888 889 /* scan SoundWire capabilities exposed by DSDT */ 890 ret = hda_sdw_acpi_scan(sdev); 891 if (ret < 0) { 892 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n"); 893 goto skip_soundwire; 894 } 895 896 link_mask = hdev->info.link_mask; 897 if (!link_mask) { 898 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n"); 899 goto skip_soundwire; 900 } 901 902 /* 903 * probe/allocate SoundWire resources. 904 * The hardware configuration takes place in hda_sdw_startup 905 * after power rails are enabled. 906 * It's entirely possible to have a mix of I2S/DMIC/SoundWire 907 * devices, so we allocate the resources in all cases. 908 */ 909 ret = hda_sdw_probe(sdev); 910 if (ret < 0) { 911 dev_err(sdev->dev, "error: SoundWire probe error\n"); 912 return ret; 913 } 914 915 skip_soundwire: 916 917 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 918 if (bus->mlcap) 919 snd_hdac_ext_bus_get_ml_capabilities(bus); 920 921 /* create codec instances */ 922 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi); 923 924 if (!HDA_IDISP_CODEC(bus->codec_mask)) 925 hda_codec_i915_display_power(sdev, false); 926 927 /* 928 * we are done probing so decrement link counts 929 */ 930 list_for_each_entry(hlink, &bus->hlink_list, list) 931 snd_hdac_ext_bus_link_put(bus, hlink); 932 #endif 933 return 0; 934 } 935 936 static void hda_check_for_state_change(struct snd_sof_dev *sdev) 937 { 938 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 939 struct hdac_bus *bus = sof_to_bus(sdev); 940 unsigned int codec_mask; 941 942 codec_mask = snd_hdac_chip_readw(bus, STATESTS); 943 if (codec_mask) { 944 hda_codec_jack_check(sdev); 945 snd_hdac_chip_writew(bus, STATESTS, codec_mask); 946 } 947 #endif 948 } 949 950 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 951 { 952 struct snd_sof_dev *sdev = context; 953 954 /* 955 * Get global interrupt status. It includes all hardware interrupt 956 * sources in the Intel HD Audio controller. 957 */ 958 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 959 SOF_HDA_INTSTS_GIS) { 960 961 /* disable GIE interrupt */ 962 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 963 SOF_HDA_INTCTL, 964 SOF_HDA_INT_GLOBAL_EN, 965 0); 966 967 return IRQ_WAKE_THREAD; 968 } 969 970 return IRQ_NONE; 971 } 972 973 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 974 { 975 struct snd_sof_dev *sdev = context; 976 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 977 978 /* deal with streams and controller first */ 979 if (hda_dsp_check_stream_irq(sdev)) { 980 trace_sof_intel_hda_irq(sdev, "stream"); 981 hda_dsp_stream_threaded_handler(irq, sdev); 982 } 983 984 if (hda_check_ipc_irq(sdev)) { 985 trace_sof_intel_hda_irq(sdev, "ipc"); 986 sof_ops(sdev)->irq_thread(irq, sdev); 987 } 988 989 if (hda_dsp_check_sdw_irq(sdev)) { 990 trace_sof_intel_hda_irq(sdev, "sdw"); 991 hda_dsp_sdw_thread(irq, hdev->sdw); 992 } 993 994 if (hda_sdw_check_wakeen_irq(sdev)) { 995 trace_sof_intel_hda_irq(sdev, "wakeen"); 996 hda_sdw_process_wakeen(sdev); 997 } 998 999 hda_check_for_state_change(sdev); 1000 1001 /* enable GIE interrupt */ 1002 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 1003 SOF_HDA_INTCTL, 1004 SOF_HDA_INT_GLOBAL_EN, 1005 SOF_HDA_INT_GLOBAL_EN); 1006 1007 return IRQ_HANDLED; 1008 } 1009 1010 int hda_dsp_probe(struct snd_sof_dev *sdev) 1011 { 1012 struct pci_dev *pci = to_pci_dev(sdev->dev); 1013 struct sof_intel_hda_dev *hdev; 1014 struct hdac_bus *bus; 1015 const struct sof_intel_dsp_desc *chip; 1016 int ret = 0; 1017 1018 /* 1019 * detect DSP by checking class/subclass/prog-id information 1020 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 1021 * class=04 subclass 01 prog-if 00: DSP is present 1022 * (and may be required e.g. for DMIC or SSP support) 1023 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 1024 */ 1025 if (pci->class == 0x040300) { 1026 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 1027 return -ENODEV; 1028 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 1029 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 1030 return -ENODEV; 1031 } 1032 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 1033 1034 chip = get_chip_info(sdev->pdata); 1035 if (!chip) { 1036 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 1037 pci->device); 1038 ret = -EIO; 1039 goto err; 1040 } 1041 1042 sdev->num_cores = chip->cores_num; 1043 1044 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 1045 if (!hdev) 1046 return -ENOMEM; 1047 sdev->pdata->hw_pdata = hdev; 1048 hdev->desc = chip; 1049 1050 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 1051 PLATFORM_DEVID_NONE, 1052 NULL, 0); 1053 if (IS_ERR(hdev->dmic_dev)) { 1054 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 1055 return PTR_ERR(hdev->dmic_dev); 1056 } 1057 1058 /* 1059 * use position update IPC if either it is forced 1060 * or we don't have other choice 1061 */ 1062 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 1063 hdev->no_ipc_position = 0; 1064 #else 1065 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 1066 #endif 1067 1068 /* set up HDA base */ 1069 bus = sof_to_bus(sdev); 1070 ret = hda_init(sdev); 1071 if (ret < 0) 1072 goto hdac_bus_unmap; 1073 1074 /* DSP base */ 1075 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 1076 if (!sdev->bar[HDA_DSP_BAR]) { 1077 dev_err(sdev->dev, "error: ioremap error\n"); 1078 ret = -ENXIO; 1079 goto hdac_bus_unmap; 1080 } 1081 1082 sdev->mmio_bar = HDA_DSP_BAR; 1083 sdev->mailbox_bar = HDA_DSP_BAR; 1084 1085 /* allow 64bit DMA address if supported by H/W */ 1086 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) { 1087 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 1088 dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)); 1089 } 1090 dma_set_max_seg_size(&pci->dev, UINT_MAX); 1091 1092 /* init streams */ 1093 ret = hda_dsp_stream_init(sdev); 1094 if (ret < 0) { 1095 dev_err(sdev->dev, "error: failed to init streams\n"); 1096 /* 1097 * not all errors are due to memory issues, but trying 1098 * to free everything does not harm 1099 */ 1100 goto free_streams; 1101 } 1102 1103 /* 1104 * register our IRQ 1105 * let's try to enable msi firstly 1106 * if it fails, use legacy interrupt mode 1107 * TODO: support msi multiple vectors 1108 */ 1109 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 1110 dev_info(sdev->dev, "use msi interrupt mode\n"); 1111 sdev->ipc_irq = pci_irq_vector(pci, 0); 1112 /* initialised to "false" by kzalloc() */ 1113 sdev->msi_enabled = true; 1114 } 1115 1116 if (!sdev->msi_enabled) { 1117 dev_info(sdev->dev, "use legacy interrupt mode\n"); 1118 /* 1119 * in IO-APIC mode, hda->irq and ipc_irq are using the same 1120 * irq number of pci->irq 1121 */ 1122 sdev->ipc_irq = pci->irq; 1123 } 1124 1125 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 1126 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 1127 hda_dsp_interrupt_thread, 1128 IRQF_SHARED, "AudioDSP", sdev); 1129 if (ret < 0) { 1130 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 1131 sdev->ipc_irq); 1132 goto free_irq_vector; 1133 } 1134 1135 pci_set_master(pci); 1136 synchronize_irq(pci->irq); 1137 1138 /* 1139 * clear TCSEL to clear playback on some HD Audio 1140 * codecs. PCI TCSEL is defined in the Intel manuals. 1141 */ 1142 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 1143 1144 /* init HDA capabilities */ 1145 ret = hda_init_caps(sdev); 1146 if (ret < 0) 1147 goto free_ipc_irq; 1148 1149 /* enable ppcap interrupt */ 1150 hda_dsp_ctrl_ppcap_enable(sdev, true); 1151 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 1152 1153 /* set default mailbox offset for FW ready message */ 1154 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 1155 1156 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work); 1157 1158 init_waitqueue_head(&hdev->waitq); 1159 1160 hdev->nhlt = intel_nhlt_init(sdev->dev); 1161 1162 return 0; 1163 1164 free_ipc_irq: 1165 free_irq(sdev->ipc_irq, sdev); 1166 free_irq_vector: 1167 if (sdev->msi_enabled) 1168 pci_free_irq_vectors(pci); 1169 free_streams: 1170 hda_dsp_stream_free(sdev); 1171 /* dsp_unmap: not currently used */ 1172 iounmap(sdev->bar[HDA_DSP_BAR]); 1173 hdac_bus_unmap: 1174 platform_device_unregister(hdev->dmic_dev); 1175 iounmap(bus->remap_addr); 1176 hda_codec_i915_exit(sdev); 1177 err: 1178 return ret; 1179 } 1180 1181 int hda_dsp_remove(struct snd_sof_dev *sdev) 1182 { 1183 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1184 const struct sof_intel_dsp_desc *chip = hda->desc; 1185 struct hdac_bus *bus = sof_to_bus(sdev); 1186 struct pci_dev *pci = to_pci_dev(sdev->dev); 1187 struct nhlt_acpi_table *nhlt = hda->nhlt; 1188 1189 if (nhlt) 1190 intel_nhlt_free(nhlt); 1191 1192 /* cancel any attempt for DSP D0I3 */ 1193 cancel_delayed_work_sync(&hda->d0i3_work); 1194 1195 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1196 /* codec removal, invoke bus_device_remove */ 1197 snd_hdac_ext_bus_device_remove(bus); 1198 #endif 1199 1200 hda_sdw_exit(sdev); 1201 1202 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 1203 platform_device_unregister(hda->dmic_dev); 1204 1205 /* disable DSP IRQ */ 1206 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1207 SOF_HDA_PPCTL_PIE, 0); 1208 1209 /* disable CIE and GIE interrupts */ 1210 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 1211 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 1212 1213 /* no need to check for error as the DSP will be disabled anyway */ 1214 if (chip && chip->power_down_dsp) 1215 chip->power_down_dsp(sdev); 1216 1217 /* disable DSP */ 1218 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1219 SOF_HDA_PPCTL_GPROCEN, 0); 1220 1221 free_irq(sdev->ipc_irq, sdev); 1222 if (sdev->msi_enabled) 1223 pci_free_irq_vectors(pci); 1224 1225 hda_dsp_stream_free(sdev); 1226 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1227 snd_hdac_link_free_all(bus); 1228 #endif 1229 1230 iounmap(sdev->bar[HDA_DSP_BAR]); 1231 iounmap(bus->remap_addr); 1232 1233 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1234 snd_hdac_ext_bus_exit(bus); 1235 #endif 1236 hda_codec_i915_exit(sdev); 1237 1238 return 0; 1239 } 1240 1241 int hda_power_down_dsp(struct snd_sof_dev *sdev) 1242 { 1243 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1244 const struct sof_intel_dsp_desc *chip = hda->desc; 1245 1246 return hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); 1247 } 1248 1249 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1250 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1251 struct snd_soc_acpi_mach **mach) 1252 { 1253 struct hdac_bus *bus = sof_to_bus(sdev); 1254 struct snd_soc_acpi_mach_params *mach_params; 1255 struct snd_soc_acpi_mach *hda_mach; 1256 struct snd_sof_pdata *pdata = sdev->pdata; 1257 const char *tplg_filename; 1258 const char *idisp_str; 1259 int dmic_num = 0; 1260 int codec_num = 0; 1261 int ret; 1262 int i; 1263 1264 /* codec detection */ 1265 if (!bus->codec_mask) { 1266 dev_info(bus->dev, "no hda codecs found!\n"); 1267 } else { 1268 dev_info(bus->dev, "hda codecs found, mask %lx\n", 1269 bus->codec_mask); 1270 1271 for (i = 0; i < HDA_MAX_CODECS; i++) { 1272 if (bus->codec_mask & (1 << i)) 1273 codec_num++; 1274 } 1275 1276 /* 1277 * If no machine driver is found, then: 1278 * 1279 * generic hda machine driver can handle: 1280 * - one HDMI codec, and/or 1281 * - one external HDAudio codec 1282 */ 1283 if (!*mach && codec_num <= 2) { 1284 bool tplg_fixup; 1285 1286 hda_mach = snd_soc_acpi_intel_hda_machines; 1287 1288 dev_info(bus->dev, "using HDA machine driver %s now\n", 1289 hda_mach->drv_name); 1290 1291 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask)) 1292 idisp_str = "-idisp"; 1293 else 1294 idisp_str = ""; 1295 1296 /* topology: use the info from hda_machines */ 1297 if (pdata->tplg_filename) { 1298 tplg_fixup = false; 1299 tplg_filename = pdata->tplg_filename; 1300 } else { 1301 tplg_fixup = true; 1302 tplg_filename = hda_mach->sof_tplg_filename; 1303 } 1304 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num, 1305 tplg_fixup); 1306 if (ret < 0) 1307 return; 1308 1309 hda_mach->mach_params.dmic_num = dmic_num; 1310 pdata->tplg_filename = tplg_filename; 1311 1312 if (codec_num == 2) { 1313 /* 1314 * Prevent SoundWire links from starting when an external 1315 * HDaudio codec is used 1316 */ 1317 hda_mach->mach_params.link_mask = 0; 1318 } 1319 1320 *mach = hda_mach; 1321 } 1322 } 1323 1324 /* used by hda machine driver to create dai links */ 1325 if (*mach) { 1326 mach_params = &(*mach)->mach_params; 1327 mach_params->codec_mask = bus->codec_mask; 1328 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi; 1329 } 1330 } 1331 #else 1332 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1333 struct snd_soc_acpi_mach **mach) 1334 { 1335 } 1336 #endif 1337 1338 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 1339 1340 #define SDW_CODEC_ADR_MASK(_adr) ((_adr) & (SDW_DISCO_LINK_ID_MASK | SDW_VERSION_MASK | \ 1341 SDW_MFG_ID_MASK | SDW_PART_ID_MASK)) 1342 1343 /* Check if all Slaves defined on the link can be found */ 1344 static bool link_slaves_found(struct snd_sof_dev *sdev, 1345 const struct snd_soc_acpi_link_adr *link, 1346 struct sdw_intel_ctx *sdw) 1347 { 1348 struct hdac_bus *bus = sof_to_bus(sdev); 1349 struct sdw_intel_slave_id *ids = sdw->ids; 1350 int num_slaves = sdw->num_slaves; 1351 unsigned int part_id, link_id, unique_id, mfg_id, version; 1352 int i, j, k; 1353 1354 for (i = 0; i < link->num_adr; i++) { 1355 u64 adr = link->adr_d[i].adr; 1356 int reported_part_count = 0; 1357 1358 mfg_id = SDW_MFG_ID(adr); 1359 part_id = SDW_PART_ID(adr); 1360 link_id = SDW_DISCO_LINK_ID(adr); 1361 version = SDW_VERSION(adr); 1362 1363 for (j = 0; j < num_slaves; j++) { 1364 /* find out how many identical parts were reported on that link */ 1365 if (ids[j].link_id == link_id && 1366 ids[j].id.part_id == part_id && 1367 ids[j].id.mfg_id == mfg_id && 1368 ids[j].id.sdw_version == version) 1369 reported_part_count++; 1370 } 1371 1372 for (j = 0; j < num_slaves; j++) { 1373 int expected_part_count = 0; 1374 1375 if (ids[j].link_id != link_id || 1376 ids[j].id.part_id != part_id || 1377 ids[j].id.mfg_id != mfg_id || 1378 ids[j].id.sdw_version != version) 1379 continue; 1380 1381 /* find out how many identical parts are expected */ 1382 for (k = 0; k < link->num_adr; k++) { 1383 u64 adr2 = link->adr_d[k].adr; 1384 1385 if (SDW_CODEC_ADR_MASK(adr2) == SDW_CODEC_ADR_MASK(adr)) 1386 expected_part_count++; 1387 } 1388 1389 if (reported_part_count == expected_part_count) { 1390 /* 1391 * we have to check unique id 1392 * if there is more than one 1393 * Slave on the link 1394 */ 1395 unique_id = SDW_UNIQUE_ID(adr); 1396 if (reported_part_count == 1 || 1397 ids[j].id.unique_id == unique_id) { 1398 dev_dbg(bus->dev, "found %x at link %d\n", 1399 part_id, link_id); 1400 break; 1401 } 1402 } else { 1403 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n", 1404 part_id, reported_part_count, expected_part_count, link_id); 1405 } 1406 } 1407 if (j == num_slaves) { 1408 dev_dbg(bus->dev, 1409 "Slave %x not found\n", 1410 part_id); 1411 return false; 1412 } 1413 } 1414 return true; 1415 } 1416 1417 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1418 { 1419 struct snd_sof_pdata *pdata = sdev->pdata; 1420 const struct snd_soc_acpi_link_adr *link; 1421 struct snd_soc_acpi_mach *mach; 1422 struct sof_intel_hda_dev *hdev; 1423 u32 link_mask; 1424 int i; 1425 1426 hdev = pdata->hw_pdata; 1427 link_mask = hdev->info.link_mask; 1428 1429 /* 1430 * Select SoundWire machine driver if needed using the 1431 * alternate tables. This case deals with SoundWire-only 1432 * machines, for mixed cases with I2C/I2S the detection relies 1433 * on the HID list. 1434 */ 1435 if (link_mask) { 1436 for (mach = pdata->desc->alt_machines; 1437 mach && mach->link_mask; mach++) { 1438 /* 1439 * On some platforms such as Up Extreme all links 1440 * are enabled but only one link can be used by 1441 * external codec. Instead of exact match of two masks, 1442 * first check whether link_mask of mach is subset of 1443 * link_mask supported by hw and then go on searching 1444 * link_adr 1445 */ 1446 if (~link_mask & mach->link_mask) 1447 continue; 1448 1449 /* No need to match adr if there is no links defined */ 1450 if (!mach->links) 1451 break; 1452 1453 link = mach->links; 1454 for (i = 0; i < hdev->info.count && link->num_adr; 1455 i++, link++) { 1456 /* 1457 * Try next machine if any expected Slaves 1458 * are not found on this link. 1459 */ 1460 if (!link_slaves_found(sdev, link, hdev->sdw)) 1461 break; 1462 } 1463 /* Found if all Slaves are checked */ 1464 if (i == hdev->info.count || !link->num_adr) 1465 break; 1466 } 1467 if (mach && mach->link_mask) { 1468 int dmic_num = 0; 1469 bool tplg_fixup; 1470 const char *tplg_filename; 1471 1472 mach->mach_params.links = mach->links; 1473 mach->mach_params.link_mask = mach->link_mask; 1474 mach->mach_params.platform = dev_name(sdev->dev); 1475 1476 if (pdata->tplg_filename) { 1477 tplg_fixup = false; 1478 } else { 1479 tplg_fixup = true; 1480 tplg_filename = mach->sof_tplg_filename; 1481 } 1482 1483 /* 1484 * DMICs use up to 4 pins and are typically pin-muxed with SoundWire 1485 * link 2 and 3, or link 1 and 2, thus we only try to enable dmics 1486 * if all conditions are true: 1487 * a) 2 or fewer links are used by SoundWire 1488 * b) the NHLT table reports the presence of microphones 1489 */ 1490 if (hweight_long(mach->link_mask) <= 2) { 1491 int ret; 1492 1493 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, "", 1494 &dmic_num, tplg_fixup); 1495 if (ret < 0) 1496 return NULL; 1497 } 1498 if (tplg_fixup) 1499 pdata->tplg_filename = tplg_filename; 1500 mach->mach_params.dmic_num = dmic_num; 1501 1502 dev_dbg(sdev->dev, 1503 "SoundWire machine driver %s topology %s\n", 1504 mach->drv_name, 1505 pdata->tplg_filename); 1506 1507 return mach; 1508 } 1509 1510 dev_info(sdev->dev, "No SoundWire machine driver found\n"); 1511 } 1512 1513 return NULL; 1514 } 1515 #else 1516 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1517 { 1518 return NULL; 1519 } 1520 #endif 1521 1522 void hda_set_mach_params(struct snd_soc_acpi_mach *mach, 1523 struct snd_sof_dev *sdev) 1524 { 1525 struct snd_sof_pdata *pdata = sdev->pdata; 1526 const struct sof_dev_desc *desc = pdata->desc; 1527 struct snd_soc_acpi_mach_params *mach_params; 1528 1529 mach_params = &mach->mach_params; 1530 mach_params->platform = dev_name(sdev->dev); 1531 mach_params->num_dai_drivers = desc->ops->num_drv; 1532 mach_params->dai_drivers = desc->ops->drv; 1533 } 1534 1535 struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev) 1536 { 1537 struct snd_sof_pdata *sof_pdata = sdev->pdata; 1538 const struct sof_dev_desc *desc = sof_pdata->desc; 1539 struct snd_soc_acpi_mach *mach; 1540 const char *tplg_filename; 1541 1542 mach = snd_soc_acpi_find_machine(desc->machines); 1543 if (mach) { 1544 bool add_extension = false; 1545 bool tplg_fixup = false; 1546 1547 /* 1548 * If tplg file name is overridden, use it instead of 1549 * the one set in mach table 1550 */ 1551 if (!sof_pdata->tplg_filename) { 1552 sof_pdata->tplg_filename = mach->sof_tplg_filename; 1553 tplg_fixup = true; 1554 } 1555 1556 /* report to machine driver if any DMICs are found */ 1557 mach->mach_params.dmic_num = check_dmic_num(sdev); 1558 1559 if (tplg_fixup && 1560 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER && 1561 mach->mach_params.dmic_num) { 1562 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1563 "%s%s%d%s", 1564 sof_pdata->tplg_filename, 1565 "-dmic", 1566 mach->mach_params.dmic_num, 1567 "ch"); 1568 if (!tplg_filename) 1569 return NULL; 1570 1571 sof_pdata->tplg_filename = tplg_filename; 1572 add_extension = true; 1573 } 1574 1575 if (mach->link_mask) { 1576 mach->mach_params.links = mach->links; 1577 mach->mach_params.link_mask = mach->link_mask; 1578 } 1579 1580 /* report SSP link mask to machine driver */ 1581 mach->mach_params.i2s_link_mask = check_nhlt_ssp_mask(sdev); 1582 1583 if (tplg_fixup && 1584 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER && 1585 mach->mach_params.i2s_link_mask) { 1586 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 1587 int ssp_num; 1588 int mclk_mask; 1589 1590 if (hweight_long(mach->mach_params.i2s_link_mask) > 1 && 1591 !(mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_MSB)) 1592 dev_warn(sdev->dev, "More than one SSP exposed by NHLT, choosing MSB\n"); 1593 1594 /* fls returns 1-based results, SSPs indices are 0-based */ 1595 ssp_num = fls(mach->mach_params.i2s_link_mask) - 1; 1596 1597 if (ssp_num >= chip->ssp_count) { 1598 dev_err(sdev->dev, "Invalid SSP %d, max on this platform is %d\n", 1599 ssp_num, chip->ssp_count); 1600 return NULL; 1601 } 1602 1603 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1604 "%s%s%d", 1605 sof_pdata->tplg_filename, 1606 "-ssp", 1607 ssp_num); 1608 if (!tplg_filename) 1609 return NULL; 1610 1611 sof_pdata->tplg_filename = tplg_filename; 1612 add_extension = true; 1613 1614 mclk_mask = check_nhlt_ssp_mclk_mask(sdev, ssp_num); 1615 1616 if (mclk_mask < 0) { 1617 dev_err(sdev->dev, "Invalid MCLK configuration\n"); 1618 return NULL; 1619 } 1620 1621 dev_dbg(sdev->dev, "MCLK mask %#x found in NHLT\n", mclk_mask); 1622 1623 if (mclk_mask) { 1624 dev_info(sdev->dev, "Overriding topology with MCLK mask %#x from NHLT\n", mclk_mask); 1625 sdev->mclk_id_override = true; 1626 sdev->mclk_id_quirk = (mclk_mask & BIT(0)) ? 0 : 1; 1627 } 1628 } 1629 1630 if (tplg_fixup && add_extension) { 1631 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1632 "%s%s", 1633 sof_pdata->tplg_filename, 1634 ".tplg"); 1635 if (!tplg_filename) 1636 return NULL; 1637 1638 sof_pdata->tplg_filename = tplg_filename; 1639 } 1640 1641 /* check if mclk_id should be modified from topology defaults */ 1642 if (mclk_id_override >= 0) { 1643 dev_info(sdev->dev, "Overriding topology with MCLK %d from kernel_parameter\n", mclk_id_override); 1644 sdev->mclk_id_override = true; 1645 sdev->mclk_id_quirk = mclk_id_override; 1646 } 1647 } 1648 1649 /* 1650 * If I2S fails, try SoundWire 1651 */ 1652 if (!mach) 1653 mach = hda_sdw_machine_select(sdev); 1654 1655 /* 1656 * Choose HDA generic machine driver if mach is NULL. 1657 * Otherwise, set certain mach params. 1658 */ 1659 hda_generic_machine_select(sdev, &mach); 1660 if (!mach) 1661 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 1662 1663 return mach; 1664 } 1665 1666 int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1667 { 1668 int ret; 1669 1670 ret = snd_intel_dsp_driver_probe(pci); 1671 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) { 1672 dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n"); 1673 return -ENODEV; 1674 } 1675 1676 return sof_pci_probe(pci, pci_id); 1677 } 1678 EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON); 1679 1680 int hda_register_clients(struct snd_sof_dev *sdev) 1681 { 1682 return hda_probes_register(sdev); 1683 } 1684 1685 void hda_unregister_clients(struct snd_sof_dev *sdev) 1686 { 1687 hda_probes_unregister(sdev); 1688 } 1689 1690 MODULE_LICENSE("Dual BSD/GPL"); 1691 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); 1692 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 1693 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 1694 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 1695 MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI); 1696 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT); 1697