1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/module.h> 22 #include <sound/intel-nhlt.h> 23 #include <sound/sof.h> 24 #include <sound/sof/xtensa.h> 25 #include "../ops.h" 26 #include "hda.h" 27 28 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 29 #include <sound/soc-acpi-intel-match.h> 30 #endif 31 32 /* platform specific devices */ 33 #include "shim.h" 34 35 #define EXCEPT_MAX_HDR_SIZE 0x400 36 37 /* 38 * Debug 39 */ 40 41 struct hda_dsp_msg_code { 42 u32 code; 43 const char *msg; 44 }; 45 46 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI); 47 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 48 module_param_named(use_msi, hda_use_msi, bool, 0444); 49 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 50 #endif 51 52 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 53 static int hda_dmic_num = -1; 54 module_param_named(dmic_num, hda_dmic_num, int, 0444); 55 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 56 57 static bool hda_codec_use_common_hdmi = 58 IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_COMMON_HDMI_CODEC); 59 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); 60 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver"); 61 #endif 62 63 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = { 64 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"}, 65 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"}, 66 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"}, 67 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 68 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 69 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 70 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 71 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 72 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 73 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 74 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 75 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 76 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 77 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 78 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 79 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 80 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 81 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 82 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 83 }; 84 85 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev) 86 { 87 u32 status; 88 int i; 89 90 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 91 HDA_ADSP_FW_STATUS_SKL); 92 93 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 94 if (status == hda_dsp_rom_msg[i].code) { 95 dev_err(sdev->dev, "%s - code %8.8x\n", 96 hda_dsp_rom_msg[i].msg, status); 97 return; 98 } 99 } 100 101 /* not for us, must be generic sof message */ 102 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 103 } 104 105 static void hda_dsp_get_status(struct snd_sof_dev *sdev) 106 { 107 u32 status; 108 int i; 109 110 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 111 HDA_DSP_SRAM_REG_ROM_STATUS); 112 113 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 114 if (status == hda_dsp_rom_msg[i].code) { 115 dev_err(sdev->dev, "%s - code %8.8x\n", 116 hda_dsp_rom_msg[i].msg, status); 117 return; 118 } 119 } 120 121 /* not for us, must be generic sof message */ 122 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 123 } 124 125 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 126 struct sof_ipc_dsp_oops_xtensa *xoops, 127 struct sof_ipc_panic_info *panic_info, 128 u32 *stack, size_t stack_words) 129 { 130 u32 offset = sdev->dsp_oops_offset; 131 132 /* first read registers */ 133 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 134 135 /* note: variable AR register array is not read */ 136 137 /* then get panic info */ 138 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 139 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 140 xoops->arch_hdr.totalsize); 141 return; 142 } 143 offset += xoops->arch_hdr.totalsize; 144 sof_block_read(sdev, sdev->mmio_bar, offset, 145 panic_info, sizeof(*panic_info)); 146 147 /* then get the stack */ 148 offset += sizeof(*panic_info); 149 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 150 stack_words * sizeof(u32)); 151 } 152 153 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags) 154 { 155 struct sof_ipc_dsp_oops_xtensa xoops; 156 struct sof_ipc_panic_info panic_info; 157 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 158 u32 status, panic; 159 160 /* try APL specific status message types first */ 161 hda_dsp_get_status_skl(sdev); 162 163 /* now try generic SOF status messages */ 164 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 165 HDA_ADSP_ERROR_CODE_SKL); 166 167 /*TODO: Check: there is no define in spec, but it is used in the code*/ 168 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 169 HDA_ADSP_ERROR_CODE_SKL + 0x4); 170 171 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 172 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 173 HDA_DSP_STACK_DUMP_SIZE); 174 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 175 stack, HDA_DSP_STACK_DUMP_SIZE); 176 } else { 177 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 178 status, panic); 179 hda_dsp_get_status_skl(sdev); 180 } 181 } 182 183 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 184 { 185 struct sof_ipc_dsp_oops_xtensa xoops; 186 struct sof_ipc_panic_info panic_info; 187 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 188 u32 status, panic; 189 190 /* try APL specific status message types first */ 191 hda_dsp_get_status(sdev); 192 193 /* now try generic SOF status messages */ 194 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 195 HDA_DSP_SRAM_REG_FW_STATUS); 196 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 197 198 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 199 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 200 HDA_DSP_STACK_DUMP_SIZE); 201 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 202 stack, HDA_DSP_STACK_DUMP_SIZE); 203 } else { 204 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n", 205 status, panic); 206 hda_dsp_get_status(sdev); 207 } 208 } 209 210 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 211 { 212 struct hdac_bus *bus = sof_to_bus(sdev); 213 u32 adspis; 214 u32 intsts; 215 u32 intctl; 216 u32 ppsts; 217 u8 rirbsts; 218 219 /* read key IRQ stats and config registers */ 220 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 221 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 222 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 223 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 224 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 225 226 dev_err(sdev->dev, 227 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 228 intsts, intctl, rirbsts); 229 dev_err(sdev->dev, 230 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", 231 ppsts, adspis); 232 } 233 234 void hda_ipc_dump(struct snd_sof_dev *sdev) 235 { 236 u32 hipcie; 237 u32 hipct; 238 u32 hipcctl; 239 240 hda_ipc_irq_dump(sdev); 241 242 /* read IPC status */ 243 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 244 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 245 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 246 247 /* dump the IPC regs */ 248 /* TODO: parse the raw msg */ 249 dev_err(sdev->dev, 250 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 251 hipcie, hipct, hipcctl); 252 } 253 254 static int hda_init(struct snd_sof_dev *sdev) 255 { 256 struct hda_bus *hbus; 257 struct hdac_bus *bus; 258 struct pci_dev *pci = to_pci_dev(sdev->dev); 259 int ret; 260 261 hbus = sof_to_hbus(sdev); 262 bus = sof_to_bus(sdev); 263 264 /* HDA bus init */ 265 sof_hda_bus_init(bus, &pci->dev); 266 267 bus->use_posbuf = 1; 268 bus->bdl_pos_adj = 0; 269 bus->sync_write = 1; 270 271 mutex_init(&hbus->prepare_mutex); 272 hbus->pci = pci; 273 hbus->mixer_assigned = -1; 274 hbus->modelname = "sofbus"; 275 276 /* initialise hdac bus */ 277 bus->addr = pci_resource_start(pci, 0); 278 #if IS_ENABLED(CONFIG_PCI) 279 bus->remap_addr = pci_ioremap_bar(pci, 0); 280 #endif 281 if (!bus->remap_addr) { 282 dev_err(bus->dev, "error: ioremap error\n"); 283 return -ENXIO; 284 } 285 286 /* HDA base */ 287 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 288 289 /* get controller capabilities */ 290 ret = hda_dsp_ctrl_get_caps(sdev); 291 if (ret < 0) 292 dev_err(sdev->dev, "error: get caps error\n"); 293 294 return ret; 295 } 296 297 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 298 299 static int check_nhlt_dmic(struct snd_sof_dev *sdev) 300 { 301 struct nhlt_acpi_table *nhlt; 302 int dmic_num; 303 304 nhlt = intel_nhlt_init(sdev->dev); 305 if (nhlt) { 306 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 307 intel_nhlt_free(nhlt); 308 if (dmic_num == 2 || dmic_num == 4) 309 return dmic_num; 310 } 311 312 return 0; 313 } 314 315 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 316 const char *sof_tplg_filename, 317 const char *idisp_str, 318 const char *dmic_str) 319 { 320 const char *tplg_filename = NULL; 321 char *filename; 322 char *split_ext; 323 324 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL); 325 if (!filename) 326 return NULL; 327 328 /* this assumes a .tplg extension */ 329 split_ext = strsep(&filename, "."); 330 if (split_ext) { 331 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 332 "%s%s%s.tplg", 333 split_ext, idisp_str, dmic_str); 334 if (!tplg_filename) 335 return NULL; 336 } 337 return tplg_filename; 338 } 339 340 #endif 341 342 static int hda_init_caps(struct snd_sof_dev *sdev) 343 { 344 struct hdac_bus *bus = sof_to_bus(sdev); 345 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 346 struct hdac_ext_link *hlink; 347 #endif 348 int ret = 0; 349 350 device_disable_async_suspend(bus->dev); 351 352 /* check if dsp is there */ 353 if (bus->ppcap) 354 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 355 356 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 357 /* init i915 and HDMI codecs */ 358 ret = hda_codec_i915_init(sdev); 359 if (ret < 0) { 360 dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n"); 361 return ret; 362 } 363 #endif 364 365 /* Init HDA controller after i915 init */ 366 ret = hda_dsp_ctrl_init_chip(sdev, true); 367 if (ret < 0) { 368 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 369 ret); 370 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 371 hda_codec_i915_exit(sdev); 372 #endif 373 return ret; 374 } 375 376 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 377 if (bus->mlcap) 378 snd_hdac_ext_bus_get_ml_capabilities(bus); 379 380 /* create codec instances */ 381 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi); 382 383 if (!HDA_IDISP_CODEC(bus->codec_mask)) 384 hda_codec_i915_display_power(sdev, false); 385 386 /* 387 * we are done probing so decrement link counts 388 */ 389 list_for_each_entry(hlink, &bus->hlink_list, list) 390 snd_hdac_ext_bus_link_put(bus, hlink); 391 #endif 392 return 0; 393 } 394 395 static const struct sof_intel_dsp_desc 396 *get_chip_info(struct snd_sof_pdata *pdata) 397 { 398 const struct sof_dev_desc *desc = pdata->desc; 399 const struct sof_intel_dsp_desc *chip_info; 400 401 chip_info = desc->chip_info; 402 403 return chip_info; 404 } 405 406 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 407 { 408 struct snd_sof_dev *sdev = context; 409 410 /* 411 * Get global interrupt status. It includes all hardware interrupt 412 * sources in the Intel HD Audio controller. 413 */ 414 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 415 SOF_HDA_INTSTS_GIS) { 416 417 /* disable GIE interrupt */ 418 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 419 SOF_HDA_INTCTL, 420 SOF_HDA_INT_GLOBAL_EN, 421 0); 422 423 return IRQ_WAKE_THREAD; 424 } 425 426 return IRQ_NONE; 427 } 428 429 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 430 { 431 struct snd_sof_dev *sdev = context; 432 433 /* deal with streams and controller first */ 434 if (hda_dsp_check_stream_irq(sdev)) 435 hda_dsp_stream_threaded_handler(irq, sdev); 436 437 if (hda_dsp_check_ipc_irq(sdev)) 438 sof_ops(sdev)->irq_thread(irq, sdev); 439 440 /* enable GIE interrupt */ 441 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 442 SOF_HDA_INTCTL, 443 SOF_HDA_INT_GLOBAL_EN, 444 SOF_HDA_INT_GLOBAL_EN); 445 446 return IRQ_HANDLED; 447 } 448 449 int hda_dsp_probe(struct snd_sof_dev *sdev) 450 { 451 struct pci_dev *pci = to_pci_dev(sdev->dev); 452 struct sof_intel_hda_dev *hdev; 453 struct hdac_bus *bus; 454 const struct sof_intel_dsp_desc *chip; 455 int ret = 0; 456 457 /* 458 * detect DSP by checking class/subclass/prog-id information 459 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 460 * class=04 subclass 01 prog-if 00: DSP is present 461 * (and may be required e.g. for DMIC or SSP support) 462 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 463 */ 464 if (pci->class == 0x040300) { 465 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 466 return -ENODEV; 467 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 468 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 469 return -ENODEV; 470 } 471 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 472 473 chip = get_chip_info(sdev->pdata); 474 if (!chip) { 475 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 476 pci->device); 477 ret = -EIO; 478 goto err; 479 } 480 481 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 482 if (!hdev) 483 return -ENOMEM; 484 sdev->pdata->hw_pdata = hdev; 485 hdev->desc = chip; 486 487 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 488 PLATFORM_DEVID_NONE, 489 NULL, 0); 490 if (IS_ERR(hdev->dmic_dev)) { 491 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 492 return PTR_ERR(hdev->dmic_dev); 493 } 494 495 /* 496 * use position update IPC if either it is forced 497 * or we don't have other choice 498 */ 499 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 500 hdev->no_ipc_position = 0; 501 #else 502 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 503 #endif 504 505 /* set up HDA base */ 506 bus = sof_to_bus(sdev); 507 ret = hda_init(sdev); 508 if (ret < 0) 509 goto hdac_bus_unmap; 510 511 /* DSP base */ 512 #if IS_ENABLED(CONFIG_PCI) 513 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 514 #endif 515 if (!sdev->bar[HDA_DSP_BAR]) { 516 dev_err(sdev->dev, "error: ioremap error\n"); 517 ret = -ENXIO; 518 goto hdac_bus_unmap; 519 } 520 521 sdev->mmio_bar = HDA_DSP_BAR; 522 sdev->mailbox_bar = HDA_DSP_BAR; 523 524 /* allow 64bit DMA address if supported by H/W */ 525 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) { 526 dev_dbg(sdev->dev, "DMA mask is 64 bit\n"); 527 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64)); 528 } else { 529 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 530 dma_set_mask(&pci->dev, DMA_BIT_MASK(32)); 531 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)); 532 } 533 534 /* init streams */ 535 ret = hda_dsp_stream_init(sdev); 536 if (ret < 0) { 537 dev_err(sdev->dev, "error: failed to init streams\n"); 538 /* 539 * not all errors are due to memory issues, but trying 540 * to free everything does not harm 541 */ 542 goto free_streams; 543 } 544 545 /* 546 * register our IRQ 547 * let's try to enable msi firstly 548 * if it fails, use legacy interrupt mode 549 * TODO: support msi multiple vectors 550 */ 551 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 552 dev_info(sdev->dev, "use msi interrupt mode\n"); 553 sdev->ipc_irq = pci_irq_vector(pci, 0); 554 /* initialised to "false" by kzalloc() */ 555 sdev->msi_enabled = true; 556 } 557 558 if (!sdev->msi_enabled) { 559 dev_info(sdev->dev, "use legacy interrupt mode\n"); 560 /* 561 * in IO-APIC mode, hda->irq and ipc_irq are using the same 562 * irq number of pci->irq 563 */ 564 sdev->ipc_irq = pci->irq; 565 } 566 567 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 568 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 569 hda_dsp_interrupt_thread, 570 IRQF_SHARED, "AudioDSP", sdev); 571 if (ret < 0) { 572 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 573 sdev->ipc_irq); 574 goto free_irq_vector; 575 } 576 577 pci_set_master(pci); 578 synchronize_irq(pci->irq); 579 580 /* 581 * clear TCSEL to clear playback on some HD Audio 582 * codecs. PCI TCSEL is defined in the Intel manuals. 583 */ 584 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 585 586 /* init HDA capabilities */ 587 ret = hda_init_caps(sdev); 588 if (ret < 0) 589 goto free_ipc_irq; 590 591 /* enable ppcap interrupt */ 592 hda_dsp_ctrl_ppcap_enable(sdev, true); 593 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 594 595 /* initialize waitq for code loading */ 596 init_waitqueue_head(&sdev->waitq); 597 598 /* set default mailbox offset for FW ready message */ 599 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 600 601 return 0; 602 603 free_ipc_irq: 604 free_irq(sdev->ipc_irq, sdev); 605 free_irq_vector: 606 if (sdev->msi_enabled) 607 pci_free_irq_vectors(pci); 608 free_streams: 609 hda_dsp_stream_free(sdev); 610 /* dsp_unmap: not currently used */ 611 iounmap(sdev->bar[HDA_DSP_BAR]); 612 hdac_bus_unmap: 613 iounmap(bus->remap_addr); 614 err: 615 return ret; 616 } 617 618 int hda_dsp_remove(struct snd_sof_dev *sdev) 619 { 620 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 621 struct hdac_bus *bus = sof_to_bus(sdev); 622 struct pci_dev *pci = to_pci_dev(sdev->dev); 623 const struct sof_intel_dsp_desc *chip = hda->desc; 624 625 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 626 /* codec removal, invoke bus_device_remove */ 627 snd_hdac_ext_bus_device_remove(bus); 628 #endif 629 630 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 631 platform_device_unregister(hda->dmic_dev); 632 633 /* disable DSP IRQ */ 634 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 635 SOF_HDA_PPCTL_PIE, 0); 636 637 /* disable CIE and GIE interrupts */ 638 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 639 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 640 641 /* disable cores */ 642 if (chip) 643 hda_dsp_core_reset_power_down(sdev, chip->cores_mask); 644 645 /* disable DSP */ 646 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 647 SOF_HDA_PPCTL_GPROCEN, 0); 648 649 free_irq(sdev->ipc_irq, sdev); 650 if (sdev->msi_enabled) 651 pci_free_irq_vectors(pci); 652 653 hda_dsp_stream_free(sdev); 654 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 655 snd_hdac_link_free_all(bus); 656 #endif 657 658 iounmap(sdev->bar[HDA_DSP_BAR]); 659 iounmap(bus->remap_addr); 660 661 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 662 snd_hdac_ext_bus_exit(bus); 663 #endif 664 hda_codec_i915_exit(sdev); 665 666 return 0; 667 } 668 669 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 670 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 671 { 672 struct hdac_bus *bus = sof_to_bus(sdev); 673 struct snd_soc_acpi_mach_params *mach_params; 674 struct snd_soc_acpi_mach *hda_mach; 675 struct snd_sof_pdata *pdata = sdev->pdata; 676 const char *tplg_filename; 677 const char *idisp_str; 678 const char *dmic_str; 679 int dmic_num = 0; 680 int codec_num = 0; 681 int i; 682 683 /* codec detection */ 684 if (!bus->codec_mask) { 685 dev_info(bus->dev, "no hda codecs found!\n"); 686 } else { 687 dev_info(bus->dev, "hda codecs found, mask %lx\n", 688 bus->codec_mask); 689 690 for (i = 0; i < HDA_MAX_CODECS; i++) { 691 if (bus->codec_mask & (1 << i)) 692 codec_num++; 693 } 694 695 /* 696 * If no machine driver is found, then: 697 * 698 * hda machine driver is used if : 699 * 1. there is one HDMI codec and one external HDAudio codec 700 * 2. only HDMI codec 701 */ 702 if (!pdata->machine && codec_num <= 2 && 703 HDA_IDISP_CODEC(bus->codec_mask)) { 704 hda_mach = snd_soc_acpi_intel_hda_machines; 705 706 /* topology: use the info from hda_machines */ 707 pdata->tplg_filename = 708 hda_mach->sof_tplg_filename; 709 710 dev_info(bus->dev, "using HDA machine driver %s now\n", 711 hda_mach->drv_name); 712 713 if (codec_num == 1) 714 idisp_str = "-idisp"; 715 else 716 idisp_str = ""; 717 718 /* first check NHLT for DMICs */ 719 dmic_num = check_nhlt_dmic(sdev); 720 721 /* allow for module parameter override */ 722 if (hda_dmic_num != -1) 723 dmic_num = hda_dmic_num; 724 725 switch (dmic_num) { 726 case 2: 727 dmic_str = "-2ch"; 728 break; 729 case 4: 730 dmic_str = "-4ch"; 731 break; 732 default: 733 dmic_num = 0; 734 dmic_str = ""; 735 break; 736 } 737 738 tplg_filename = pdata->tplg_filename; 739 tplg_filename = fixup_tplg_name(sdev, tplg_filename, 740 idisp_str, dmic_str); 741 if (!tplg_filename) 742 return -EINVAL; 743 744 pdata->machine = hda_mach; 745 pdata->tplg_filename = tplg_filename; 746 } 747 } 748 749 /* used by hda machine driver to create dai links */ 750 if (pdata->machine) { 751 mach_params = (struct snd_soc_acpi_mach_params *) 752 &pdata->machine->mach_params; 753 mach_params->codec_mask = bus->codec_mask; 754 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi; 755 mach_params->dmic_num = dmic_num; 756 } 757 758 return 0; 759 } 760 #else 761 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 762 { 763 return 0; 764 } 765 #endif 766 767 void hda_set_mach_params(const struct snd_soc_acpi_mach *mach, 768 struct device *dev) 769 { 770 struct snd_soc_acpi_mach_params *mach_params; 771 772 mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params; 773 mach_params->platform = dev_name(dev); 774 } 775 776 void hda_machine_select(struct snd_sof_dev *sdev) 777 { 778 struct snd_sof_pdata *sof_pdata = sdev->pdata; 779 const struct sof_dev_desc *desc = sof_pdata->desc; 780 struct snd_soc_acpi_mach *mach; 781 782 mach = snd_soc_acpi_find_machine(desc->machines); 783 if (mach) { 784 sof_pdata->tplg_filename = mach->sof_tplg_filename; 785 sof_pdata->machine = mach; 786 } 787 788 /* 789 * Choose HDA generic machine driver if mach is NULL. 790 * Otherwise, set certain mach params. 791 */ 792 hda_generic_machine_select(sdev); 793 794 if (!sof_pdata->machine) 795 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 796 } 797 798 MODULE_LICENSE("Dual BSD/GPL"); 799 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 800 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 801 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 802