1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/acpi.h> 22 #include <linux/module.h> 23 #include <linux/soundwire/sdw.h> 24 #include <linux/soundwire/sdw_intel.h> 25 #include <sound/intel-dsp-config.h> 26 #include <sound/intel-nhlt.h> 27 #include <sound/sof.h> 28 #include <sound/sof/xtensa.h> 29 #include "../sof-audio.h" 30 #include "../sof-pci-dev.h" 31 #include "../ops.h" 32 #include "hda.h" 33 34 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 35 #include <sound/soc-acpi-intel-match.h> 36 #endif 37 38 /* platform specific devices */ 39 #include "shim.h" 40 41 #define EXCEPT_MAX_HDR_SIZE 0x400 42 #define HDA_EXT_ROM_STATUS_SIZE 8 43 44 int hda_ctrl_dai_widget_setup(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 45 struct snd_sof_dai_config_data *data) 46 { 47 struct snd_sof_widget *swidget = w->dobj.private; 48 struct snd_soc_component *component = swidget->scomp; 49 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 50 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 51 struct snd_sof_dai *sof_dai = swidget->private; 52 int ret; 53 54 if (!sof_dai) { 55 dev_err(sdev->dev, "%s: No DAI for DAI widget %s\n", __func__, w->name); 56 return -EINVAL; 57 } 58 59 if (tplg_ops->dai_config) { 60 unsigned int flags; 61 62 /* set HW_PARAMS flag along with quirks */ 63 flags = SOF_DAI_CONFIG_FLAGS_HW_PARAMS | 64 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 65 66 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 67 if (ret < 0) { 68 dev_err(sdev->dev, "%s: DAI config failed for widget %s\n", __func__, 69 w->name); 70 return ret; 71 } 72 } 73 74 return 0; 75 } 76 77 int hda_ctrl_dai_widget_free(struct snd_soc_dapm_widget *w, unsigned int quirk_flags, 78 struct snd_sof_dai_config_data *data) 79 { 80 struct snd_sof_widget *swidget = w->dobj.private; 81 struct snd_soc_component *component = swidget->scomp; 82 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 83 const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg; 84 struct snd_sof_dai *sof_dai = swidget->private; 85 86 if (!sof_dai) { 87 dev_err(sdev->dev, "%s: No DAI for BE DAI widget %s\n", __func__, w->name); 88 return -EINVAL; 89 } 90 91 if (tplg_ops->dai_config) { 92 unsigned int flags; 93 int ret; 94 95 /* set HW_FREE flag along with any quirks */ 96 flags = SOF_DAI_CONFIG_FLAGS_HW_FREE | 97 quirk_flags << SOF_DAI_CONFIG_FLAGS_QUIRK_SHIFT; 98 99 ret = tplg_ops->dai_config(sdev, swidget, flags, data); 100 if (ret < 0) 101 dev_err(sdev->dev, "%s: DAI config failed for widget '%s'\n", __func__, 102 w->name); 103 } 104 105 return 0; 106 } 107 108 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 109 110 /* 111 * The default for SoundWire clock stop quirks is to power gate the IP 112 * and do a Bus Reset, this will need to be modified when the DSP 113 * needs to remain in D0i3 so that the Master does not lose context 114 * and enumeration is not required on clock restart 115 */ 116 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; 117 module_param(sdw_clock_stop_quirks, int, 0444); 118 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); 119 120 static int sdw_params_stream(struct device *dev, 121 struct sdw_intel_stream_params_data *params_data) 122 { 123 struct snd_soc_dai *d = params_data->dai; 124 struct snd_sof_dai_config_data data; 125 struct snd_soc_dapm_widget *w; 126 127 w = snd_soc_dai_get_widget(d, params_data->stream); 128 data.dai_index = (params_data->link_id << 8) | d->id; 129 data.dai_data = params_data->alh_stream_id; 130 131 return hda_ctrl_dai_widget_setup(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 132 } 133 134 static int sdw_free_stream(struct device *dev, 135 struct sdw_intel_stream_free_data *free_data) 136 { 137 struct snd_soc_dai *d = free_data->dai; 138 struct snd_sof_dai_config_data data; 139 struct snd_soc_dapm_widget *w; 140 141 w = snd_soc_dai_get_widget(d, free_data->stream); 142 data.dai_index = (free_data->link_id << 8) | d->id; 143 144 /* send invalid stream_id */ 145 data.dai_data = 0xFFFF; 146 147 return hda_ctrl_dai_widget_free(w, SOF_DAI_CONFIG_FLAGS_NONE, &data); 148 } 149 150 struct sdw_intel_ops sdw_callback = { 151 .params_stream = sdw_params_stream, 152 .free_stream = sdw_free_stream, 153 }; 154 155 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) 156 { 157 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable); 158 } 159 160 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 161 { 162 struct sof_intel_hda_dev *hdev; 163 acpi_handle handle; 164 int ret; 165 166 handle = ACPI_HANDLE(sdev->dev); 167 168 /* save ACPI info for the probe step */ 169 hdev = sdev->pdata->hw_pdata; 170 171 ret = sdw_intel_acpi_scan(handle, &hdev->info); 172 if (ret < 0) 173 return -EINVAL; 174 175 return 0; 176 } 177 178 static int hda_sdw_probe(struct snd_sof_dev *sdev) 179 { 180 struct sof_intel_hda_dev *hdev; 181 struct sdw_intel_res res; 182 void *sdw; 183 184 hdev = sdev->pdata->hw_pdata; 185 186 memset(&res, 0, sizeof(res)); 187 188 res.mmio_base = sdev->bar[HDA_DSP_BAR]; 189 res.shim_base = hdev->desc->sdw_shim_base; 190 res.alh_base = hdev->desc->sdw_alh_base; 191 res.irq = sdev->ipc_irq; 192 res.handle = hdev->info.handle; 193 res.parent = sdev->dev; 194 res.ops = &sdw_callback; 195 res.dev = sdev->dev; 196 res.clock_stop_quirks = sdw_clock_stop_quirks; 197 198 /* 199 * ops and arg fields are not populated for now, 200 * they will be needed when the DAI callbacks are 201 * provided 202 */ 203 204 /* we could filter links here if needed, e.g for quirks */ 205 res.count = hdev->info.count; 206 res.link_mask = hdev->info.link_mask; 207 208 sdw = sdw_intel_probe(&res); 209 if (!sdw) { 210 dev_err(sdev->dev, "error: SoundWire probe failed\n"); 211 return -EINVAL; 212 } 213 214 /* save context */ 215 hdev->sdw = sdw; 216 217 return 0; 218 } 219 220 int hda_sdw_startup(struct snd_sof_dev *sdev) 221 { 222 struct sof_intel_hda_dev *hdev; 223 struct snd_sof_pdata *pdata = sdev->pdata; 224 225 hdev = sdev->pdata->hw_pdata; 226 227 if (!hdev->sdw) 228 return 0; 229 230 if (pdata->machine && !pdata->machine->mach_params.link_mask) 231 return 0; 232 233 return sdw_intel_startup(hdev->sdw); 234 } 235 236 static int hda_sdw_exit(struct snd_sof_dev *sdev) 237 { 238 struct sof_intel_hda_dev *hdev; 239 240 hdev = sdev->pdata->hw_pdata; 241 242 hda_sdw_int_enable(sdev, false); 243 244 if (hdev->sdw) 245 sdw_intel_exit(hdev->sdw); 246 hdev->sdw = NULL; 247 248 return 0; 249 } 250 251 bool hda_common_check_sdw_irq(struct snd_sof_dev *sdev) 252 { 253 struct sof_intel_hda_dev *hdev; 254 bool ret = false; 255 u32 irq_status; 256 257 hdev = sdev->pdata->hw_pdata; 258 259 if (!hdev->sdw) 260 return ret; 261 262 /* store status */ 263 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); 264 265 /* invalid message ? */ 266 if (irq_status == 0xffffffff) 267 goto out; 268 269 /* SDW message ? */ 270 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW) 271 ret = true; 272 273 out: 274 return ret; 275 } 276 277 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 278 { 279 const struct sof_intel_dsp_desc *chip; 280 281 chip = get_chip_info(sdev->pdata); 282 if (chip && chip->check_sdw_irq) 283 return chip->check_sdw_irq(sdev); 284 285 return false; 286 } 287 288 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 289 { 290 return sdw_intel_thread(irq, context); 291 } 292 293 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 294 { 295 struct sof_intel_hda_dev *hdev; 296 297 hdev = sdev->pdata->hw_pdata; 298 if (hdev->sdw && 299 snd_sof_dsp_read(sdev, HDA_DSP_BAR, 300 hdev->desc->sdw_shim_base + SDW_SHIM_WAKESTS)) 301 return true; 302 303 return false; 304 } 305 306 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) 307 { 308 struct sof_intel_hda_dev *hdev; 309 310 hdev = sdev->pdata->hw_pdata; 311 if (!hdev->sdw) 312 return; 313 314 sdw_intel_process_wakeen_event(hdev->sdw); 315 } 316 317 #else /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 318 static inline int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 319 { 320 return 0; 321 } 322 323 static inline int hda_sdw_probe(struct snd_sof_dev *sdev) 324 { 325 return 0; 326 } 327 328 static inline int hda_sdw_exit(struct snd_sof_dev *sdev) 329 { 330 return 0; 331 } 332 333 static inline bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 334 { 335 return false; 336 } 337 338 static inline irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 339 { 340 return IRQ_HANDLED; 341 } 342 343 static inline bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 344 { 345 return false; 346 } 347 348 #endif /* IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) */ 349 350 /* 351 * Debug 352 */ 353 354 struct hda_dsp_msg_code { 355 u32 code; 356 const char *text; 357 }; 358 359 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 360 static bool hda_use_msi = true; 361 module_param_named(use_msi, hda_use_msi, bool, 0444); 362 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 363 #else 364 #define hda_use_msi (1) 365 #endif 366 367 int sof_hda_position_quirk = SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS; 368 module_param_named(position_quirk, sof_hda_position_quirk, int, 0444); 369 MODULE_PARM_DESC(position_quirk, "SOF HDaudio position quirk"); 370 371 static char *hda_model; 372 module_param(hda_model, charp, 0444); 373 MODULE_PARM_DESC(hda_model, "Use the given HDA board model."); 374 375 static int dmic_num_override = -1; 376 module_param_named(dmic_num, dmic_num_override, int, 0444); 377 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 378 379 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 380 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI); 381 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); 382 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver"); 383 #endif 384 385 static const struct hda_dsp_msg_code hda_dsp_rom_fw_error_texts[] = { 386 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 387 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 388 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 389 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 390 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 391 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 392 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 393 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 394 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 395 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 396 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 397 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 398 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 399 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 400 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 401 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 402 }; 403 404 #define FSR_ROM_STATE_ENTRY(state) {FSR_STATE_ROM_##state, #state} 405 static const struct hda_dsp_msg_code fsr_rom_state_names[] = { 406 FSR_ROM_STATE_ENTRY(INIT), 407 FSR_ROM_STATE_ENTRY(INIT_DONE), 408 FSR_ROM_STATE_ENTRY(CSE_MANIFEST_LOADED), 409 FSR_ROM_STATE_ENTRY(FW_MANIFEST_LOADED), 410 FSR_ROM_STATE_ENTRY(FW_FW_LOADED), 411 FSR_ROM_STATE_ENTRY(FW_ENTERED), 412 FSR_ROM_STATE_ENTRY(VERIFY_FEATURE_MASK), 413 FSR_ROM_STATE_ENTRY(GET_LOAD_OFFSET), 414 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT), 415 FSR_ROM_STATE_ENTRY(FETCH_ROM_EXT_DONE), 416 /* CSE states */ 417 FSR_ROM_STATE_ENTRY(CSE_IMR_REQUEST), 418 FSR_ROM_STATE_ENTRY(CSE_IMR_GRANTED), 419 FSR_ROM_STATE_ENTRY(CSE_VALIDATE_IMAGE_REQUEST), 420 FSR_ROM_STATE_ENTRY(CSE_IMAGE_VALIDATED), 421 FSR_ROM_STATE_ENTRY(CSE_IPC_IFACE_INIT), 422 FSR_ROM_STATE_ENTRY(CSE_IPC_RESET_PHASE_1), 423 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL_ENTRY), 424 FSR_ROM_STATE_ENTRY(CSE_IPC_OPERATIONAL), 425 FSR_ROM_STATE_ENTRY(CSE_IPC_DOWN), 426 }; 427 428 #define FSR_BRINGUP_STATE_ENTRY(state) {FSR_STATE_BRINGUP_##state, #state} 429 static const struct hda_dsp_msg_code fsr_bringup_state_names[] = { 430 FSR_BRINGUP_STATE_ENTRY(INIT), 431 FSR_BRINGUP_STATE_ENTRY(INIT_DONE), 432 FSR_BRINGUP_STATE_ENTRY(HPSRAM_LOAD), 433 FSR_BRINGUP_STATE_ENTRY(UNPACK_START), 434 FSR_BRINGUP_STATE_ENTRY(IMR_RESTORE), 435 FSR_BRINGUP_STATE_ENTRY(FW_ENTERED), 436 }; 437 438 #define FSR_WAIT_STATE_ENTRY(state) {FSR_WAIT_FOR_##state, #state} 439 static const struct hda_dsp_msg_code fsr_wait_state_names[] = { 440 FSR_WAIT_STATE_ENTRY(IPC_BUSY), 441 FSR_WAIT_STATE_ENTRY(IPC_DONE), 442 FSR_WAIT_STATE_ENTRY(CACHE_INVALIDATION), 443 FSR_WAIT_STATE_ENTRY(LP_SRAM_OFF), 444 FSR_WAIT_STATE_ENTRY(DMA_BUFFER_FULL), 445 FSR_WAIT_STATE_ENTRY(CSE_CSR), 446 }; 447 448 #define FSR_MODULE_NAME_ENTRY(mod) [FSR_MOD_##mod] = #mod 449 static const char * const fsr_module_names[] = { 450 FSR_MODULE_NAME_ENTRY(ROM), 451 FSR_MODULE_NAME_ENTRY(ROM_BYP), 452 FSR_MODULE_NAME_ENTRY(BASE_FW), 453 FSR_MODULE_NAME_ENTRY(LP_BOOT), 454 FSR_MODULE_NAME_ENTRY(BRNGUP), 455 FSR_MODULE_NAME_ENTRY(ROM_EXT), 456 }; 457 458 static const char * 459 hda_dsp_get_state_text(u32 code, const struct hda_dsp_msg_code *msg_code, 460 size_t array_size) 461 { 462 int i; 463 464 for (i = 0; i < array_size; i++) { 465 if (code == msg_code[i].code) 466 return msg_code[i].text; 467 } 468 469 return NULL; 470 } 471 472 static void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level) 473 { 474 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 475 const char *state_text, *error_text, *module_text; 476 u32 fsr, state, wait_state, module, error_code; 477 478 fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg); 479 state = FSR_TO_STATE_CODE(fsr); 480 wait_state = FSR_TO_WAIT_STATE_CODE(fsr); 481 module = FSR_TO_MODULE_CODE(fsr); 482 483 if (module > FSR_MOD_ROM_EXT) 484 module_text = "unknown"; 485 else 486 module_text = fsr_module_names[module]; 487 488 if (module == FSR_MOD_BRNGUP) 489 state_text = hda_dsp_get_state_text(state, fsr_bringup_state_names, 490 ARRAY_SIZE(fsr_bringup_state_names)); 491 else 492 state_text = hda_dsp_get_state_text(state, fsr_rom_state_names, 493 ARRAY_SIZE(fsr_rom_state_names)); 494 495 /* not for us, must be generic sof message */ 496 if (!state_text) { 497 dev_printk(level, sdev->dev, "%#010x: unknown ROM status value\n", fsr); 498 return; 499 } 500 501 if (wait_state) { 502 const char *wait_state_text; 503 504 wait_state_text = hda_dsp_get_state_text(wait_state, fsr_wait_state_names, 505 ARRAY_SIZE(fsr_wait_state_names)); 506 if (!wait_state_text) 507 wait_state_text = "unknown"; 508 509 dev_printk(level, sdev->dev, 510 "%#010x: module: %s, state: %s, waiting for: %s, %s\n", 511 fsr, module_text, state_text, wait_state_text, 512 fsr & FSR_HALTED ? "not running" : "running"); 513 } else { 514 dev_printk(level, sdev->dev, "%#010x: module: %s, state: %s, %s\n", 515 fsr, module_text, state_text, 516 fsr & FSR_HALTED ? "not running" : "running"); 517 } 518 519 error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4); 520 if (!error_code) 521 return; 522 523 error_text = hda_dsp_get_state_text(error_code, hda_dsp_rom_fw_error_texts, 524 ARRAY_SIZE(hda_dsp_rom_fw_error_texts)); 525 if (!error_text) 526 error_text = "unknown"; 527 528 if (state == FSR_STATE_FW_ENTERED) 529 dev_printk(level, sdev->dev, "status code: %#x (%s)\n", error_code, 530 error_text); 531 else 532 dev_printk(level, sdev->dev, "error code: %#x (%s)\n", error_code, 533 error_text); 534 } 535 536 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 537 struct sof_ipc_dsp_oops_xtensa *xoops, 538 struct sof_ipc_panic_info *panic_info, 539 u32 *stack, size_t stack_words) 540 { 541 u32 offset = sdev->dsp_oops_offset; 542 543 /* first read registers */ 544 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 545 546 /* note: variable AR register array is not read */ 547 548 /* then get panic info */ 549 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 550 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 551 xoops->arch_hdr.totalsize); 552 return; 553 } 554 offset += xoops->arch_hdr.totalsize; 555 sof_block_read(sdev, sdev->mmio_bar, offset, 556 panic_info, sizeof(*panic_info)); 557 558 /* then get the stack */ 559 offset += sizeof(*panic_info); 560 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 561 stack_words * sizeof(u32)); 562 } 563 564 /* dump the first 8 dwords representing the extended ROM status */ 565 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level, 566 u32 flags) 567 { 568 const struct sof_intel_dsp_desc *chip; 569 char msg[128]; 570 int len = 0; 571 u32 value; 572 int i; 573 574 chip = get_chip_info(sdev->pdata); 575 for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) { 576 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4); 577 len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value); 578 } 579 580 dev_printk(level, sdev->dev, "extended rom status: %s", msg); 581 582 } 583 584 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 585 { 586 char *level = (flags & SOF_DBG_DUMP_OPTIONAL) ? KERN_DEBUG : KERN_ERR; 587 struct sof_ipc_dsp_oops_xtensa xoops; 588 struct sof_ipc_panic_info panic_info; 589 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 590 591 /* print ROM/FW status */ 592 hda_dsp_get_state(sdev, level); 593 594 if (flags & SOF_DBG_DUMP_REGS) { 595 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); 596 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 597 598 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 599 HDA_DSP_STACK_DUMP_SIZE); 600 sof_print_oops_and_stack(sdev, level, status, panic, &xoops, 601 &panic_info, stack, HDA_DSP_STACK_DUMP_SIZE); 602 } else { 603 hda_dsp_dump_ext_rom_status(sdev, level, flags); 604 } 605 } 606 607 static bool hda_check_ipc_irq(struct snd_sof_dev *sdev) 608 { 609 const struct sof_intel_dsp_desc *chip; 610 611 chip = get_chip_info(sdev->pdata); 612 if (chip && chip->check_ipc_irq) 613 return chip->check_ipc_irq(sdev); 614 615 return false; 616 } 617 618 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 619 { 620 struct hdac_bus *bus = sof_to_bus(sdev); 621 u32 adspis; 622 u32 intsts; 623 u32 intctl; 624 u32 ppsts; 625 u8 rirbsts; 626 627 /* read key IRQ stats and config registers */ 628 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 629 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 630 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 631 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 632 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 633 634 dev_err(sdev->dev, "hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 635 intsts, intctl, rirbsts); 636 dev_err(sdev->dev, "dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", ppsts, adspis); 637 } 638 639 void hda_ipc_dump(struct snd_sof_dev *sdev) 640 { 641 u32 hipcie; 642 u32 hipct; 643 u32 hipcctl; 644 645 hda_ipc_irq_dump(sdev); 646 647 /* read IPC status */ 648 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 649 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 650 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 651 652 /* dump the IPC regs */ 653 /* TODO: parse the raw msg */ 654 dev_err(sdev->dev, "host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 655 hipcie, hipct, hipcctl); 656 } 657 658 static int hda_init(struct snd_sof_dev *sdev) 659 { 660 struct hda_bus *hbus; 661 struct hdac_bus *bus; 662 struct pci_dev *pci = to_pci_dev(sdev->dev); 663 int ret; 664 665 hbus = sof_to_hbus(sdev); 666 bus = sof_to_bus(sdev); 667 668 /* HDA bus init */ 669 sof_hda_bus_init(bus, &pci->dev); 670 671 if (sof_hda_position_quirk == SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS) 672 bus->use_posbuf = 0; 673 else 674 bus->use_posbuf = 1; 675 bus->bdl_pos_adj = 0; 676 bus->sync_write = 1; 677 678 mutex_init(&hbus->prepare_mutex); 679 hbus->pci = pci; 680 hbus->mixer_assigned = -1; 681 hbus->modelname = hda_model; 682 683 /* initialise hdac bus */ 684 bus->addr = pci_resource_start(pci, 0); 685 bus->remap_addr = pci_ioremap_bar(pci, 0); 686 if (!bus->remap_addr) { 687 dev_err(bus->dev, "error: ioremap error\n"); 688 return -ENXIO; 689 } 690 691 /* HDA base */ 692 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 693 694 /* init i915 and HDMI codecs */ 695 ret = hda_codec_i915_init(sdev); 696 if (ret < 0) 697 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n"); 698 699 /* get controller capabilities */ 700 ret = hda_dsp_ctrl_get_caps(sdev); 701 if (ret < 0) 702 dev_err(sdev->dev, "error: get caps error\n"); 703 704 return ret; 705 } 706 707 static int check_dmic_num(struct snd_sof_dev *sdev) 708 { 709 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 710 struct nhlt_acpi_table *nhlt; 711 int dmic_num = 0; 712 713 nhlt = hdev->nhlt; 714 if (nhlt) 715 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 716 717 /* allow for module parameter override */ 718 if (dmic_num_override != -1) { 719 dev_dbg(sdev->dev, 720 "overriding DMICs detected in NHLT tables %d by kernel param %d\n", 721 dmic_num, dmic_num_override); 722 dmic_num = dmic_num_override; 723 } 724 725 if (dmic_num < 0 || dmic_num > 4) { 726 dev_dbg(sdev->dev, "invalid dmic_number %d\n", dmic_num); 727 dmic_num = 0; 728 } 729 730 return dmic_num; 731 } 732 733 static int check_nhlt_ssp_mask(struct snd_sof_dev *sdev) 734 { 735 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 736 struct nhlt_acpi_table *nhlt; 737 int ssp_mask = 0; 738 739 nhlt = hdev->nhlt; 740 if (!nhlt) 741 return ssp_mask; 742 743 if (intel_nhlt_has_endpoint_type(nhlt, NHLT_LINK_SSP)) { 744 ssp_mask = intel_nhlt_ssp_endpoint_mask(nhlt, NHLT_DEVICE_I2S); 745 if (ssp_mask) 746 dev_info(sdev->dev, "NHLT_DEVICE_I2S detected, ssp_mask %#x\n", ssp_mask); 747 } 748 749 return ssp_mask; 750 } 751 752 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 753 754 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 755 const char *sof_tplg_filename, 756 const char *idisp_str, 757 const char *dmic_str) 758 { 759 const char *tplg_filename = NULL; 760 char *filename, *tmp; 761 const char *split_ext; 762 763 filename = kstrdup(sof_tplg_filename, GFP_KERNEL); 764 if (!filename) 765 return NULL; 766 767 /* this assumes a .tplg extension */ 768 tmp = filename; 769 split_ext = strsep(&tmp, "."); 770 if (split_ext) 771 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 772 "%s%s%s.tplg", 773 split_ext, idisp_str, dmic_str); 774 kfree(filename); 775 776 return tplg_filename; 777 } 778 779 static int dmic_detect_topology_fixup(struct snd_sof_dev *sdev, 780 const char **tplg_filename, 781 const char *idisp_str, 782 int *dmic_found, 783 bool tplg_fixup) 784 { 785 const char *dmic_str; 786 int dmic_num; 787 788 /* first check for DMICs (using NHLT or module parameter) */ 789 dmic_num = check_dmic_num(sdev); 790 791 switch (dmic_num) { 792 case 1: 793 dmic_str = "-1ch"; 794 break; 795 case 2: 796 dmic_str = "-2ch"; 797 break; 798 case 3: 799 dmic_str = "-3ch"; 800 break; 801 case 4: 802 dmic_str = "-4ch"; 803 break; 804 default: 805 dmic_num = 0; 806 dmic_str = ""; 807 break; 808 } 809 810 if (tplg_fixup) { 811 const char *default_tplg_filename = *tplg_filename; 812 const char *fixed_tplg_filename; 813 814 fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename, 815 idisp_str, dmic_str); 816 if (!fixed_tplg_filename) 817 return -ENOMEM; 818 *tplg_filename = fixed_tplg_filename; 819 } 820 821 dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num); 822 *dmic_found = dmic_num; 823 824 return 0; 825 } 826 #endif 827 828 static int hda_init_caps(struct snd_sof_dev *sdev) 829 { 830 struct hdac_bus *bus = sof_to_bus(sdev); 831 struct snd_sof_pdata *pdata = sdev->pdata; 832 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 833 struct hdac_ext_link *hlink; 834 #endif 835 struct sof_intel_hda_dev *hdev = pdata->hw_pdata; 836 u32 link_mask; 837 int ret = 0; 838 839 /* check if dsp is there */ 840 if (bus->ppcap) 841 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 842 843 /* Init HDA controller after i915 init */ 844 ret = hda_dsp_ctrl_init_chip(sdev, true); 845 if (ret < 0) { 846 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 847 ret); 848 return ret; 849 } 850 851 /* scan SoundWire capabilities exposed by DSDT */ 852 ret = hda_sdw_acpi_scan(sdev); 853 if (ret < 0) { 854 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n"); 855 goto skip_soundwire; 856 } 857 858 link_mask = hdev->info.link_mask; 859 if (!link_mask) { 860 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n"); 861 goto skip_soundwire; 862 } 863 864 /* 865 * probe/allocate SoundWire resources. 866 * The hardware configuration takes place in hda_sdw_startup 867 * after power rails are enabled. 868 * It's entirely possible to have a mix of I2S/DMIC/SoundWire 869 * devices, so we allocate the resources in all cases. 870 */ 871 ret = hda_sdw_probe(sdev); 872 if (ret < 0) { 873 dev_err(sdev->dev, "error: SoundWire probe error\n"); 874 return ret; 875 } 876 877 skip_soundwire: 878 879 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 880 if (bus->mlcap) 881 snd_hdac_ext_bus_get_ml_capabilities(bus); 882 883 /* create codec instances */ 884 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi); 885 886 if (!HDA_IDISP_CODEC(bus->codec_mask)) 887 hda_codec_i915_display_power(sdev, false); 888 889 /* 890 * we are done probing so decrement link counts 891 */ 892 list_for_each_entry(hlink, &bus->hlink_list, list) 893 snd_hdac_ext_bus_link_put(bus, hlink); 894 #endif 895 return 0; 896 } 897 898 static void hda_check_for_state_change(struct snd_sof_dev *sdev) 899 { 900 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 901 struct hdac_bus *bus = sof_to_bus(sdev); 902 unsigned int codec_mask; 903 904 codec_mask = snd_hdac_chip_readw(bus, STATESTS); 905 if (codec_mask) { 906 hda_codec_jack_check(sdev); 907 snd_hdac_chip_writew(bus, STATESTS, codec_mask); 908 } 909 #endif 910 } 911 912 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 913 { 914 struct snd_sof_dev *sdev = context; 915 916 /* 917 * Get global interrupt status. It includes all hardware interrupt 918 * sources in the Intel HD Audio controller. 919 */ 920 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 921 SOF_HDA_INTSTS_GIS) { 922 923 /* disable GIE interrupt */ 924 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 925 SOF_HDA_INTCTL, 926 SOF_HDA_INT_GLOBAL_EN, 927 0); 928 929 return IRQ_WAKE_THREAD; 930 } 931 932 return IRQ_NONE; 933 } 934 935 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 936 { 937 struct snd_sof_dev *sdev = context; 938 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 939 940 /* deal with streams and controller first */ 941 if (hda_dsp_check_stream_irq(sdev)) 942 hda_dsp_stream_threaded_handler(irq, sdev); 943 944 if (hda_check_ipc_irq(sdev)) 945 sof_ops(sdev)->irq_thread(irq, sdev); 946 947 if (hda_dsp_check_sdw_irq(sdev)) 948 hda_dsp_sdw_thread(irq, hdev->sdw); 949 950 if (hda_sdw_check_wakeen_irq(sdev)) 951 hda_sdw_process_wakeen(sdev); 952 953 hda_check_for_state_change(sdev); 954 955 /* enable GIE interrupt */ 956 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 957 SOF_HDA_INTCTL, 958 SOF_HDA_INT_GLOBAL_EN, 959 SOF_HDA_INT_GLOBAL_EN); 960 961 return IRQ_HANDLED; 962 } 963 964 int hda_dsp_probe(struct snd_sof_dev *sdev) 965 { 966 struct pci_dev *pci = to_pci_dev(sdev->dev); 967 struct sof_intel_hda_dev *hdev; 968 struct hdac_bus *bus; 969 const struct sof_intel_dsp_desc *chip; 970 int ret = 0; 971 972 /* 973 * detect DSP by checking class/subclass/prog-id information 974 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 975 * class=04 subclass 01 prog-if 00: DSP is present 976 * (and may be required e.g. for DMIC or SSP support) 977 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 978 */ 979 if (pci->class == 0x040300) { 980 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 981 return -ENODEV; 982 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 983 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 984 return -ENODEV; 985 } 986 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 987 988 chip = get_chip_info(sdev->pdata); 989 if (!chip) { 990 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 991 pci->device); 992 ret = -EIO; 993 goto err; 994 } 995 996 sdev->num_cores = chip->cores_num; 997 998 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 999 if (!hdev) 1000 return -ENOMEM; 1001 sdev->pdata->hw_pdata = hdev; 1002 hdev->desc = chip; 1003 1004 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 1005 PLATFORM_DEVID_NONE, 1006 NULL, 0); 1007 if (IS_ERR(hdev->dmic_dev)) { 1008 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 1009 return PTR_ERR(hdev->dmic_dev); 1010 } 1011 1012 /* 1013 * use position update IPC if either it is forced 1014 * or we don't have other choice 1015 */ 1016 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 1017 hdev->no_ipc_position = 0; 1018 #else 1019 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 1020 #endif 1021 1022 /* set up HDA base */ 1023 bus = sof_to_bus(sdev); 1024 ret = hda_init(sdev); 1025 if (ret < 0) 1026 goto hdac_bus_unmap; 1027 1028 /* DSP base */ 1029 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 1030 if (!sdev->bar[HDA_DSP_BAR]) { 1031 dev_err(sdev->dev, "error: ioremap error\n"); 1032 ret = -ENXIO; 1033 goto hdac_bus_unmap; 1034 } 1035 1036 sdev->mmio_bar = HDA_DSP_BAR; 1037 sdev->mailbox_bar = HDA_DSP_BAR; 1038 1039 /* allow 64bit DMA address if supported by H/W */ 1040 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) { 1041 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 1042 dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)); 1043 } 1044 dma_set_max_seg_size(&pci->dev, UINT_MAX); 1045 1046 /* init streams */ 1047 ret = hda_dsp_stream_init(sdev); 1048 if (ret < 0) { 1049 dev_err(sdev->dev, "error: failed to init streams\n"); 1050 /* 1051 * not all errors are due to memory issues, but trying 1052 * to free everything does not harm 1053 */ 1054 goto free_streams; 1055 } 1056 1057 /* 1058 * register our IRQ 1059 * let's try to enable msi firstly 1060 * if it fails, use legacy interrupt mode 1061 * TODO: support msi multiple vectors 1062 */ 1063 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 1064 dev_info(sdev->dev, "use msi interrupt mode\n"); 1065 sdev->ipc_irq = pci_irq_vector(pci, 0); 1066 /* initialised to "false" by kzalloc() */ 1067 sdev->msi_enabled = true; 1068 } 1069 1070 if (!sdev->msi_enabled) { 1071 dev_info(sdev->dev, "use legacy interrupt mode\n"); 1072 /* 1073 * in IO-APIC mode, hda->irq and ipc_irq are using the same 1074 * irq number of pci->irq 1075 */ 1076 sdev->ipc_irq = pci->irq; 1077 } 1078 1079 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 1080 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 1081 hda_dsp_interrupt_thread, 1082 IRQF_SHARED, "AudioDSP", sdev); 1083 if (ret < 0) { 1084 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 1085 sdev->ipc_irq); 1086 goto free_irq_vector; 1087 } 1088 1089 pci_set_master(pci); 1090 synchronize_irq(pci->irq); 1091 1092 /* 1093 * clear TCSEL to clear playback on some HD Audio 1094 * codecs. PCI TCSEL is defined in the Intel manuals. 1095 */ 1096 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 1097 1098 /* init HDA capabilities */ 1099 ret = hda_init_caps(sdev); 1100 if (ret < 0) 1101 goto free_ipc_irq; 1102 1103 /* enable ppcap interrupt */ 1104 hda_dsp_ctrl_ppcap_enable(sdev, true); 1105 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 1106 1107 /* set default mailbox offset for FW ready message */ 1108 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 1109 1110 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work); 1111 1112 hdev->nhlt = intel_nhlt_init(sdev->dev); 1113 1114 return 0; 1115 1116 free_ipc_irq: 1117 free_irq(sdev->ipc_irq, sdev); 1118 free_irq_vector: 1119 if (sdev->msi_enabled) 1120 pci_free_irq_vectors(pci); 1121 free_streams: 1122 hda_dsp_stream_free(sdev); 1123 /* dsp_unmap: not currently used */ 1124 iounmap(sdev->bar[HDA_DSP_BAR]); 1125 hdac_bus_unmap: 1126 platform_device_unregister(hdev->dmic_dev); 1127 iounmap(bus->remap_addr); 1128 hda_codec_i915_exit(sdev); 1129 err: 1130 return ret; 1131 } 1132 1133 int hda_dsp_remove(struct snd_sof_dev *sdev) 1134 { 1135 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 1136 const struct sof_intel_dsp_desc *chip = hda->desc; 1137 struct hdac_bus *bus = sof_to_bus(sdev); 1138 struct pci_dev *pci = to_pci_dev(sdev->dev); 1139 struct nhlt_acpi_table *nhlt = hda->nhlt; 1140 1141 if (nhlt) 1142 intel_nhlt_free(nhlt); 1143 1144 /* cancel any attempt for DSP D0I3 */ 1145 cancel_delayed_work_sync(&hda->d0i3_work); 1146 1147 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1148 /* codec removal, invoke bus_device_remove */ 1149 snd_hdac_ext_bus_device_remove(bus); 1150 #endif 1151 1152 hda_sdw_exit(sdev); 1153 1154 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 1155 platform_device_unregister(hda->dmic_dev); 1156 1157 /* disable DSP IRQ */ 1158 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1159 SOF_HDA_PPCTL_PIE, 0); 1160 1161 /* disable CIE and GIE interrupts */ 1162 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 1163 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 1164 1165 /* disable cores */ 1166 if (chip) 1167 hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask); 1168 1169 /* disable DSP */ 1170 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 1171 SOF_HDA_PPCTL_GPROCEN, 0); 1172 1173 free_irq(sdev->ipc_irq, sdev); 1174 if (sdev->msi_enabled) 1175 pci_free_irq_vectors(pci); 1176 1177 hda_dsp_stream_free(sdev); 1178 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1179 snd_hdac_link_free_all(bus); 1180 #endif 1181 1182 iounmap(sdev->bar[HDA_DSP_BAR]); 1183 iounmap(bus->remap_addr); 1184 1185 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1186 snd_hdac_ext_bus_exit(bus); 1187 #endif 1188 hda_codec_i915_exit(sdev); 1189 1190 return 0; 1191 } 1192 1193 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 1194 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1195 struct snd_soc_acpi_mach **mach) 1196 { 1197 struct hdac_bus *bus = sof_to_bus(sdev); 1198 struct snd_soc_acpi_mach_params *mach_params; 1199 struct snd_soc_acpi_mach *hda_mach; 1200 struct snd_sof_pdata *pdata = sdev->pdata; 1201 const char *tplg_filename; 1202 const char *idisp_str; 1203 int dmic_num = 0; 1204 int codec_num = 0; 1205 int ret; 1206 int i; 1207 1208 /* codec detection */ 1209 if (!bus->codec_mask) { 1210 dev_info(bus->dev, "no hda codecs found!\n"); 1211 } else { 1212 dev_info(bus->dev, "hda codecs found, mask %lx\n", 1213 bus->codec_mask); 1214 1215 for (i = 0; i < HDA_MAX_CODECS; i++) { 1216 if (bus->codec_mask & (1 << i)) 1217 codec_num++; 1218 } 1219 1220 /* 1221 * If no machine driver is found, then: 1222 * 1223 * generic hda machine driver can handle: 1224 * - one HDMI codec, and/or 1225 * - one external HDAudio codec 1226 */ 1227 if (!*mach && codec_num <= 2) { 1228 bool tplg_fixup; 1229 1230 hda_mach = snd_soc_acpi_intel_hda_machines; 1231 1232 dev_info(bus->dev, "using HDA machine driver %s now\n", 1233 hda_mach->drv_name); 1234 1235 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask)) 1236 idisp_str = "-idisp"; 1237 else 1238 idisp_str = ""; 1239 1240 /* topology: use the info from hda_machines */ 1241 if (pdata->tplg_filename) { 1242 tplg_fixup = false; 1243 tplg_filename = pdata->tplg_filename; 1244 } else { 1245 tplg_fixup = true; 1246 tplg_filename = hda_mach->sof_tplg_filename; 1247 } 1248 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num, 1249 tplg_fixup); 1250 if (ret < 0) 1251 return; 1252 1253 hda_mach->mach_params.dmic_num = dmic_num; 1254 pdata->tplg_filename = tplg_filename; 1255 1256 if (codec_num == 2) { 1257 /* 1258 * Prevent SoundWire links from starting when an external 1259 * HDaudio codec is used 1260 */ 1261 hda_mach->mach_params.link_mask = 0; 1262 } 1263 1264 *mach = hda_mach; 1265 } 1266 } 1267 1268 /* used by hda machine driver to create dai links */ 1269 if (*mach) { 1270 mach_params = &(*mach)->mach_params; 1271 mach_params->codec_mask = bus->codec_mask; 1272 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi; 1273 } 1274 } 1275 #else 1276 static void hda_generic_machine_select(struct snd_sof_dev *sdev, 1277 struct snd_soc_acpi_mach **mach) 1278 { 1279 } 1280 #endif 1281 1282 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 1283 1284 #define SDW_CODEC_ADR_MASK(_adr) ((_adr) & (SDW_DISCO_LINK_ID_MASK | SDW_VERSION_MASK | \ 1285 SDW_MFG_ID_MASK | SDW_PART_ID_MASK)) 1286 1287 /* Check if all Slaves defined on the link can be found */ 1288 static bool link_slaves_found(struct snd_sof_dev *sdev, 1289 const struct snd_soc_acpi_link_adr *link, 1290 struct sdw_intel_ctx *sdw) 1291 { 1292 struct hdac_bus *bus = sof_to_bus(sdev); 1293 struct sdw_intel_slave_id *ids = sdw->ids; 1294 int num_slaves = sdw->num_slaves; 1295 unsigned int part_id, link_id, unique_id, mfg_id, version; 1296 int i, j, k; 1297 1298 for (i = 0; i < link->num_adr; i++) { 1299 u64 adr = link->adr_d[i].adr; 1300 int reported_part_count = 0; 1301 1302 mfg_id = SDW_MFG_ID(adr); 1303 part_id = SDW_PART_ID(adr); 1304 link_id = SDW_DISCO_LINK_ID(adr); 1305 version = SDW_VERSION(adr); 1306 1307 for (j = 0; j < num_slaves; j++) { 1308 /* find out how many identical parts were reported on that link */ 1309 if (ids[j].link_id == link_id && 1310 ids[j].id.part_id == part_id && 1311 ids[j].id.mfg_id == mfg_id && 1312 ids[j].id.sdw_version == version) 1313 reported_part_count++; 1314 } 1315 1316 for (j = 0; j < num_slaves; j++) { 1317 int expected_part_count = 0; 1318 1319 if (ids[j].link_id != link_id || 1320 ids[j].id.part_id != part_id || 1321 ids[j].id.mfg_id != mfg_id || 1322 ids[j].id.sdw_version != version) 1323 continue; 1324 1325 /* find out how many identical parts are expected */ 1326 for (k = 0; k < link->num_adr; k++) { 1327 u64 adr2 = link->adr_d[k].adr; 1328 1329 if (SDW_CODEC_ADR_MASK(adr2) == SDW_CODEC_ADR_MASK(adr)) 1330 expected_part_count++; 1331 } 1332 1333 if (reported_part_count == expected_part_count) { 1334 /* 1335 * we have to check unique id 1336 * if there is more than one 1337 * Slave on the link 1338 */ 1339 unique_id = SDW_UNIQUE_ID(adr); 1340 if (reported_part_count == 1 || 1341 ids[j].id.unique_id == unique_id) { 1342 dev_dbg(bus->dev, "found %x at link %d\n", 1343 part_id, link_id); 1344 break; 1345 } 1346 } else { 1347 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n", 1348 part_id, reported_part_count, expected_part_count, link_id); 1349 } 1350 } 1351 if (j == num_slaves) { 1352 dev_dbg(bus->dev, 1353 "Slave %x not found\n", 1354 part_id); 1355 return false; 1356 } 1357 } 1358 return true; 1359 } 1360 1361 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1362 { 1363 struct snd_sof_pdata *pdata = sdev->pdata; 1364 const struct snd_soc_acpi_link_adr *link; 1365 struct snd_soc_acpi_mach *mach; 1366 struct sof_intel_hda_dev *hdev; 1367 u32 link_mask; 1368 int i; 1369 1370 hdev = pdata->hw_pdata; 1371 link_mask = hdev->info.link_mask; 1372 1373 /* 1374 * Select SoundWire machine driver if needed using the 1375 * alternate tables. This case deals with SoundWire-only 1376 * machines, for mixed cases with I2C/I2S the detection relies 1377 * on the HID list. 1378 */ 1379 if (link_mask) { 1380 for (mach = pdata->desc->alt_machines; 1381 mach && mach->link_mask; mach++) { 1382 /* 1383 * On some platforms such as Up Extreme all links 1384 * are enabled but only one link can be used by 1385 * external codec. Instead of exact match of two masks, 1386 * first check whether link_mask of mach is subset of 1387 * link_mask supported by hw and then go on searching 1388 * link_adr 1389 */ 1390 if (~link_mask & mach->link_mask) 1391 continue; 1392 1393 /* No need to match adr if there is no links defined */ 1394 if (!mach->links) 1395 break; 1396 1397 link = mach->links; 1398 for (i = 0; i < hdev->info.count && link->num_adr; 1399 i++, link++) { 1400 /* 1401 * Try next machine if any expected Slaves 1402 * are not found on this link. 1403 */ 1404 if (!link_slaves_found(sdev, link, hdev->sdw)) 1405 break; 1406 } 1407 /* Found if all Slaves are checked */ 1408 if (i == hdev->info.count || !link->num_adr) 1409 break; 1410 } 1411 if (mach && mach->link_mask) { 1412 int dmic_num = 0; 1413 bool tplg_fixup; 1414 const char *tplg_filename; 1415 1416 mach->mach_params.links = mach->links; 1417 mach->mach_params.link_mask = mach->link_mask; 1418 mach->mach_params.platform = dev_name(sdev->dev); 1419 1420 if (pdata->tplg_filename) { 1421 tplg_fixup = false; 1422 } else { 1423 tplg_fixup = true; 1424 tplg_filename = mach->sof_tplg_filename; 1425 } 1426 1427 /* 1428 * DMICs use up to 4 pins and are typically pin-muxed with SoundWire 1429 * link 2 and 3, or link 1 and 2, thus we only try to enable dmics 1430 * if all conditions are true: 1431 * a) 2 or fewer links are used by SoundWire 1432 * b) the NHLT table reports the presence of microphones 1433 */ 1434 if (hweight_long(mach->link_mask) <= 2) { 1435 int ret; 1436 1437 ret = dmic_detect_topology_fixup(sdev, &tplg_filename, "", 1438 &dmic_num, tplg_fixup); 1439 if (ret < 0) 1440 return NULL; 1441 } 1442 if (tplg_fixup) 1443 pdata->tplg_filename = tplg_filename; 1444 mach->mach_params.dmic_num = dmic_num; 1445 1446 dev_dbg(sdev->dev, 1447 "SoundWire machine driver %s topology %s\n", 1448 mach->drv_name, 1449 pdata->tplg_filename); 1450 1451 return mach; 1452 } 1453 1454 dev_info(sdev->dev, "No SoundWire machine driver found\n"); 1455 } 1456 1457 return NULL; 1458 } 1459 #else 1460 static struct snd_soc_acpi_mach *hda_sdw_machine_select(struct snd_sof_dev *sdev) 1461 { 1462 return NULL; 1463 } 1464 #endif 1465 1466 void hda_set_mach_params(struct snd_soc_acpi_mach *mach, 1467 struct snd_sof_dev *sdev) 1468 { 1469 struct snd_sof_pdata *pdata = sdev->pdata; 1470 const struct sof_dev_desc *desc = pdata->desc; 1471 struct snd_soc_acpi_mach_params *mach_params; 1472 1473 mach_params = &mach->mach_params; 1474 mach_params->platform = dev_name(sdev->dev); 1475 mach_params->num_dai_drivers = desc->ops->num_drv; 1476 mach_params->dai_drivers = desc->ops->drv; 1477 } 1478 1479 struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev) 1480 { 1481 struct snd_sof_pdata *sof_pdata = sdev->pdata; 1482 const struct sof_dev_desc *desc = sof_pdata->desc; 1483 struct snd_soc_acpi_mach *mach; 1484 const char *tplg_filename; 1485 1486 mach = snd_soc_acpi_find_machine(desc->machines); 1487 if (mach) { 1488 bool add_extension = false; 1489 bool tplg_fixup = false; 1490 1491 /* 1492 * If tplg file name is overridden, use it instead of 1493 * the one set in mach table 1494 */ 1495 if (!sof_pdata->tplg_filename) { 1496 sof_pdata->tplg_filename = mach->sof_tplg_filename; 1497 tplg_fixup = true; 1498 } 1499 1500 /* report to machine driver if any DMICs are found */ 1501 mach->mach_params.dmic_num = check_dmic_num(sdev); 1502 1503 if (tplg_fixup && 1504 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER && 1505 mach->mach_params.dmic_num) { 1506 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1507 "%s%s%d%s", 1508 sof_pdata->tplg_filename, 1509 "-dmic", 1510 mach->mach_params.dmic_num, 1511 "ch"); 1512 if (!tplg_filename) 1513 return NULL; 1514 1515 sof_pdata->tplg_filename = tplg_filename; 1516 add_extension = true; 1517 } 1518 1519 if (mach->link_mask) { 1520 mach->mach_params.links = mach->links; 1521 mach->mach_params.link_mask = mach->link_mask; 1522 } 1523 1524 /* report SSP link mask to machine driver */ 1525 mach->mach_params.i2s_link_mask = check_nhlt_ssp_mask(sdev); 1526 1527 if (tplg_fixup && 1528 mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER && 1529 mach->mach_params.i2s_link_mask) { 1530 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); 1531 int ssp_num; 1532 1533 if (hweight_long(mach->mach_params.i2s_link_mask) > 1 && 1534 !(mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_MSB)) 1535 dev_warn(sdev->dev, "More than one SSP exposed by NHLT, choosing MSB\n"); 1536 1537 /* fls returns 1-based results, SSPs indices are 0-based */ 1538 ssp_num = fls(mach->mach_params.i2s_link_mask) - 1; 1539 1540 if (ssp_num >= chip->ssp_count) { 1541 dev_err(sdev->dev, "Invalid SSP %d, max on this platform is %d\n", 1542 ssp_num, chip->ssp_count); 1543 return NULL; 1544 } 1545 1546 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1547 "%s%s%d", 1548 sof_pdata->tplg_filename, 1549 "-ssp", 1550 ssp_num); 1551 if (!tplg_filename) 1552 return NULL; 1553 1554 sof_pdata->tplg_filename = tplg_filename; 1555 add_extension = true; 1556 } 1557 1558 if (tplg_fixup && add_extension) { 1559 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 1560 "%s%s", 1561 sof_pdata->tplg_filename, 1562 ".tplg"); 1563 if (!tplg_filename) 1564 return NULL; 1565 1566 sof_pdata->tplg_filename = tplg_filename; 1567 } 1568 } 1569 1570 /* 1571 * If I2S fails, try SoundWire 1572 */ 1573 if (!mach) 1574 mach = hda_sdw_machine_select(sdev); 1575 1576 /* 1577 * Choose HDA generic machine driver if mach is NULL. 1578 * Otherwise, set certain mach params. 1579 */ 1580 hda_generic_machine_select(sdev, &mach); 1581 if (!mach) 1582 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 1583 1584 return mach; 1585 } 1586 1587 int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1588 { 1589 int ret; 1590 1591 ret = snd_intel_dsp_driver_probe(pci); 1592 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) { 1593 dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n"); 1594 return -ENODEV; 1595 } 1596 1597 return sof_pci_probe(pci, pci_id); 1598 } 1599 EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON); 1600 1601 int hda_register_clients(struct snd_sof_dev *sdev) 1602 { 1603 return hda_probes_register(sdev); 1604 } 1605 1606 void hda_unregister_clients(struct snd_sof_dev *sdev) 1607 { 1608 hda_probes_unregister(sdev); 1609 } 1610 1611 MODULE_LICENSE("Dual BSD/GPL"); 1612 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); 1613 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 1614 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 1615 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 1616 MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI); 1617 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT); 1618