1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <sound/hdaudio_ext.h> 19 #include <sound/hda_register.h> 20 21 #include <linux/acpi.h> 22 #include <linux/module.h> 23 #include <linux/soundwire/sdw.h> 24 #include <linux/soundwire/sdw_intel.h> 25 #include <sound/intel-dsp-config.h> 26 #include <sound/intel-nhlt.h> 27 #include <sound/sof.h> 28 #include <sound/sof/xtensa.h> 29 #include "../sof-audio.h" 30 #include "../sof-pci-dev.h" 31 #include "../ops.h" 32 #include "hda.h" 33 34 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 35 #include <sound/soc-acpi-intel-match.h> 36 #endif 37 38 /* platform specific devices */ 39 #include "shim.h" 40 41 #define EXCEPT_MAX_HDR_SIZE 0x400 42 #define HDA_EXT_ROM_STATUS_SIZE 8 43 44 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 45 46 /* 47 * The default for SoundWire clock stop quirks is to power gate the IP 48 * and do a Bus Reset, this will need to be modified when the DSP 49 * needs to remain in D0i3 so that the Master does not lose context 50 * and enumeration is not required on clock restart 51 */ 52 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET; 53 module_param(sdw_clock_stop_quirks, int, 0444); 54 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks"); 55 56 static int sdw_params_stream(struct device *dev, 57 struct sdw_intel_stream_params_data *params_data) 58 { 59 struct snd_sof_dev *sdev = dev_get_drvdata(dev); 60 struct snd_soc_dai *d = params_data->dai; 61 struct sof_ipc_dai_config config; 62 struct sof_ipc_reply reply; 63 int link_id = params_data->link_id; 64 int alh_stream_id = params_data->alh_stream_id; 65 int ret; 66 u32 size = sizeof(config); 67 68 memset(&config, 0, size); 69 config.hdr.size = size; 70 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG; 71 config.type = SOF_DAI_INTEL_ALH; 72 config.dai_index = (link_id << 8) | (d->id); 73 config.alh.stream_id = alh_stream_id; 74 75 /* send message to DSP */ 76 ret = sof_ipc_tx_message(sdev->ipc, 77 config.hdr.cmd, &config, size, &reply, 78 sizeof(reply)); 79 if (ret < 0) { 80 dev_err(sdev->dev, 81 "error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n", 82 link_id, d->id, alh_stream_id); 83 } 84 85 return ret; 86 } 87 88 static int sdw_free_stream(struct device *dev, 89 struct sdw_intel_stream_free_data *free_data) 90 { 91 struct snd_sof_dev *sdev = dev_get_drvdata(dev); 92 struct snd_soc_dai *d = free_data->dai; 93 struct sof_ipc_dai_config config; 94 struct sof_ipc_reply reply; 95 int link_id = free_data->link_id; 96 int ret; 97 u32 size = sizeof(config); 98 99 memset(&config, 0, size); 100 config.hdr.size = size; 101 config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG; 102 config.type = SOF_DAI_INTEL_ALH; 103 config.dai_index = (link_id << 8) | d->id; 104 config.alh.stream_id = 0xFFFF; /* invalid value on purpose */ 105 106 /* send message to DSP */ 107 ret = sof_ipc_tx_message(sdev->ipc, 108 config.hdr.cmd, &config, size, &reply, 109 sizeof(reply)); 110 if (ret < 0) { 111 dev_err(sdev->dev, 112 "error: failed to free stream for link %d dai->id %d\n", 113 link_id, d->id); 114 } 115 116 return ret; 117 } 118 119 static const struct sdw_intel_ops sdw_callback = { 120 .params_stream = sdw_params_stream, 121 .free_stream = sdw_free_stream, 122 }; 123 124 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) 125 { 126 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable); 127 } 128 129 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) 130 { 131 struct sof_intel_hda_dev *hdev; 132 acpi_handle handle; 133 int ret; 134 135 handle = ACPI_HANDLE(sdev->dev); 136 137 /* save ACPI info for the probe step */ 138 hdev = sdev->pdata->hw_pdata; 139 140 ret = sdw_intel_acpi_scan(handle, &hdev->info); 141 if (ret < 0) 142 return -EINVAL; 143 144 return 0; 145 } 146 147 static int hda_sdw_probe(struct snd_sof_dev *sdev) 148 { 149 struct sof_intel_hda_dev *hdev; 150 struct sdw_intel_res res; 151 void *sdw; 152 153 hdev = sdev->pdata->hw_pdata; 154 155 memset(&res, 0, sizeof(res)); 156 157 res.mmio_base = sdev->bar[HDA_DSP_BAR]; 158 res.irq = sdev->ipc_irq; 159 res.handle = hdev->info.handle; 160 res.parent = sdev->dev; 161 res.ops = &sdw_callback; 162 res.dev = sdev->dev; 163 res.clock_stop_quirks = sdw_clock_stop_quirks; 164 165 /* 166 * ops and arg fields are not populated for now, 167 * they will be needed when the DAI callbacks are 168 * provided 169 */ 170 171 /* we could filter links here if needed, e.g for quirks */ 172 res.count = hdev->info.count; 173 res.link_mask = hdev->info.link_mask; 174 175 sdw = sdw_intel_probe(&res); 176 if (!sdw) { 177 dev_err(sdev->dev, "error: SoundWire probe failed\n"); 178 return -EINVAL; 179 } 180 181 /* save context */ 182 hdev->sdw = sdw; 183 184 return 0; 185 } 186 187 int hda_sdw_startup(struct snd_sof_dev *sdev) 188 { 189 struct sof_intel_hda_dev *hdev; 190 191 hdev = sdev->pdata->hw_pdata; 192 193 if (!hdev->sdw) 194 return 0; 195 196 return sdw_intel_startup(hdev->sdw); 197 } 198 199 static int hda_sdw_exit(struct snd_sof_dev *sdev) 200 { 201 struct sof_intel_hda_dev *hdev; 202 203 hdev = sdev->pdata->hw_pdata; 204 205 hda_sdw_int_enable(sdev, false); 206 207 if (hdev->sdw) 208 sdw_intel_exit(hdev->sdw); 209 hdev->sdw = NULL; 210 211 return 0; 212 } 213 214 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev) 215 { 216 struct sof_intel_hda_dev *hdev; 217 bool ret = false; 218 u32 irq_status; 219 220 hdev = sdev->pdata->hw_pdata; 221 222 if (!hdev->sdw) 223 return ret; 224 225 /* store status */ 226 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); 227 228 /* invalid message ? */ 229 if (irq_status == 0xffffffff) 230 goto out; 231 232 /* SDW message ? */ 233 if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW) 234 ret = true; 235 236 out: 237 return ret; 238 } 239 240 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context) 241 { 242 return sdw_intel_thread(irq, context); 243 } 244 245 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev) 246 { 247 struct sof_intel_hda_dev *hdev; 248 249 hdev = sdev->pdata->hw_pdata; 250 if (hdev->sdw && 251 snd_sof_dsp_read(sdev, HDA_DSP_BAR, 252 HDA_DSP_REG_SNDW_WAKE_STS)) 253 return true; 254 255 return false; 256 } 257 258 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) 259 { 260 struct sof_intel_hda_dev *hdev; 261 262 hdev = sdev->pdata->hw_pdata; 263 if (!hdev->sdw) 264 return; 265 266 sdw_intel_process_wakeen_event(hdev->sdw); 267 } 268 269 #endif 270 271 /* 272 * Debug 273 */ 274 275 struct hda_dsp_msg_code { 276 u32 code; 277 const char *msg; 278 }; 279 280 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) 281 static bool hda_use_msi = true; 282 module_param_named(use_msi, hda_use_msi, bool, 0444); 283 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode"); 284 #else 285 #define hda_use_msi (1) 286 #endif 287 288 static char *hda_model; 289 module_param(hda_model, charp, 0444); 290 MODULE_PARM_DESC(hda_model, "Use the given HDA board model."); 291 292 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 293 static int hda_dmic_num = -1; 294 module_param_named(dmic_num, hda_dmic_num, int, 0444); 295 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number"); 296 #endif 297 298 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 299 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI); 300 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444); 301 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver"); 302 #endif 303 304 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = { 305 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"}, 306 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"}, 307 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"}, 308 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"}, 309 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"}, 310 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"}, 311 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"}, 312 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"}, 313 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"}, 314 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"}, 315 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"}, 316 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"}, 317 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"}, 318 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"}, 319 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"}, 320 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"}, 321 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"}, 322 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"}, 323 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"}, 324 }; 325 326 static void hda_dsp_get_status(struct snd_sof_dev *sdev) 327 { 328 u32 status; 329 int i; 330 331 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, 332 HDA_DSP_SRAM_REG_ROM_STATUS); 333 334 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) { 335 if (status == hda_dsp_rom_msg[i].code) { 336 dev_err(sdev->dev, "%s - code %8.8x\n", 337 hda_dsp_rom_msg[i].msg, status); 338 return; 339 } 340 } 341 342 /* not for us, must be generic sof message */ 343 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status); 344 } 345 346 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, 347 struct sof_ipc_dsp_oops_xtensa *xoops, 348 struct sof_ipc_panic_info *panic_info, 349 u32 *stack, size_t stack_words) 350 { 351 u32 offset = sdev->dsp_oops_offset; 352 353 /* first read registers */ 354 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); 355 356 /* note: variable AR register array is not read */ 357 358 /* then get panic info */ 359 if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) { 360 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", 361 xoops->arch_hdr.totalsize); 362 return; 363 } 364 offset += xoops->arch_hdr.totalsize; 365 sof_block_read(sdev, sdev->mmio_bar, offset, 366 panic_info, sizeof(*panic_info)); 367 368 /* then get the stack */ 369 offset += sizeof(*panic_info); 370 sof_block_read(sdev, sdev->mmio_bar, offset, stack, 371 stack_words * sizeof(u32)); 372 } 373 374 /* dump the first 8 dwords representing the extended ROM status */ 375 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, u32 flags) 376 { 377 char msg[128]; 378 int len = 0; 379 u32 value; 380 int i; 381 382 for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) { 383 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_ROM_STATUS + i * 0x4); 384 len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value); 385 } 386 387 sof_dev_dbg_or_err(sdev->dev, flags & SOF_DBG_DUMP_FORCE_ERR_LEVEL, 388 "extended rom status: %s", msg); 389 390 } 391 392 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) 393 { 394 struct sof_ipc_dsp_oops_xtensa xoops; 395 struct sof_ipc_panic_info panic_info; 396 u32 stack[HDA_DSP_STACK_DUMP_SIZE]; 397 398 /* print ROM/FW status */ 399 hda_dsp_get_status(sdev); 400 401 /* print panic info if FW boot is complete. Otherwise, print the extended ROM status */ 402 if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) { 403 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); 404 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); 405 406 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, 407 HDA_DSP_STACK_DUMP_SIZE); 408 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info, 409 stack, HDA_DSP_STACK_DUMP_SIZE); 410 } else { 411 hda_dsp_dump_ext_rom_status(sdev, flags); 412 } 413 } 414 415 void hda_ipc_irq_dump(struct snd_sof_dev *sdev) 416 { 417 struct hdac_bus *bus = sof_to_bus(sdev); 418 u32 adspis; 419 u32 intsts; 420 u32 intctl; 421 u32 ppsts; 422 u8 rirbsts; 423 424 /* read key IRQ stats and config registers */ 425 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); 426 intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS); 427 intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL); 428 ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS); 429 rirbsts = snd_hdac_chip_readb(bus, RIRBSTS); 430 431 dev_err(sdev->dev, 432 "error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n", 433 intsts, intctl, rirbsts); 434 dev_err(sdev->dev, 435 "error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n", 436 ppsts, adspis); 437 } 438 439 void hda_ipc_dump(struct snd_sof_dev *sdev) 440 { 441 u32 hipcie; 442 u32 hipct; 443 u32 hipcctl; 444 445 hda_ipc_irq_dump(sdev); 446 447 /* read IPC status */ 448 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); 449 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); 450 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL); 451 452 /* dump the IPC regs */ 453 /* TODO: parse the raw msg */ 454 dev_err(sdev->dev, 455 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n", 456 hipcie, hipct, hipcctl); 457 } 458 459 static int hda_init(struct snd_sof_dev *sdev) 460 { 461 struct hda_bus *hbus; 462 struct hdac_bus *bus; 463 struct pci_dev *pci = to_pci_dev(sdev->dev); 464 int ret; 465 466 hbus = sof_to_hbus(sdev); 467 bus = sof_to_bus(sdev); 468 469 /* HDA bus init */ 470 sof_hda_bus_init(bus, &pci->dev); 471 472 bus->use_posbuf = 1; 473 bus->bdl_pos_adj = 0; 474 bus->sync_write = 1; 475 476 mutex_init(&hbus->prepare_mutex); 477 hbus->pci = pci; 478 hbus->mixer_assigned = -1; 479 hbus->modelname = hda_model; 480 481 /* initialise hdac bus */ 482 bus->addr = pci_resource_start(pci, 0); 483 bus->remap_addr = pci_ioremap_bar(pci, 0); 484 if (!bus->remap_addr) { 485 dev_err(bus->dev, "error: ioremap error\n"); 486 return -ENXIO; 487 } 488 489 /* HDA base */ 490 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; 491 492 /* init i915 and HDMI codecs */ 493 ret = hda_codec_i915_init(sdev); 494 if (ret < 0) 495 dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n"); 496 497 /* get controller capabilities */ 498 ret = hda_dsp_ctrl_get_caps(sdev); 499 if (ret < 0) 500 dev_err(sdev->dev, "error: get caps error\n"); 501 502 return ret; 503 } 504 505 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 506 507 static int check_nhlt_dmic(struct snd_sof_dev *sdev) 508 { 509 struct nhlt_acpi_table *nhlt; 510 int dmic_num; 511 512 nhlt = intel_nhlt_init(sdev->dev); 513 if (nhlt) { 514 dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt); 515 intel_nhlt_free(nhlt); 516 if (dmic_num >= 1 && dmic_num <= 4) 517 return dmic_num; 518 } 519 520 return 0; 521 } 522 523 static const char *fixup_tplg_name(struct snd_sof_dev *sdev, 524 const char *sof_tplg_filename, 525 const char *idisp_str, 526 const char *dmic_str) 527 { 528 const char *tplg_filename = NULL; 529 char *filename, *tmp; 530 const char *split_ext; 531 532 filename = kstrdup(sof_tplg_filename, GFP_KERNEL); 533 if (!filename) 534 return NULL; 535 536 /* this assumes a .tplg extension */ 537 tmp = filename; 538 split_ext = strsep(&tmp, "."); 539 if (split_ext) 540 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL, 541 "%s%s%s.tplg", 542 split_ext, idisp_str, dmic_str); 543 kfree(filename); 544 545 return tplg_filename; 546 } 547 548 static int dmic_topology_fixup(struct snd_sof_dev *sdev, 549 const char **tplg_filename, 550 const char *idisp_str, 551 int *dmic_found) 552 { 553 const char *default_tplg_filename = *tplg_filename; 554 const char *fixed_tplg_filename; 555 const char *dmic_str; 556 int dmic_num; 557 558 /* first check NHLT for DMICs */ 559 dmic_num = check_nhlt_dmic(sdev); 560 561 /* allow for module parameter override */ 562 if (hda_dmic_num != -1) { 563 dev_dbg(sdev->dev, 564 "overriding DMICs detected in NHLT tables %d by kernel param %d\n", 565 dmic_num, hda_dmic_num); 566 dmic_num = hda_dmic_num; 567 } 568 569 switch (dmic_num) { 570 case 1: 571 dmic_str = "-1ch"; 572 break; 573 case 2: 574 dmic_str = "-2ch"; 575 break; 576 case 3: 577 dmic_str = "-3ch"; 578 break; 579 case 4: 580 dmic_str = "-4ch"; 581 break; 582 default: 583 dmic_num = 0; 584 dmic_str = ""; 585 break; 586 } 587 588 fixed_tplg_filename = fixup_tplg_name(sdev, default_tplg_filename, 589 idisp_str, dmic_str); 590 if (!fixed_tplg_filename) 591 return -ENOMEM; 592 593 dev_info(sdev->dev, "DMICs detected in NHLT tables: %d\n", dmic_num); 594 *dmic_found = dmic_num; 595 *tplg_filename = fixed_tplg_filename; 596 597 return 0; 598 } 599 #endif 600 601 static int hda_init_caps(struct snd_sof_dev *sdev) 602 { 603 struct hdac_bus *bus = sof_to_bus(sdev); 604 struct snd_sof_pdata *pdata = sdev->pdata; 605 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 606 struct hdac_ext_link *hlink; 607 #endif 608 struct sof_intel_hda_dev *hdev = pdata->hw_pdata; 609 u32 link_mask; 610 int ret = 0; 611 612 /* check if dsp is there */ 613 if (bus->ppcap) 614 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); 615 616 /* Init HDA controller after i915 init */ 617 ret = hda_dsp_ctrl_init_chip(sdev, true); 618 if (ret < 0) { 619 dev_err(bus->dev, "error: init chip failed with ret: %d\n", 620 ret); 621 return ret; 622 } 623 624 /* scan SoundWire capabilities exposed by DSDT */ 625 ret = hda_sdw_acpi_scan(sdev); 626 if (ret < 0) { 627 dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n"); 628 goto skip_soundwire; 629 } 630 631 link_mask = hdev->info.link_mask; 632 if (!link_mask) { 633 dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n"); 634 goto skip_soundwire; 635 } 636 637 /* 638 * probe/allocate SoundWire resources. 639 * The hardware configuration takes place in hda_sdw_startup 640 * after power rails are enabled. 641 * It's entirely possible to have a mix of I2S/DMIC/SoundWire 642 * devices, so we allocate the resources in all cases. 643 */ 644 ret = hda_sdw_probe(sdev); 645 if (ret < 0) { 646 dev_err(sdev->dev, "error: SoundWire probe error\n"); 647 return ret; 648 } 649 650 skip_soundwire: 651 652 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 653 if (bus->mlcap) 654 snd_hdac_ext_bus_get_ml_capabilities(bus); 655 656 /* create codec instances */ 657 hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi); 658 659 if (!HDA_IDISP_CODEC(bus->codec_mask)) 660 hda_codec_i915_display_power(sdev, false); 661 662 /* 663 * we are done probing so decrement link counts 664 */ 665 list_for_each_entry(hlink, &bus->hlink_list, list) 666 snd_hdac_ext_bus_link_put(bus, hlink); 667 #endif 668 return 0; 669 } 670 671 static const struct sof_intel_dsp_desc 672 *get_chip_info(struct snd_sof_pdata *pdata) 673 { 674 const struct sof_dev_desc *desc = pdata->desc; 675 const struct sof_intel_dsp_desc *chip_info; 676 677 chip_info = desc->chip_info; 678 679 return chip_info; 680 } 681 682 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context) 683 { 684 struct snd_sof_dev *sdev = context; 685 686 /* 687 * Get global interrupt status. It includes all hardware interrupt 688 * sources in the Intel HD Audio controller. 689 */ 690 if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) & 691 SOF_HDA_INTSTS_GIS) { 692 693 /* disable GIE interrupt */ 694 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 695 SOF_HDA_INTCTL, 696 SOF_HDA_INT_GLOBAL_EN, 697 0); 698 699 return IRQ_WAKE_THREAD; 700 } 701 702 return IRQ_NONE; 703 } 704 705 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context) 706 { 707 struct snd_sof_dev *sdev = context; 708 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; 709 710 /* deal with streams and controller first */ 711 if (hda_dsp_check_stream_irq(sdev)) 712 hda_dsp_stream_threaded_handler(irq, sdev); 713 714 if (hda_dsp_check_ipc_irq(sdev)) 715 sof_ops(sdev)->irq_thread(irq, sdev); 716 717 if (hda_dsp_check_sdw_irq(sdev)) 718 hda_dsp_sdw_thread(irq, hdev->sdw); 719 720 if (hda_sdw_check_wakeen_irq(sdev)) 721 hda_sdw_process_wakeen(sdev); 722 723 /* enable GIE interrupt */ 724 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 725 SOF_HDA_INTCTL, 726 SOF_HDA_INT_GLOBAL_EN, 727 SOF_HDA_INT_GLOBAL_EN); 728 729 return IRQ_HANDLED; 730 } 731 732 int hda_dsp_probe(struct snd_sof_dev *sdev) 733 { 734 struct pci_dev *pci = to_pci_dev(sdev->dev); 735 struct sof_intel_hda_dev *hdev; 736 struct hdac_bus *bus; 737 const struct sof_intel_dsp_desc *chip; 738 int ret = 0; 739 740 /* 741 * detect DSP by checking class/subclass/prog-id information 742 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required 743 * class=04 subclass 01 prog-if 00: DSP is present 744 * (and may be required e.g. for DMIC or SSP support) 745 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works 746 */ 747 if (pci->class == 0x040300) { 748 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n"); 749 return -ENODEV; 750 } else if (pci->class != 0x040100 && pci->class != 0x040380) { 751 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class); 752 return -ENODEV; 753 } 754 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class); 755 756 chip = get_chip_info(sdev->pdata); 757 if (!chip) { 758 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n", 759 pci->device); 760 ret = -EIO; 761 goto err; 762 } 763 764 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL); 765 if (!hdev) 766 return -ENOMEM; 767 sdev->pdata->hw_pdata = hdev; 768 hdev->desc = chip; 769 770 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec", 771 PLATFORM_DEVID_NONE, 772 NULL, 0); 773 if (IS_ERR(hdev->dmic_dev)) { 774 dev_err(sdev->dev, "error: failed to create DMIC device\n"); 775 return PTR_ERR(hdev->dmic_dev); 776 } 777 778 /* 779 * use position update IPC if either it is forced 780 * or we don't have other choice 781 */ 782 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION) 783 hdev->no_ipc_position = 0; 784 #else 785 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0; 786 #endif 787 788 /* set up HDA base */ 789 bus = sof_to_bus(sdev); 790 ret = hda_init(sdev); 791 if (ret < 0) 792 goto hdac_bus_unmap; 793 794 /* DSP base */ 795 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR); 796 if (!sdev->bar[HDA_DSP_BAR]) { 797 dev_err(sdev->dev, "error: ioremap error\n"); 798 ret = -ENXIO; 799 goto hdac_bus_unmap; 800 } 801 802 sdev->mmio_bar = HDA_DSP_BAR; 803 sdev->mailbox_bar = HDA_DSP_BAR; 804 805 /* allow 64bit DMA address if supported by H/W */ 806 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) { 807 dev_dbg(sdev->dev, "DMA mask is 32 bit\n"); 808 dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)); 809 } 810 811 /* init streams */ 812 ret = hda_dsp_stream_init(sdev); 813 if (ret < 0) { 814 dev_err(sdev->dev, "error: failed to init streams\n"); 815 /* 816 * not all errors are due to memory issues, but trying 817 * to free everything does not harm 818 */ 819 goto free_streams; 820 } 821 822 /* 823 * register our IRQ 824 * let's try to enable msi firstly 825 * if it fails, use legacy interrupt mode 826 * TODO: support msi multiple vectors 827 */ 828 if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) { 829 dev_info(sdev->dev, "use msi interrupt mode\n"); 830 sdev->ipc_irq = pci_irq_vector(pci, 0); 831 /* initialised to "false" by kzalloc() */ 832 sdev->msi_enabled = true; 833 } 834 835 if (!sdev->msi_enabled) { 836 dev_info(sdev->dev, "use legacy interrupt mode\n"); 837 /* 838 * in IO-APIC mode, hda->irq and ipc_irq are using the same 839 * irq number of pci->irq 840 */ 841 sdev->ipc_irq = pci->irq; 842 } 843 844 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq); 845 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler, 846 hda_dsp_interrupt_thread, 847 IRQF_SHARED, "AudioDSP", sdev); 848 if (ret < 0) { 849 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n", 850 sdev->ipc_irq); 851 goto free_irq_vector; 852 } 853 854 pci_set_master(pci); 855 synchronize_irq(pci->irq); 856 857 /* 858 * clear TCSEL to clear playback on some HD Audio 859 * codecs. PCI TCSEL is defined in the Intel manuals. 860 */ 861 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); 862 863 /* init HDA capabilities */ 864 ret = hda_init_caps(sdev); 865 if (ret < 0) 866 goto free_ipc_irq; 867 868 /* enable ppcap interrupt */ 869 hda_dsp_ctrl_ppcap_enable(sdev, true); 870 hda_dsp_ctrl_ppcap_int_enable(sdev, true); 871 872 /* set default mailbox offset for FW ready message */ 873 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET; 874 875 INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work); 876 877 return 0; 878 879 free_ipc_irq: 880 free_irq(sdev->ipc_irq, sdev); 881 free_irq_vector: 882 if (sdev->msi_enabled) 883 pci_free_irq_vectors(pci); 884 free_streams: 885 hda_dsp_stream_free(sdev); 886 /* dsp_unmap: not currently used */ 887 iounmap(sdev->bar[HDA_DSP_BAR]); 888 hdac_bus_unmap: 889 platform_device_unregister(hdev->dmic_dev); 890 iounmap(bus->remap_addr); 891 hda_codec_i915_exit(sdev); 892 err: 893 return ret; 894 } 895 896 int hda_dsp_remove(struct snd_sof_dev *sdev) 897 { 898 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 899 struct hdac_bus *bus = sof_to_bus(sdev); 900 struct pci_dev *pci = to_pci_dev(sdev->dev); 901 const struct sof_intel_dsp_desc *chip = hda->desc; 902 903 /* cancel any attempt for DSP D0I3 */ 904 cancel_delayed_work_sync(&hda->d0i3_work); 905 906 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 907 /* codec removal, invoke bus_device_remove */ 908 snd_hdac_ext_bus_device_remove(bus); 909 #endif 910 911 hda_sdw_exit(sdev); 912 913 if (!IS_ERR_OR_NULL(hda->dmic_dev)) 914 platform_device_unregister(hda->dmic_dev); 915 916 /* disable DSP IRQ */ 917 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 918 SOF_HDA_PPCTL_PIE, 0); 919 920 /* disable CIE and GIE interrupts */ 921 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 922 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0); 923 924 /* disable cores */ 925 if (chip) 926 snd_sof_dsp_core_power_down(sdev, chip->host_managed_cores_mask); 927 928 /* disable DSP */ 929 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL, 930 SOF_HDA_PPCTL_GPROCEN, 0); 931 932 free_irq(sdev->ipc_irq, sdev); 933 if (sdev->msi_enabled) 934 pci_free_irq_vectors(pci); 935 936 hda_dsp_stream_free(sdev); 937 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 938 snd_hdac_link_free_all(bus); 939 #endif 940 941 iounmap(sdev->bar[HDA_DSP_BAR]); 942 iounmap(bus->remap_addr); 943 944 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 945 snd_hdac_ext_bus_exit(bus); 946 #endif 947 hda_codec_i915_exit(sdev); 948 949 return 0; 950 } 951 952 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) 953 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 954 { 955 struct hdac_bus *bus = sof_to_bus(sdev); 956 struct snd_soc_acpi_mach_params *mach_params; 957 struct snd_soc_acpi_mach *hda_mach; 958 struct snd_sof_pdata *pdata = sdev->pdata; 959 const char *tplg_filename; 960 const char *idisp_str; 961 int dmic_num = 0; 962 int codec_num = 0; 963 int ret; 964 int i; 965 966 /* codec detection */ 967 if (!bus->codec_mask) { 968 dev_info(bus->dev, "no hda codecs found!\n"); 969 } else { 970 dev_info(bus->dev, "hda codecs found, mask %lx\n", 971 bus->codec_mask); 972 973 for (i = 0; i < HDA_MAX_CODECS; i++) { 974 if (bus->codec_mask & (1 << i)) 975 codec_num++; 976 } 977 978 /* 979 * If no machine driver is found, then: 980 * 981 * generic hda machine driver can handle: 982 * - one HDMI codec, and/or 983 * - one external HDAudio codec 984 */ 985 if (!pdata->machine && codec_num <= 2) { 986 hda_mach = snd_soc_acpi_intel_hda_machines; 987 988 dev_info(bus->dev, "using HDA machine driver %s now\n", 989 hda_mach->drv_name); 990 991 if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask)) 992 idisp_str = "-idisp"; 993 else 994 idisp_str = ""; 995 996 /* topology: use the info from hda_machines */ 997 tplg_filename = hda_mach->sof_tplg_filename; 998 ret = dmic_topology_fixup(sdev, &tplg_filename, idisp_str, &dmic_num); 999 if (ret < 0) 1000 return ret; 1001 1002 hda_mach->mach_params.dmic_num = dmic_num; 1003 pdata->machine = hda_mach; 1004 pdata->tplg_filename = tplg_filename; 1005 } 1006 } 1007 1008 /* used by hda machine driver to create dai links */ 1009 if (pdata->machine) { 1010 mach_params = (struct snd_soc_acpi_mach_params *) 1011 &pdata->machine->mach_params; 1012 mach_params->codec_mask = bus->codec_mask; 1013 mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi; 1014 } 1015 1016 return 0; 1017 } 1018 #else 1019 static int hda_generic_machine_select(struct snd_sof_dev *sdev) 1020 { 1021 return 0; 1022 } 1023 #endif 1024 1025 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) 1026 /* Check if all Slaves defined on the link can be found */ 1027 static bool link_slaves_found(struct snd_sof_dev *sdev, 1028 const struct snd_soc_acpi_link_adr *link, 1029 struct sdw_intel_ctx *sdw) 1030 { 1031 struct hdac_bus *bus = sof_to_bus(sdev); 1032 struct sdw_intel_slave_id *ids = sdw->ids; 1033 int num_slaves = sdw->num_slaves; 1034 unsigned int part_id, link_id, unique_id, mfg_id; 1035 int i, j, k; 1036 1037 for (i = 0; i < link->num_adr; i++) { 1038 u64 adr = link->adr_d[i].adr; 1039 int reported_part_count = 0; 1040 1041 mfg_id = SDW_MFG_ID(adr); 1042 part_id = SDW_PART_ID(adr); 1043 link_id = SDW_DISCO_LINK_ID(adr); 1044 1045 for (j = 0; j < num_slaves; j++) { 1046 /* find out how many identical parts were reported on that link */ 1047 if (ids[j].link_id == link_id && 1048 ids[j].id.part_id == part_id && 1049 ids[j].id.mfg_id == mfg_id) 1050 reported_part_count++; 1051 } 1052 1053 for (j = 0; j < num_slaves; j++) { 1054 int expected_part_count = 0; 1055 1056 if (ids[j].link_id != link_id || 1057 ids[j].id.part_id != part_id || 1058 ids[j].id.mfg_id != mfg_id) 1059 continue; 1060 1061 /* find out how many identical parts are expected */ 1062 for (k = 0; k < link->num_adr; k++) { 1063 u64 adr2 = link->adr_d[k].adr; 1064 unsigned int part_id2, link_id2, mfg_id2; 1065 1066 mfg_id2 = SDW_MFG_ID(adr2); 1067 part_id2 = SDW_PART_ID(adr2); 1068 link_id2 = SDW_DISCO_LINK_ID(adr2); 1069 1070 if (link_id2 == link_id && 1071 part_id2 == part_id && 1072 mfg_id2 == mfg_id) 1073 expected_part_count++; 1074 } 1075 1076 if (reported_part_count == expected_part_count) { 1077 /* 1078 * we have to check unique id 1079 * if there is more than one 1080 * Slave on the link 1081 */ 1082 unique_id = SDW_UNIQUE_ID(adr); 1083 if (reported_part_count == 1 || 1084 ids[j].id.unique_id == unique_id) { 1085 dev_dbg(bus->dev, "found %x at link %d\n", 1086 part_id, link_id); 1087 break; 1088 } 1089 } else { 1090 dev_dbg(bus->dev, "part %x reported %d expected %d on link %d, skipping\n", 1091 part_id, reported_part_count, expected_part_count, link_id); 1092 } 1093 } 1094 if (j == num_slaves) { 1095 dev_dbg(bus->dev, 1096 "Slave %x not found\n", 1097 part_id); 1098 return false; 1099 } 1100 } 1101 return true; 1102 } 1103 1104 static int hda_sdw_machine_select(struct snd_sof_dev *sdev) 1105 { 1106 struct snd_sof_pdata *pdata = sdev->pdata; 1107 const struct snd_soc_acpi_link_adr *link; 1108 struct snd_soc_acpi_mach *mach; 1109 struct sof_intel_hda_dev *hdev; 1110 u32 link_mask; 1111 int i; 1112 1113 hdev = pdata->hw_pdata; 1114 link_mask = hdev->info.link_mask; 1115 1116 /* 1117 * Select SoundWire machine driver if needed using the 1118 * alternate tables. This case deals with SoundWire-only 1119 * machines, for mixed cases with I2C/I2S the detection relies 1120 * on the HID list. 1121 */ 1122 if (link_mask && !pdata->machine) { 1123 for (mach = pdata->desc->alt_machines; 1124 mach && mach->link_mask; mach++) { 1125 /* 1126 * On some platforms such as Up Extreme all links 1127 * are enabled but only one link can be used by 1128 * external codec. Instead of exact match of two masks, 1129 * first check whether link_mask of mach is subset of 1130 * link_mask supported by hw and then go on searching 1131 * link_adr 1132 */ 1133 if (~link_mask & mach->link_mask) 1134 continue; 1135 1136 /* No need to match adr if there is no links defined */ 1137 if (!mach->links) 1138 break; 1139 1140 link = mach->links; 1141 for (i = 0; i < hdev->info.count && link->num_adr; 1142 i++, link++) { 1143 /* 1144 * Try next machine if any expected Slaves 1145 * are not found on this link. 1146 */ 1147 if (!link_slaves_found(sdev, link, hdev->sdw)) 1148 break; 1149 } 1150 /* Found if all Slaves are checked */ 1151 if (i == hdev->info.count || !link->num_adr) 1152 break; 1153 } 1154 if (mach && mach->link_mask) { 1155 int dmic_num = 0; 1156 1157 pdata->machine = mach; 1158 mach->mach_params.links = mach->links; 1159 mach->mach_params.link_mask = mach->link_mask; 1160 mach->mach_params.platform = dev_name(sdev->dev); 1161 if (mach->sof_fw_filename) 1162 pdata->fw_filename = mach->sof_fw_filename; 1163 else 1164 pdata->fw_filename = pdata->desc->default_fw_filename; 1165 pdata->tplg_filename = mach->sof_tplg_filename; 1166 1167 /* 1168 * DMICs use up to 4 pins and are typically pin-muxed with SoundWire 1169 * link 2 and 3, thus we only try to enable dmics if all conditions 1170 * are true: 1171 * a) link 2 and 3 are not used by SoundWire 1172 * b) the NHLT table reports the presence of microphones 1173 */ 1174 if (!(mach->link_mask & GENMASK(3, 2))) { 1175 const char *tplg_filename = mach->sof_tplg_filename; 1176 int ret; 1177 1178 ret = dmic_topology_fixup(sdev, &tplg_filename, "", &dmic_num); 1179 1180 if (ret < 0) 1181 return ret; 1182 1183 pdata->tplg_filename = tplg_filename; 1184 } 1185 mach->mach_params.dmic_num = dmic_num; 1186 1187 dev_dbg(sdev->dev, 1188 "SoundWire machine driver %s topology %s\n", 1189 mach->drv_name, 1190 pdata->tplg_filename); 1191 } else { 1192 dev_info(sdev->dev, 1193 "No SoundWire machine driver found\n"); 1194 } 1195 } 1196 1197 return 0; 1198 } 1199 #else 1200 static int hda_sdw_machine_select(struct snd_sof_dev *sdev) 1201 { 1202 return 0; 1203 } 1204 #endif 1205 1206 void hda_set_mach_params(const struct snd_soc_acpi_mach *mach, 1207 struct snd_sof_dev *sdev) 1208 { 1209 struct snd_sof_pdata *pdata = sdev->pdata; 1210 const struct sof_dev_desc *desc = pdata->desc; 1211 struct snd_soc_acpi_mach_params *mach_params; 1212 1213 mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params; 1214 mach_params->platform = dev_name(sdev->dev); 1215 mach_params->num_dai_drivers = desc->ops->num_drv; 1216 mach_params->dai_drivers = desc->ops->drv; 1217 } 1218 1219 void hda_machine_select(struct snd_sof_dev *sdev) 1220 { 1221 struct snd_sof_pdata *sof_pdata = sdev->pdata; 1222 const struct sof_dev_desc *desc = sof_pdata->desc; 1223 struct snd_soc_acpi_mach *mach; 1224 1225 mach = snd_soc_acpi_find_machine(desc->machines); 1226 if (mach) { 1227 /* 1228 * If tplg file name is overridden, use it instead of 1229 * the one set in mach table 1230 */ 1231 if (!sof_pdata->tplg_filename) 1232 sof_pdata->tplg_filename = mach->sof_tplg_filename; 1233 1234 sof_pdata->machine = mach; 1235 1236 if (mach->link_mask) { 1237 mach->mach_params.links = mach->links; 1238 mach->mach_params.link_mask = mach->link_mask; 1239 } 1240 } 1241 1242 /* 1243 * If I2S fails, try SoundWire 1244 */ 1245 hda_sdw_machine_select(sdev); 1246 1247 /* 1248 * Choose HDA generic machine driver if mach is NULL. 1249 * Otherwise, set certain mach params. 1250 */ 1251 hda_generic_machine_select(sdev); 1252 1253 if (!sof_pdata->machine) 1254 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); 1255 } 1256 1257 int hda_pci_intel_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1258 { 1259 int ret; 1260 1261 ret = snd_intel_dsp_driver_probe(pci); 1262 if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) { 1263 dev_dbg(&pci->dev, "SOF PCI driver not selected, aborting probe\n"); 1264 return -ENODEV; 1265 } 1266 1267 return sof_pci_probe(pci, pci_id); 1268 } 1269 EXPORT_SYMBOL_NS(hda_pci_intel_probe, SND_SOC_SOF_INTEL_HDA_COMMON); 1270 1271 MODULE_LICENSE("Dual BSD/GPL"); 1272 MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); 1273 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC); 1274 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915); 1275 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 1276 MODULE_IMPORT_NS(SND_INTEL_SOUNDWIRE_ACPI); 1277 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT); 1278