xref: /openbmc/linux/sound/soc/sof/intel/hda.c (revision 3ce311af) 
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 //	    Rander Wang <rander.wang@intel.com>
11 //          Keyon Jie <yang.jie@linux.intel.com>
12 //
13 
14 /*
15  * Hardware interface for generic Intel audio DSP HDA IP
16  */
17 
18 #include <sound/hdaudio_ext.h>
19 #include <sound/hda_register.h>
20 
21 #include <linux/module.h>
22 #include <sound/intel-nhlt.h>
23 #include <sound/sof.h>
24 #include <sound/sof/xtensa.h>
25 #include "../ops.h"
26 #include "hda.h"
27 
28 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
29 #include <sound/soc-acpi-intel-match.h>
30 #endif
31 
32 /* platform specific devices */
33 #include "shim.h"
34 
35 #define EXCEPT_MAX_HDR_SIZE	0x400
36 
37 /*
38  * Debug
39  */
40 
41 struct hda_dsp_msg_code {
42 	u32 code;
43 	const char *msg;
44 };
45 
46 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI);
47 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
48 module_param_named(use_msi, hda_use_msi, bool, 0444);
49 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
50 #endif
51 
52 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
53 static int hda_dmic_num = -1;
54 module_param_named(dmic_num, hda_dmic_num, int, 0444);
55 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
56 
57 static bool hda_codec_use_common_hdmi =
58 	IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_COMMON_HDMI_CODEC);
59 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
60 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
61 #endif
62 
63 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
64 	{HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
65 	{HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
66 	{HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
67 	{HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
68 	{HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
69 	{HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
70 	{HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
71 	{HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
72 	{HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
73 	{HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
74 	{HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
75 	{HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
76 	{HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
77 	{HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
78 	{HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
79 	{HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
80 	{HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
81 	{HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
82 	{HDA_DSP_ROM_NULL_FW_ENTRY,	"error: null FW entry point"},
83 };
84 
85 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
86 {
87 	u32 status;
88 	int i;
89 
90 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
91 				  HDA_ADSP_FW_STATUS_SKL);
92 
93 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
94 		if (status == hda_dsp_rom_msg[i].code) {
95 			dev_err(sdev->dev, "%s - code %8.8x\n",
96 				hda_dsp_rom_msg[i].msg, status);
97 			return;
98 		}
99 	}
100 
101 	/* not for us, must be generic sof message */
102 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
103 }
104 
105 static void hda_dsp_get_status(struct snd_sof_dev *sdev)
106 {
107 	u32 status;
108 	int i;
109 
110 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
111 				  HDA_DSP_SRAM_REG_ROM_STATUS);
112 
113 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
114 		if (status == hda_dsp_rom_msg[i].code) {
115 			dev_err(sdev->dev, "%s - code %8.8x\n",
116 				hda_dsp_rom_msg[i].msg, status);
117 			return;
118 		}
119 	}
120 
121 	/* not for us, must be generic sof message */
122 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
123 }
124 
125 static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
126 				  struct sof_ipc_dsp_oops_xtensa *xoops,
127 				  struct sof_ipc_panic_info *panic_info,
128 				  u32 *stack, size_t stack_words)
129 {
130 	u32 offset = sdev->dsp_oops_offset;
131 
132 	/* first read registers */
133 	sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
134 
135 	/* note: variable AR register array is not read */
136 
137 	/* then get panic info */
138 	if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
139 		dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
140 			xoops->arch_hdr.totalsize);
141 		return;
142 	}
143 	offset += xoops->arch_hdr.totalsize;
144 	sof_block_read(sdev, sdev->mmio_bar, offset,
145 		       panic_info, sizeof(*panic_info));
146 
147 	/* then get the stack */
148 	offset += sizeof(*panic_info);
149 	sof_block_read(sdev, sdev->mmio_bar, offset, stack,
150 		       stack_words * sizeof(u32));
151 }
152 
153 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
154 {
155 	struct sof_ipc_dsp_oops_xtensa xoops;
156 	struct sof_ipc_panic_info panic_info;
157 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
158 	u32 status, panic;
159 
160 	/* try APL specific status message types first */
161 	hda_dsp_get_status_skl(sdev);
162 
163 	/* now try generic SOF status messages */
164 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
165 				  HDA_ADSP_ERROR_CODE_SKL);
166 
167 	/*TODO: Check: there is no define in spec, but it is used in the code*/
168 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
169 				 HDA_ADSP_ERROR_CODE_SKL + 0x4);
170 
171 	if (sdev->boot_complete) {
172 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
173 				      HDA_DSP_STACK_DUMP_SIZE);
174 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
175 				   stack, HDA_DSP_STACK_DUMP_SIZE);
176 	} else {
177 		dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
178 			status, panic);
179 		hda_dsp_get_status_skl(sdev);
180 	}
181 }
182 
183 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
184 {
185 	struct sof_ipc_dsp_oops_xtensa xoops;
186 	struct sof_ipc_panic_info panic_info;
187 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
188 	u32 status, panic;
189 
190 	/* try APL specific status message types first */
191 	hda_dsp_get_status(sdev);
192 
193 	/* now try generic SOF status messages */
194 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
195 				  HDA_DSP_SRAM_REG_FW_STATUS);
196 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
197 
198 	if (sdev->boot_complete) {
199 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
200 				      HDA_DSP_STACK_DUMP_SIZE);
201 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
202 				   stack, HDA_DSP_STACK_DUMP_SIZE);
203 	} else {
204 		dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
205 			status, panic);
206 		hda_dsp_get_status(sdev);
207 	}
208 }
209 
210 void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
211 {
212 	struct hdac_bus *bus = sof_to_bus(sdev);
213 	u32 adspis;
214 	u32 intsts;
215 	u32 intctl;
216 	u32 ppsts;
217 	u8 rirbsts;
218 
219 	/* read key IRQ stats and config registers */
220 	adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
221 	intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
222 	intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
223 	ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
224 	rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
225 
226 	dev_err(sdev->dev,
227 		"error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
228 		intsts, intctl, rirbsts);
229 	dev_err(sdev->dev,
230 		"error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
231 		ppsts, adspis);
232 }
233 
234 void hda_ipc_dump(struct snd_sof_dev *sdev)
235 {
236 	u32 hipcie;
237 	u32 hipct;
238 	u32 hipcctl;
239 
240 	hda_ipc_irq_dump(sdev);
241 
242 	/* read IPC status */
243 	hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
244 	hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
245 	hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
246 
247 	/* dump the IPC regs */
248 	/* TODO: parse the raw msg */
249 	dev_err(sdev->dev,
250 		"error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
251 		hipcie, hipct, hipcctl);
252 }
253 
254 static int hda_init(struct snd_sof_dev *sdev)
255 {
256 	struct hda_bus *hbus;
257 	struct hdac_bus *bus;
258 	struct pci_dev *pci = to_pci_dev(sdev->dev);
259 	int ret;
260 
261 	hbus = sof_to_hbus(sdev);
262 	bus = sof_to_bus(sdev);
263 
264 	/* HDA bus init */
265 	sof_hda_bus_init(bus, &pci->dev);
266 
267 	bus->use_posbuf = 1;
268 	bus->bdl_pos_adj = 0;
269 	bus->sync_write = 1;
270 
271 	mutex_init(&hbus->prepare_mutex);
272 	hbus->pci = pci;
273 	hbus->mixer_assigned = -1;
274 	hbus->modelname = "sofbus";
275 
276 	/* initialise hdac bus */
277 	bus->addr = pci_resource_start(pci, 0);
278 #if IS_ENABLED(CONFIG_PCI)
279 	bus->remap_addr = pci_ioremap_bar(pci, 0);
280 #endif
281 	if (!bus->remap_addr) {
282 		dev_err(bus->dev, "error: ioremap error\n");
283 		return -ENXIO;
284 	}
285 
286 	/* HDA base */
287 	sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
288 
289 	/* get controller capabilities */
290 	ret = hda_dsp_ctrl_get_caps(sdev);
291 	if (ret < 0)
292 		dev_err(sdev->dev, "error: get caps error\n");
293 
294 	return ret;
295 }
296 
297 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
298 
299 static int check_nhlt_dmic(struct snd_sof_dev *sdev)
300 {
301 	struct nhlt_acpi_table *nhlt;
302 	int dmic_num;
303 
304 	nhlt = intel_nhlt_init(sdev->dev);
305 	if (nhlt) {
306 		dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
307 		intel_nhlt_free(nhlt);
308 		if (dmic_num == 2 || dmic_num == 4)
309 			return dmic_num;
310 	}
311 
312 	return 0;
313 }
314 
315 static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
316 				   const char *sof_tplg_filename,
317 				   const char *idisp_str,
318 				   const char *dmic_str)
319 {
320 	const char *tplg_filename = NULL;
321 	char *filename;
322 	char *split_ext;
323 
324 	filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
325 	if (!filename)
326 		return NULL;
327 
328 	/* this assumes a .tplg extension */
329 	split_ext = strsep(&filename, ".");
330 	if (split_ext) {
331 		tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
332 					       "%s%s%s.tplg",
333 					       split_ext, idisp_str, dmic_str);
334 		if (!tplg_filename)
335 			return NULL;
336 	}
337 	return tplg_filename;
338 }
339 
340 #endif
341 
342 static int hda_init_caps(struct snd_sof_dev *sdev)
343 {
344 	struct hdac_bus *bus = sof_to_bus(sdev);
345 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
346 	struct hdac_ext_link *hlink;
347 	struct snd_soc_acpi_mach_params *mach_params;
348 	struct snd_soc_acpi_mach *hda_mach;
349 	struct snd_sof_pdata *pdata = sdev->pdata;
350 	struct snd_soc_acpi_mach *mach;
351 	const char *tplg_filename;
352 	const char *idisp_str;
353 	const char *dmic_str;
354 	int dmic_num;
355 	int codec_num = 0;
356 	int i;
357 #endif
358 	int ret = 0;
359 
360 	device_disable_async_suspend(bus->dev);
361 
362 	/* check if dsp is there */
363 	if (bus->ppcap)
364 		dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
365 
366 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
367 	/* init i915 and HDMI codecs */
368 	ret = hda_codec_i915_init(sdev);
369 	if (ret < 0) {
370 		dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n");
371 		return ret;
372 	}
373 #endif
374 
375 	/* Init HDA controller after i915 init */
376 	ret = hda_dsp_ctrl_init_chip(sdev, true);
377 	if (ret < 0) {
378 		dev_err(bus->dev, "error: init chip failed with ret: %d\n",
379 			ret);
380 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
381 		hda_codec_i915_exit(sdev);
382 #endif
383 		return ret;
384 	}
385 
386 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
387 	if (bus->mlcap)
388 		snd_hdac_ext_bus_get_ml_capabilities(bus);
389 
390 	/* codec detection */
391 	if (!bus->codec_mask) {
392 		dev_info(bus->dev, "no hda codecs found!\n");
393 	} else {
394 		dev_info(bus->dev, "hda codecs found, mask %lx\n",
395 			 bus->codec_mask);
396 
397 		for (i = 0; i < HDA_MAX_CODECS; i++) {
398 			if (bus->codec_mask & (1 << i))
399 				codec_num++;
400 		}
401 
402 		/*
403 		 * If no machine driver is found, then:
404 		 *
405 		 * hda machine driver is used if :
406 		 * 1. there is one HDMI codec and one external HDAudio codec
407 		 * 2. only HDMI codec
408 		 */
409 		if (!pdata->machine && codec_num <= 2 &&
410 		    HDA_IDISP_CODEC(bus->codec_mask)) {
411 			hda_mach = snd_soc_acpi_intel_hda_machines;
412 			pdata->machine = hda_mach;
413 
414 			/* topology: use the info from hda_machines */
415 			pdata->tplg_filename =
416 				hda_mach->sof_tplg_filename;
417 
418 			/*
419 			 * firmware: pick the first in machine list,
420 			 * or use nocodec firmware name if list is empty
421 			 */
422 			mach = pdata->desc->machines;
423 			if (mach->id[0])
424 				pdata->fw_filename = mach->sof_fw_filename;
425 			else
426 				pdata->fw_filename =
427 					pdata->desc->nocodec_fw_filename;
428 
429 			dev_info(bus->dev, "using HDA machine driver %s now\n",
430 				 hda_mach->drv_name);
431 
432 			if (codec_num == 1)
433 				idisp_str = "-idisp";
434 			else
435 				idisp_str = "";
436 
437 			/* first check NHLT for DMICs */
438 			dmic_num = check_nhlt_dmic(sdev);
439 
440 			/* allow for module parameter override */
441 			if (hda_dmic_num != -1)
442 				dmic_num = hda_dmic_num;
443 
444 			switch (dmic_num) {
445 			case 2:
446 				dmic_str = "-2ch";
447 				break;
448 			case 4:
449 				dmic_str = "-4ch";
450 				break;
451 			default:
452 				dmic_num = 0;
453 				dmic_str = "";
454 				break;
455 			}
456 
457 			tplg_filename = pdata->tplg_filename;
458 			tplg_filename = fixup_tplg_name(sdev, tplg_filename,
459 							idisp_str, dmic_str);
460 			if (!tplg_filename) {
461 				hda_codec_i915_exit(sdev);
462 				return ret;
463 			}
464 			pdata->tplg_filename = tplg_filename;
465 		}
466 	}
467 
468 	/* used by hda machine driver to create dai links */
469 	if (pdata->machine) {
470 		mach_params = (struct snd_soc_acpi_mach_params *)
471 			&pdata->machine->mach_params;
472 		mach_params->codec_mask = bus->codec_mask;
473 		mach_params->platform = dev_name(sdev->dev);
474 		mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
475 	}
476 
477 	/* create codec instances */
478 	hda_codec_probe_bus(sdev);
479 
480 	hda_codec_i915_put(sdev);
481 
482 	/*
483 	 * we are done probing so decrement link counts
484 	 */
485 	list_for_each_entry(hlink, &bus->hlink_list, list)
486 		snd_hdac_ext_bus_link_put(bus, hlink);
487 #endif
488 	return 0;
489 }
490 
491 static const struct sof_intel_dsp_desc
492 	*get_chip_info(struct snd_sof_pdata *pdata)
493 {
494 	const struct sof_dev_desc *desc = pdata->desc;
495 	const struct sof_intel_dsp_desc *chip_info;
496 
497 	chip_info = desc->chip_info;
498 
499 	return chip_info;
500 }
501 
502 int hda_dsp_probe(struct snd_sof_dev *sdev)
503 {
504 	struct pci_dev *pci = to_pci_dev(sdev->dev);
505 	struct sof_intel_hda_dev *hdev;
506 	struct hdac_bus *bus;
507 	const struct sof_intel_dsp_desc *chip;
508 	int ret = 0;
509 
510 	/*
511 	 * detect DSP by checking class/subclass/prog-id information
512 	 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
513 	 * class=04 subclass 01 prog-if 00: DSP is present
514 	 *   (and may be required e.g. for DMIC or SSP support)
515 	 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
516 	 */
517 	if (pci->class == 0x040300) {
518 		dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
519 		return -ENODEV;
520 	} else if (pci->class != 0x040100 && pci->class != 0x040380) {
521 		dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
522 		return -ENODEV;
523 	}
524 	dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
525 
526 	chip = get_chip_info(sdev->pdata);
527 	if (!chip) {
528 		dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
529 			pci->device);
530 		ret = -EIO;
531 		goto err;
532 	}
533 
534 	hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
535 	if (!hdev)
536 		return -ENOMEM;
537 	sdev->pdata->hw_pdata = hdev;
538 	hdev->desc = chip;
539 
540 	hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
541 						       PLATFORM_DEVID_NONE,
542 						       NULL, 0);
543 	if (IS_ERR(hdev->dmic_dev)) {
544 		dev_err(sdev->dev, "error: failed to create DMIC device\n");
545 		return PTR_ERR(hdev->dmic_dev);
546 	}
547 
548 	/*
549 	 * use position update IPC if either it is forced
550 	 * or we don't have other choice
551 	 */
552 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
553 	hdev->no_ipc_position = 0;
554 #else
555 	hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
556 #endif
557 
558 	/* set up HDA base */
559 	bus = sof_to_bus(sdev);
560 	ret = hda_init(sdev);
561 	if (ret < 0)
562 		goto hdac_bus_unmap;
563 
564 	/* DSP base */
565 #if IS_ENABLED(CONFIG_PCI)
566 	sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
567 #endif
568 	if (!sdev->bar[HDA_DSP_BAR]) {
569 		dev_err(sdev->dev, "error: ioremap error\n");
570 		ret = -ENXIO;
571 		goto hdac_bus_unmap;
572 	}
573 
574 	sdev->mmio_bar = HDA_DSP_BAR;
575 	sdev->mailbox_bar = HDA_DSP_BAR;
576 
577 	/* allow 64bit DMA address if supported by H/W */
578 	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
579 		dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
580 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
581 	} else {
582 		dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
583 		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
584 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
585 	}
586 
587 	/* init streams */
588 	ret = hda_dsp_stream_init(sdev);
589 	if (ret < 0) {
590 		dev_err(sdev->dev, "error: failed to init streams\n");
591 		/*
592 		 * not all errors are due to memory issues, but trying
593 		 * to free everything does not harm
594 		 */
595 		goto free_streams;
596 	}
597 
598 	/*
599 	 * register our IRQ
600 	 * let's try to enable msi firstly
601 	 * if it fails, use legacy interrupt mode
602 	 * TODO: support msi multiple vectors
603 	 */
604 	if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
605 		dev_info(sdev->dev, "use msi interrupt mode\n");
606 		hdev->irq = pci_irq_vector(pci, 0);
607 		/* ipc irq number is the same of hda irq */
608 		sdev->ipc_irq = hdev->irq;
609 		/* initialised to "false" by kzalloc() */
610 		sdev->msi_enabled = true;
611 	}
612 
613 	if (!sdev->msi_enabled) {
614 		dev_info(sdev->dev, "use legacy interrupt mode\n");
615 		/*
616 		 * in IO-APIC mode, hda->irq and ipc_irq are using the same
617 		 * irq number of pci->irq
618 		 */
619 		hdev->irq = pci->irq;
620 		sdev->ipc_irq = pci->irq;
621 	}
622 
623 	dev_dbg(sdev->dev, "using HDA IRQ %d\n", hdev->irq);
624 	ret = request_threaded_irq(hdev->irq, hda_dsp_stream_interrupt,
625 				   hda_dsp_stream_threaded_handler,
626 				   IRQF_SHARED, "AudioHDA", bus);
627 	if (ret < 0) {
628 		dev_err(sdev->dev, "error: failed to register HDA IRQ %d\n",
629 			hdev->irq);
630 		goto free_irq_vector;
631 	}
632 
633 	dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
634 	ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_ipc_irq_handler,
635 				   sof_ops(sdev)->irq_thread, IRQF_SHARED,
636 				   "AudioDSP", sdev);
637 	if (ret < 0) {
638 		dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
639 			sdev->ipc_irq);
640 		goto free_hda_irq;
641 	}
642 
643 	pci_set_master(pci);
644 	synchronize_irq(pci->irq);
645 
646 	/*
647 	 * clear TCSEL to clear playback on some HD Audio
648 	 * codecs. PCI TCSEL is defined in the Intel manuals.
649 	 */
650 	snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
651 
652 	/* init HDA capabilities */
653 	ret = hda_init_caps(sdev);
654 	if (ret < 0)
655 		goto free_ipc_irq;
656 
657 	/* enable ppcap interrupt */
658 	hda_dsp_ctrl_ppcap_enable(sdev, true);
659 	hda_dsp_ctrl_ppcap_int_enable(sdev, true);
660 
661 	/* initialize waitq for code loading */
662 	init_waitqueue_head(&sdev->waitq);
663 
664 	/* set default mailbox offset for FW ready message */
665 	sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
666 
667 	return 0;
668 
669 free_ipc_irq:
670 	free_irq(sdev->ipc_irq, sdev);
671 free_hda_irq:
672 	free_irq(hdev->irq, bus);
673 free_irq_vector:
674 	if (sdev->msi_enabled)
675 		pci_free_irq_vectors(pci);
676 free_streams:
677 	hda_dsp_stream_free(sdev);
678 /* dsp_unmap: not currently used */
679 	iounmap(sdev->bar[HDA_DSP_BAR]);
680 hdac_bus_unmap:
681 	iounmap(bus->remap_addr);
682 err:
683 	return ret;
684 }
685 
686 int hda_dsp_remove(struct snd_sof_dev *sdev)
687 {
688 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
689 	struct hdac_bus *bus = sof_to_bus(sdev);
690 	struct pci_dev *pci = to_pci_dev(sdev->dev);
691 	const struct sof_intel_dsp_desc *chip = hda->desc;
692 
693 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
694 	/* codec removal, invoke bus_device_remove */
695 	snd_hdac_ext_bus_device_remove(bus);
696 #endif
697 
698 	if (!IS_ERR_OR_NULL(hda->dmic_dev))
699 		platform_device_unregister(hda->dmic_dev);
700 
701 	/* disable DSP IRQ */
702 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
703 				SOF_HDA_PPCTL_PIE, 0);
704 
705 	/* disable CIE and GIE interrupts */
706 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
707 				SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
708 
709 	/* disable cores */
710 	if (chip)
711 		hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
712 
713 	/* disable DSP */
714 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
715 				SOF_HDA_PPCTL_GPROCEN, 0);
716 
717 	free_irq(sdev->ipc_irq, sdev);
718 	free_irq(hda->irq, bus);
719 	if (sdev->msi_enabled)
720 		pci_free_irq_vectors(pci);
721 
722 	hda_dsp_stream_free(sdev);
723 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
724 	snd_hdac_link_free_all(bus);
725 #endif
726 
727 	iounmap(sdev->bar[HDA_DSP_BAR]);
728 	iounmap(bus->remap_addr);
729 
730 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
731 	snd_hdac_ext_bus_exit(bus);
732 #endif
733 	hda_codec_i915_exit(sdev);
734 
735 	return 0;
736 }
737 
738 MODULE_LICENSE("Dual BSD/GPL");
739