xref: /openbmc/linux/sound/soc/sof/intel/hda.c (revision 2208f39c)
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //	    Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 //	    Rander Wang <rander.wang@intel.com>
11 //          Keyon Jie <yang.jie@linux.intel.com>
12 //
13 
14 /*
15  * Hardware interface for generic Intel audio DSP HDA IP
16  */
17 
18 #include <sound/hdaudio_ext.h>
19 #include <sound/hda_register.h>
20 
21 #include <linux/acpi.h>
22 #include <linux/module.h>
23 #include <linux/soundwire/sdw.h>
24 #include <linux/soundwire/sdw_intel.h>
25 #include <sound/intel-nhlt.h>
26 #include <sound/sof.h>
27 #include <sound/sof/xtensa.h>
28 #include "../sof-audio.h"
29 #include "../ops.h"
30 #include "hda.h"
31 
32 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
33 #include <sound/soc-acpi-intel-match.h>
34 #endif
35 
36 /* platform specific devices */
37 #include "shim.h"
38 
39 #define EXCEPT_MAX_HDR_SIZE	0x400
40 #define HDA_EXT_ROM_STATUS_SIZE 8
41 
42 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
43 
44 /*
45  * The default for SoundWire clock stop quirks is to power gate the IP
46  * and do a Bus Reset, this will need to be modified when the DSP
47  * needs to remain in D0i3 so that the Master does not lose context
48  * and enumeration is not required on clock restart
49  */
50 static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET;
51 module_param(sdw_clock_stop_quirks, int, 0444);
52 MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks");
53 
54 static int sdw_params_stream(struct device *dev,
55 			     struct sdw_intel_stream_params_data *params_data)
56 {
57 	struct snd_sof_dev *sdev = dev_get_drvdata(dev);
58 	struct snd_soc_dai *d = params_data->dai;
59 	struct sof_ipc_dai_config config;
60 	struct sof_ipc_reply reply;
61 	int link_id = params_data->link_id;
62 	int alh_stream_id = params_data->alh_stream_id;
63 	int ret;
64 	u32 size = sizeof(config);
65 
66 	memset(&config, 0, size);
67 	config.hdr.size = size;
68 	config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
69 	config.type = SOF_DAI_INTEL_ALH;
70 	config.dai_index = (link_id << 8) | (d->id);
71 	config.alh.stream_id = alh_stream_id;
72 
73 	/* send message to DSP */
74 	ret = sof_ipc_tx_message(sdev->ipc,
75 				 config.hdr.cmd, &config, size, &reply,
76 				 sizeof(reply));
77 	if (ret < 0) {
78 		dev_err(sdev->dev,
79 			"error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n",
80 			link_id, d->id, alh_stream_id);
81 	}
82 
83 	return ret;
84 }
85 
86 static int sdw_free_stream(struct device *dev,
87 			   struct sdw_intel_stream_free_data *free_data)
88 {
89 	struct snd_sof_dev *sdev = dev_get_drvdata(dev);
90 	struct snd_soc_dai *d = free_data->dai;
91 	struct sof_ipc_dai_config config;
92 	struct sof_ipc_reply reply;
93 	int link_id = free_data->link_id;
94 	int ret;
95 	u32 size = sizeof(config);
96 
97 	memset(&config, 0, size);
98 	config.hdr.size = size;
99 	config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
100 	config.type = SOF_DAI_INTEL_ALH;
101 	config.dai_index = (link_id << 8) | d->id;
102 	config.alh.stream_id = 0xFFFF; /* invalid value on purpose */
103 
104 	/* send message to DSP */
105 	ret = sof_ipc_tx_message(sdev->ipc,
106 				 config.hdr.cmd, &config, size, &reply,
107 				 sizeof(reply));
108 	if (ret < 0) {
109 		dev_err(sdev->dev,
110 			"error: failed to free stream for link %d dai->id %d\n",
111 			link_id, d->id);
112 	}
113 
114 	return ret;
115 }
116 
117 static const struct sdw_intel_ops sdw_callback = {
118 	.params_stream = sdw_params_stream,
119 	.free_stream = sdw_free_stream,
120 };
121 
122 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
123 {
124 	sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable);
125 }
126 
127 static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
128 {
129 	struct sof_intel_hda_dev *hdev;
130 	acpi_handle handle;
131 	int ret;
132 
133 	handle = ACPI_HANDLE(sdev->dev);
134 
135 	/* save ACPI info for the probe step */
136 	hdev = sdev->pdata->hw_pdata;
137 
138 	ret = sdw_intel_acpi_scan(handle, &hdev->info);
139 	if (ret < 0)
140 		return -EINVAL;
141 
142 	return 0;
143 }
144 
145 static int hda_sdw_probe(struct snd_sof_dev *sdev)
146 {
147 	struct sof_intel_hda_dev *hdev;
148 	struct sdw_intel_res res;
149 	void *sdw;
150 
151 	hdev = sdev->pdata->hw_pdata;
152 
153 	memset(&res, 0, sizeof(res));
154 
155 	res.mmio_base = sdev->bar[HDA_DSP_BAR];
156 	res.irq = sdev->ipc_irq;
157 	res.handle = hdev->info.handle;
158 	res.parent = sdev->dev;
159 	res.ops = &sdw_callback;
160 	res.dev = sdev->dev;
161 	res.clock_stop_quirks = sdw_clock_stop_quirks;
162 
163 	/*
164 	 * ops and arg fields are not populated for now,
165 	 * they will be needed when the DAI callbacks are
166 	 * provided
167 	 */
168 
169 	/* we could filter links here if needed, e.g for quirks */
170 	res.count = hdev->info.count;
171 	res.link_mask = hdev->info.link_mask;
172 
173 	sdw = sdw_intel_probe(&res);
174 	if (!sdw) {
175 		dev_err(sdev->dev, "error: SoundWire probe failed\n");
176 		return -EINVAL;
177 	}
178 
179 	/* save context */
180 	hdev->sdw = sdw;
181 
182 	return 0;
183 }
184 
185 int hda_sdw_startup(struct snd_sof_dev *sdev)
186 {
187 	struct sof_intel_hda_dev *hdev;
188 
189 	hdev = sdev->pdata->hw_pdata;
190 
191 	if (!hdev->sdw)
192 		return 0;
193 
194 	return sdw_intel_startup(hdev->sdw);
195 }
196 
197 static int hda_sdw_exit(struct snd_sof_dev *sdev)
198 {
199 	struct sof_intel_hda_dev *hdev;
200 
201 	hdev = sdev->pdata->hw_pdata;
202 
203 	hda_sdw_int_enable(sdev, false);
204 
205 	if (hdev->sdw)
206 		sdw_intel_exit(hdev->sdw);
207 	hdev->sdw = NULL;
208 
209 	return 0;
210 }
211 
212 static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
213 {
214 	struct sof_intel_hda_dev *hdev;
215 	bool ret = false;
216 	u32 irq_status;
217 
218 	hdev = sdev->pdata->hw_pdata;
219 
220 	if (!hdev->sdw)
221 		return ret;
222 
223 	/* store status */
224 	irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2);
225 
226 	/* invalid message ? */
227 	if (irq_status == 0xffffffff)
228 		goto out;
229 
230 	/* SDW message ? */
231 	if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW)
232 		ret = true;
233 
234 out:
235 	return ret;
236 }
237 
238 static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
239 {
240 	return sdw_intel_thread(irq, context);
241 }
242 
243 static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
244 {
245 	struct sof_intel_hda_dev *hdev;
246 
247 	hdev = sdev->pdata->hw_pdata;
248 	if (hdev->sdw &&
249 	    snd_sof_dsp_read(sdev, HDA_DSP_BAR,
250 			     HDA_DSP_REG_SNDW_WAKE_STS))
251 		return true;
252 
253 	return false;
254 }
255 
256 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
257 {
258 	struct sof_intel_hda_dev *hdev;
259 
260 	hdev = sdev->pdata->hw_pdata;
261 	if (!hdev->sdw)
262 		return;
263 
264 	sdw_intel_process_wakeen_event(hdev->sdw);
265 }
266 
267 #endif
268 
269 /*
270  * Debug
271  */
272 
273 struct hda_dsp_msg_code {
274 	u32 code;
275 	const char *msg;
276 };
277 
278 static bool hda_use_msi = IS_ENABLED(CONFIG_PCI);
279 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
280 module_param_named(use_msi, hda_use_msi, bool, 0444);
281 MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
282 #endif
283 
284 static char *hda_model;
285 module_param(hda_model, charp, 0444);
286 MODULE_PARM_DESC(hda_model, "Use the given HDA board model.");
287 
288 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
289 static int hda_dmic_num = -1;
290 module_param_named(dmic_num, hda_dmic_num, int, 0444);
291 MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
292 
293 static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
294 module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
295 MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
296 #endif
297 
298 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
299 	{HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
300 	{HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
301 	{HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
302 	{HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
303 	{HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
304 	{HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
305 	{HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
306 	{HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
307 	{HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
308 	{HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
309 	{HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
310 	{HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
311 	{HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
312 	{HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
313 	{HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
314 	{HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
315 	{HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
316 	{HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
317 	{HDA_DSP_ROM_NULL_FW_ENTRY,	"error: null FW entry point"},
318 };
319 
320 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
321 {
322 	u32 status;
323 	int i;
324 
325 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
326 				  HDA_ADSP_FW_STATUS_SKL);
327 
328 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
329 		if (status == hda_dsp_rom_msg[i].code) {
330 			dev_err(sdev->dev, "%s - code %8.8x\n",
331 				hda_dsp_rom_msg[i].msg, status);
332 			return;
333 		}
334 	}
335 
336 	/* not for us, must be generic sof message */
337 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
338 }
339 
340 static void hda_dsp_get_status(struct snd_sof_dev *sdev)
341 {
342 	u32 status;
343 	int i;
344 
345 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
346 				  HDA_DSP_SRAM_REG_ROM_STATUS);
347 
348 	for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
349 		if (status == hda_dsp_rom_msg[i].code) {
350 			dev_err(sdev->dev, "%s - code %8.8x\n",
351 				hda_dsp_rom_msg[i].msg, status);
352 			return;
353 		}
354 	}
355 
356 	/* not for us, must be generic sof message */
357 	dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
358 }
359 
360 static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
361 				  struct sof_ipc_dsp_oops_xtensa *xoops,
362 				  struct sof_ipc_panic_info *panic_info,
363 				  u32 *stack, size_t stack_words)
364 {
365 	u32 offset = sdev->dsp_oops_offset;
366 
367 	/* first read registers */
368 	sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
369 
370 	/* note: variable AR register array is not read */
371 
372 	/* then get panic info */
373 	if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
374 		dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
375 			xoops->arch_hdr.totalsize);
376 		return;
377 	}
378 	offset += xoops->arch_hdr.totalsize;
379 	sof_block_read(sdev, sdev->mmio_bar, offset,
380 		       panic_info, sizeof(*panic_info));
381 
382 	/* then get the stack */
383 	offset += sizeof(*panic_info);
384 	sof_block_read(sdev, sdev->mmio_bar, offset, stack,
385 		       stack_words * sizeof(u32));
386 }
387 
388 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
389 {
390 	struct sof_ipc_dsp_oops_xtensa xoops;
391 	struct sof_ipc_panic_info panic_info;
392 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
393 	u32 status, panic;
394 
395 	/* try APL specific status message types first */
396 	hda_dsp_get_status_skl(sdev);
397 
398 	/* now try generic SOF status messages */
399 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
400 				  HDA_ADSP_ERROR_CODE_SKL);
401 
402 	/*TODO: Check: there is no define in spec, but it is used in the code*/
403 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
404 				 HDA_ADSP_ERROR_CODE_SKL + 0x4);
405 
406 	if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
407 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
408 				      HDA_DSP_STACK_DUMP_SIZE);
409 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
410 				   stack, HDA_DSP_STACK_DUMP_SIZE);
411 	} else {
412 		dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
413 			status, panic);
414 		hda_dsp_get_status_skl(sdev);
415 	}
416 }
417 
418 /* dump the first 8 dwords representing the extended ROM status */
419 static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev)
420 {
421 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
422 	char msg[128];
423 	int len = 0;
424 	u32 value;
425 	int i;
426 
427 	for (i = 0; i < HDA_EXT_ROM_STATUS_SIZE; i++) {
428 		value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_ROM_STATUS + i * 0x4);
429 		len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value);
430 	}
431 
432 	sof_dev_dbg_or_err(sdev->dev, hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS,
433 			   "extended rom status: %s", msg);
434 
435 }
436 
437 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
438 {
439 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
440 	struct sof_ipc_dsp_oops_xtensa xoops;
441 	struct sof_ipc_panic_info panic_info;
442 	u32 stack[HDA_DSP_STACK_DUMP_SIZE];
443 	u32 status, panic;
444 
445 	/* try APL specific status message types first */
446 	hda_dsp_get_status(sdev);
447 
448 	/* now try generic SOF status messages */
449 	status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
450 				  HDA_DSP_SRAM_REG_FW_STATUS);
451 	panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
452 
453 	if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
454 		hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
455 				      HDA_DSP_STACK_DUMP_SIZE);
456 		snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
457 				   stack, HDA_DSP_STACK_DUMP_SIZE);
458 	} else {
459 		sof_dev_dbg_or_err(sdev->dev, hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS,
460 				   "status = 0x%8.8x panic = 0x%8.8x\n",
461 				   status, panic);
462 
463 		hda_dsp_dump_ext_rom_status(sdev);
464 		hda_dsp_get_status(sdev);
465 	}
466 }
467 
468 void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
469 {
470 	struct hdac_bus *bus = sof_to_bus(sdev);
471 	u32 adspis;
472 	u32 intsts;
473 	u32 intctl;
474 	u32 ppsts;
475 	u8 rirbsts;
476 
477 	/* read key IRQ stats and config registers */
478 	adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
479 	intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
480 	intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
481 	ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
482 	rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
483 
484 	dev_err(sdev->dev,
485 		"error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
486 		intsts, intctl, rirbsts);
487 	dev_err(sdev->dev,
488 		"error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
489 		ppsts, adspis);
490 }
491 
492 void hda_ipc_dump(struct snd_sof_dev *sdev)
493 {
494 	u32 hipcie;
495 	u32 hipct;
496 	u32 hipcctl;
497 
498 	hda_ipc_irq_dump(sdev);
499 
500 	/* read IPC status */
501 	hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
502 	hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
503 	hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
504 
505 	/* dump the IPC regs */
506 	/* TODO: parse the raw msg */
507 	dev_err(sdev->dev,
508 		"error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
509 		hipcie, hipct, hipcctl);
510 }
511 
512 static int hda_init(struct snd_sof_dev *sdev)
513 {
514 	struct hda_bus *hbus;
515 	struct hdac_bus *bus;
516 	struct pci_dev *pci = to_pci_dev(sdev->dev);
517 	int ret;
518 
519 	hbus = sof_to_hbus(sdev);
520 	bus = sof_to_bus(sdev);
521 
522 	/* HDA bus init */
523 	sof_hda_bus_init(bus, &pci->dev);
524 
525 	bus->use_posbuf = 1;
526 	bus->bdl_pos_adj = 0;
527 	bus->sync_write = 1;
528 
529 	mutex_init(&hbus->prepare_mutex);
530 	hbus->pci = pci;
531 	hbus->mixer_assigned = -1;
532 	hbus->modelname = hda_model;
533 
534 	/* initialise hdac bus */
535 	bus->addr = pci_resource_start(pci, 0);
536 #if IS_ENABLED(CONFIG_PCI)
537 	bus->remap_addr = pci_ioremap_bar(pci, 0);
538 #endif
539 	if (!bus->remap_addr) {
540 		dev_err(bus->dev, "error: ioremap error\n");
541 		return -ENXIO;
542 	}
543 
544 	/* HDA base */
545 	sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
546 
547 	/* init i915 and HDMI codecs */
548 	ret = hda_codec_i915_init(sdev);
549 	if (ret < 0)
550 		dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n");
551 
552 	/* get controller capabilities */
553 	ret = hda_dsp_ctrl_get_caps(sdev);
554 	if (ret < 0)
555 		dev_err(sdev->dev, "error: get caps error\n");
556 
557 	return ret;
558 }
559 
560 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
561 
562 static int check_nhlt_dmic(struct snd_sof_dev *sdev)
563 {
564 	struct nhlt_acpi_table *nhlt;
565 	int dmic_num;
566 
567 	nhlt = intel_nhlt_init(sdev->dev);
568 	if (nhlt) {
569 		dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
570 		intel_nhlt_free(nhlt);
571 		if (dmic_num >= 1 && dmic_num <= 4)
572 			return dmic_num;
573 	}
574 
575 	return 0;
576 }
577 
578 static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
579 				   const char *sof_tplg_filename,
580 				   const char *idisp_str,
581 				   const char *dmic_str)
582 {
583 	const char *tplg_filename = NULL;
584 	char *filename;
585 	char *split_ext;
586 
587 	filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
588 	if (!filename)
589 		return NULL;
590 
591 	/* this assumes a .tplg extension */
592 	split_ext = strsep(&filename, ".");
593 	if (split_ext) {
594 		tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
595 					       "%s%s%s.tplg",
596 					       split_ext, idisp_str, dmic_str);
597 		if (!tplg_filename)
598 			return NULL;
599 	}
600 	return tplg_filename;
601 }
602 
603 #endif
604 
605 static int hda_init_caps(struct snd_sof_dev *sdev)
606 {
607 	struct hdac_bus *bus = sof_to_bus(sdev);
608 	struct snd_sof_pdata *pdata = sdev->pdata;
609 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
610 	struct hdac_ext_link *hlink;
611 #endif
612 	struct sof_intel_hda_dev *hdev = pdata->hw_pdata;
613 	u32 link_mask;
614 	int ret = 0;
615 
616 	device_disable_async_suspend(bus->dev);
617 
618 	/* check if dsp is there */
619 	if (bus->ppcap)
620 		dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
621 
622 	/* Init HDA controller after i915 init */
623 	ret = hda_dsp_ctrl_init_chip(sdev, true);
624 	if (ret < 0) {
625 		dev_err(bus->dev, "error: init chip failed with ret: %d\n",
626 			ret);
627 		return ret;
628 	}
629 
630 	/* scan SoundWire capabilities exposed by DSDT */
631 	ret = hda_sdw_acpi_scan(sdev);
632 	if (ret < 0) {
633 		dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n");
634 		goto skip_soundwire;
635 	}
636 
637 	link_mask = hdev->info.link_mask;
638 	if (!link_mask) {
639 		dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n");
640 		goto skip_soundwire;
641 	}
642 
643 	/*
644 	 * probe/allocate SoundWire resources.
645 	 * The hardware configuration takes place in hda_sdw_startup
646 	 * after power rails are enabled.
647 	 * It's entirely possible to have a mix of I2S/DMIC/SoundWire
648 	 * devices, so we allocate the resources in all cases.
649 	 */
650 	ret = hda_sdw_probe(sdev);
651 	if (ret < 0) {
652 		dev_err(sdev->dev, "error: SoundWire probe error\n");
653 		return ret;
654 	}
655 
656 skip_soundwire:
657 
658 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
659 	if (bus->mlcap)
660 		snd_hdac_ext_bus_get_ml_capabilities(bus);
661 
662 	/* create codec instances */
663 	hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
664 
665 	if (!HDA_IDISP_CODEC(bus->codec_mask))
666 		hda_codec_i915_display_power(sdev, false);
667 
668 	/*
669 	 * we are done probing so decrement link counts
670 	 */
671 	list_for_each_entry(hlink, &bus->hlink_list, list)
672 		snd_hdac_ext_bus_link_put(bus, hlink);
673 #endif
674 	return 0;
675 }
676 
677 static const struct sof_intel_dsp_desc
678 	*get_chip_info(struct snd_sof_pdata *pdata)
679 {
680 	const struct sof_dev_desc *desc = pdata->desc;
681 	const struct sof_intel_dsp_desc *chip_info;
682 
683 	chip_info = desc->chip_info;
684 
685 	return chip_info;
686 }
687 
688 static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context)
689 {
690 	struct snd_sof_dev *sdev = context;
691 
692 	/*
693 	 * Get global interrupt status. It includes all hardware interrupt
694 	 * sources in the Intel HD Audio controller.
695 	 */
696 	if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) &
697 	    SOF_HDA_INTSTS_GIS) {
698 
699 		/* disable GIE interrupt */
700 		snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
701 					SOF_HDA_INTCTL,
702 					SOF_HDA_INT_GLOBAL_EN,
703 					0);
704 
705 		return IRQ_WAKE_THREAD;
706 	}
707 
708 	return IRQ_NONE;
709 }
710 
711 static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
712 {
713 	struct snd_sof_dev *sdev = context;
714 	struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
715 
716 	/* deal with streams and controller first */
717 	if (hda_dsp_check_stream_irq(sdev))
718 		hda_dsp_stream_threaded_handler(irq, sdev);
719 
720 	if (hda_dsp_check_ipc_irq(sdev))
721 		sof_ops(sdev)->irq_thread(irq, sdev);
722 
723 	if (hda_dsp_check_sdw_irq(sdev))
724 		hda_dsp_sdw_thread(irq, hdev->sdw);
725 
726 	if (hda_sdw_check_wakeen_irq(sdev))
727 		hda_sdw_process_wakeen(sdev);
728 
729 	/* enable GIE interrupt */
730 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
731 				SOF_HDA_INTCTL,
732 				SOF_HDA_INT_GLOBAL_EN,
733 				SOF_HDA_INT_GLOBAL_EN);
734 
735 	return IRQ_HANDLED;
736 }
737 
738 int hda_dsp_probe(struct snd_sof_dev *sdev)
739 {
740 	struct pci_dev *pci = to_pci_dev(sdev->dev);
741 	struct sof_intel_hda_dev *hdev;
742 	struct hdac_bus *bus;
743 	const struct sof_intel_dsp_desc *chip;
744 	int ret = 0;
745 
746 	/*
747 	 * detect DSP by checking class/subclass/prog-id information
748 	 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
749 	 * class=04 subclass 01 prog-if 00: DSP is present
750 	 *   (and may be required e.g. for DMIC or SSP support)
751 	 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
752 	 */
753 	if (pci->class == 0x040300) {
754 		dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
755 		return -ENODEV;
756 	} else if (pci->class != 0x040100 && pci->class != 0x040380) {
757 		dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
758 		return -ENODEV;
759 	}
760 	dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
761 
762 	chip = get_chip_info(sdev->pdata);
763 	if (!chip) {
764 		dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
765 			pci->device);
766 		ret = -EIO;
767 		goto err;
768 	}
769 
770 	hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
771 	if (!hdev)
772 		return -ENOMEM;
773 	sdev->pdata->hw_pdata = hdev;
774 	hdev->desc = chip;
775 
776 	hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
777 						       PLATFORM_DEVID_NONE,
778 						       NULL, 0);
779 	if (IS_ERR(hdev->dmic_dev)) {
780 		dev_err(sdev->dev, "error: failed to create DMIC device\n");
781 		return PTR_ERR(hdev->dmic_dev);
782 	}
783 
784 	/*
785 	 * use position update IPC if either it is forced
786 	 * or we don't have other choice
787 	 */
788 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
789 	hdev->no_ipc_position = 0;
790 #else
791 	hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
792 #endif
793 
794 	/* set up HDA base */
795 	bus = sof_to_bus(sdev);
796 	ret = hda_init(sdev);
797 	if (ret < 0)
798 		goto hdac_bus_unmap;
799 
800 	/* DSP base */
801 #if IS_ENABLED(CONFIG_PCI)
802 	sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
803 #endif
804 	if (!sdev->bar[HDA_DSP_BAR]) {
805 		dev_err(sdev->dev, "error: ioremap error\n");
806 		ret = -ENXIO;
807 		goto hdac_bus_unmap;
808 	}
809 
810 	sdev->mmio_bar = HDA_DSP_BAR;
811 	sdev->mailbox_bar = HDA_DSP_BAR;
812 
813 	/* allow 64bit DMA address if supported by H/W */
814 	if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
815 		dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
816 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
817 	} else {
818 		dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
819 		dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
820 		dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
821 	}
822 
823 	/* init streams */
824 	ret = hda_dsp_stream_init(sdev);
825 	if (ret < 0) {
826 		dev_err(sdev->dev, "error: failed to init streams\n");
827 		/*
828 		 * not all errors are due to memory issues, but trying
829 		 * to free everything does not harm
830 		 */
831 		goto free_streams;
832 	}
833 
834 	/*
835 	 * register our IRQ
836 	 * let's try to enable msi firstly
837 	 * if it fails, use legacy interrupt mode
838 	 * TODO: support msi multiple vectors
839 	 */
840 	if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
841 		dev_info(sdev->dev, "use msi interrupt mode\n");
842 		sdev->ipc_irq = pci_irq_vector(pci, 0);
843 		/* initialised to "false" by kzalloc() */
844 		sdev->msi_enabled = true;
845 	}
846 
847 	if (!sdev->msi_enabled) {
848 		dev_info(sdev->dev, "use legacy interrupt mode\n");
849 		/*
850 		 * in IO-APIC mode, hda->irq and ipc_irq are using the same
851 		 * irq number of pci->irq
852 		 */
853 		sdev->ipc_irq = pci->irq;
854 	}
855 
856 	dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
857 	ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler,
858 				   hda_dsp_interrupt_thread,
859 				   IRQF_SHARED, "AudioDSP", sdev);
860 	if (ret < 0) {
861 		dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
862 			sdev->ipc_irq);
863 		goto free_irq_vector;
864 	}
865 
866 	pci_set_master(pci);
867 	synchronize_irq(pci->irq);
868 
869 	/*
870 	 * clear TCSEL to clear playback on some HD Audio
871 	 * codecs. PCI TCSEL is defined in the Intel manuals.
872 	 */
873 	snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
874 
875 	/* init HDA capabilities */
876 	ret = hda_init_caps(sdev);
877 	if (ret < 0)
878 		goto free_ipc_irq;
879 
880 	/* enable ppcap interrupt */
881 	hda_dsp_ctrl_ppcap_enable(sdev, true);
882 	hda_dsp_ctrl_ppcap_int_enable(sdev, true);
883 
884 	/* set default mailbox offset for FW ready message */
885 	sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
886 
887 	INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
888 
889 	return 0;
890 
891 free_ipc_irq:
892 	free_irq(sdev->ipc_irq, sdev);
893 free_irq_vector:
894 	if (sdev->msi_enabled)
895 		pci_free_irq_vectors(pci);
896 free_streams:
897 	hda_dsp_stream_free(sdev);
898 /* dsp_unmap: not currently used */
899 	iounmap(sdev->bar[HDA_DSP_BAR]);
900 hdac_bus_unmap:
901 	iounmap(bus->remap_addr);
902 	hda_codec_i915_exit(sdev);
903 err:
904 	return ret;
905 }
906 
907 int hda_dsp_remove(struct snd_sof_dev *sdev)
908 {
909 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
910 	struct hdac_bus *bus = sof_to_bus(sdev);
911 	struct pci_dev *pci = to_pci_dev(sdev->dev);
912 	const struct sof_intel_dsp_desc *chip = hda->desc;
913 
914 	/* cancel any attempt for DSP D0I3 */
915 	cancel_delayed_work_sync(&hda->d0i3_work);
916 
917 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
918 	/* codec removal, invoke bus_device_remove */
919 	snd_hdac_ext_bus_device_remove(bus);
920 #endif
921 
922 	hda_sdw_exit(sdev);
923 
924 	if (!IS_ERR_OR_NULL(hda->dmic_dev))
925 		platform_device_unregister(hda->dmic_dev);
926 
927 	/* disable DSP IRQ */
928 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
929 				SOF_HDA_PPCTL_PIE, 0);
930 
931 	/* disable CIE and GIE interrupts */
932 	snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
933 				SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
934 
935 	/* disable cores */
936 	if (chip)
937 		hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
938 
939 	/* disable DSP */
940 	snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
941 				SOF_HDA_PPCTL_GPROCEN, 0);
942 
943 	free_irq(sdev->ipc_irq, sdev);
944 	if (sdev->msi_enabled)
945 		pci_free_irq_vectors(pci);
946 
947 	hda_dsp_stream_free(sdev);
948 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
949 	snd_hdac_link_free_all(bus);
950 #endif
951 
952 	iounmap(sdev->bar[HDA_DSP_BAR]);
953 	iounmap(bus->remap_addr);
954 
955 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
956 	snd_hdac_ext_bus_exit(bus);
957 #endif
958 	hda_codec_i915_exit(sdev);
959 
960 	return 0;
961 }
962 
963 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
964 static int hda_generic_machine_select(struct snd_sof_dev *sdev)
965 {
966 	struct hdac_bus *bus = sof_to_bus(sdev);
967 	struct snd_soc_acpi_mach_params *mach_params;
968 	struct snd_soc_acpi_mach *hda_mach;
969 	struct snd_sof_pdata *pdata = sdev->pdata;
970 	const char *tplg_filename;
971 	const char *idisp_str;
972 	const char *dmic_str;
973 	int dmic_num = 0;
974 	int codec_num = 0;
975 	int i;
976 
977 	/* codec detection */
978 	if (!bus->codec_mask) {
979 		dev_info(bus->dev, "no hda codecs found!\n");
980 	} else {
981 		dev_info(bus->dev, "hda codecs found, mask %lx\n",
982 			 bus->codec_mask);
983 
984 		for (i = 0; i < HDA_MAX_CODECS; i++) {
985 			if (bus->codec_mask & (1 << i))
986 				codec_num++;
987 		}
988 
989 		/*
990 		 * If no machine driver is found, then:
991 		 *
992 		 * generic hda machine driver can handle:
993 		 *  - one HDMI codec, and/or
994 		 *  - one external HDAudio codec
995 		 */
996 		if (!pdata->machine && codec_num <= 2) {
997 			hda_mach = snd_soc_acpi_intel_hda_machines;
998 
999 			/* topology: use the info from hda_machines */
1000 			pdata->tplg_filename =
1001 				hda_mach->sof_tplg_filename;
1002 
1003 			dev_info(bus->dev, "using HDA machine driver %s now\n",
1004 				 hda_mach->drv_name);
1005 
1006 			if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask))
1007 				idisp_str = "-idisp";
1008 			else
1009 				idisp_str = "";
1010 
1011 			/* first check NHLT for DMICs */
1012 			dmic_num = check_nhlt_dmic(sdev);
1013 
1014 			/* allow for module parameter override */
1015 			if (hda_dmic_num != -1)
1016 				dmic_num = hda_dmic_num;
1017 
1018 			switch (dmic_num) {
1019 			case 1:
1020 				dmic_str = "-1ch";
1021 				break;
1022 			case 2:
1023 				dmic_str = "-2ch";
1024 				break;
1025 			case 3:
1026 				dmic_str = "-3ch";
1027 				break;
1028 			case 4:
1029 				dmic_str = "-4ch";
1030 				break;
1031 			default:
1032 				dmic_num = 0;
1033 				dmic_str = "";
1034 				break;
1035 			}
1036 
1037 			tplg_filename = pdata->tplg_filename;
1038 			tplg_filename = fixup_tplg_name(sdev, tplg_filename,
1039 							idisp_str, dmic_str);
1040 			if (!tplg_filename)
1041 				return -EINVAL;
1042 
1043 			dev_info(bus->dev,
1044 				 "DMICs detected in NHLT tables: %d\n",
1045 				 dmic_num);
1046 
1047 			pdata->machine = hda_mach;
1048 			pdata->tplg_filename = tplg_filename;
1049 		}
1050 	}
1051 
1052 	/* used by hda machine driver to create dai links */
1053 	if (pdata->machine) {
1054 		mach_params = (struct snd_soc_acpi_mach_params *)
1055 			&pdata->machine->mach_params;
1056 		mach_params->codec_mask = bus->codec_mask;
1057 		mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
1058 		mach_params->dmic_num = dmic_num;
1059 	}
1060 
1061 	return 0;
1062 }
1063 #else
1064 static int hda_generic_machine_select(struct snd_sof_dev *sdev)
1065 {
1066 	return 0;
1067 }
1068 #endif
1069 
1070 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
1071 /* Check if all Slaves defined on the link can be found */
1072 static bool link_slaves_found(struct snd_sof_dev *sdev,
1073 			      const struct snd_soc_acpi_link_adr *link,
1074 			      struct sdw_intel_ctx *sdw)
1075 {
1076 	struct hdac_bus *bus = sof_to_bus(sdev);
1077 	struct sdw_intel_slave_id *ids = sdw->ids;
1078 	int num_slaves = sdw->num_slaves;
1079 	unsigned int part_id, link_id, unique_id, mfg_id;
1080 	int i, j;
1081 
1082 	for (i = 0; i < link->num_adr; i++) {
1083 		u64 adr = link->adr_d[i].adr;
1084 
1085 		mfg_id = SDW_MFG_ID(adr);
1086 		part_id = SDW_PART_ID(adr);
1087 		link_id = SDW_DISCO_LINK_ID(adr);
1088 		for (j = 0; j < num_slaves; j++) {
1089 			if (ids[j].link_id != link_id ||
1090 			    ids[j].id.part_id != part_id ||
1091 			    ids[j].id.mfg_id != mfg_id)
1092 				continue;
1093 			/*
1094 			 * we have to check unique id
1095 			 * if there is more than one
1096 			 * Slave on the link
1097 			 */
1098 			unique_id = SDW_UNIQUE_ID(adr);
1099 			if (link->num_adr == 1 ||
1100 			    ids[j].id.unique_id == SDW_IGNORED_UNIQUE_ID ||
1101 			    ids[j].id.unique_id == unique_id) {
1102 				dev_dbg(bus->dev,
1103 					"found %x at link %d\n",
1104 					part_id, link_id);
1105 				break;
1106 			}
1107 		}
1108 		if (j == num_slaves) {
1109 			dev_dbg(bus->dev,
1110 				"Slave %x not found\n",
1111 				part_id);
1112 			return false;
1113 		}
1114 	}
1115 	return true;
1116 }
1117 
1118 static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1119 {
1120 	struct snd_sof_pdata *pdata = sdev->pdata;
1121 	const struct snd_soc_acpi_link_adr *link;
1122 	struct hdac_bus *bus = sof_to_bus(sdev);
1123 	struct snd_soc_acpi_mach *mach;
1124 	struct sof_intel_hda_dev *hdev;
1125 	u32 link_mask;
1126 	int i;
1127 
1128 	hdev = pdata->hw_pdata;
1129 	link_mask = hdev->info.link_mask;
1130 
1131 	/*
1132 	 * Select SoundWire machine driver if needed using the
1133 	 * alternate tables. This case deals with SoundWire-only
1134 	 * machines, for mixed cases with I2C/I2S the detection relies
1135 	 * on the HID list.
1136 	 */
1137 	if (link_mask && !pdata->machine) {
1138 		for (mach = pdata->desc->alt_machines;
1139 		     mach && mach->link_mask; mach++) {
1140 			/*
1141 			 * On some platforms such as Up Extreme all links
1142 			 * are enabled but only one link can be used by
1143 			 * external codec. Instead of exact match of two masks,
1144 			 * first check whether link_mask of mach is subset of
1145 			 * link_mask supported by hw and then go on searching
1146 			 * link_adr
1147 			 */
1148 			if (~link_mask & mach->link_mask)
1149 				continue;
1150 
1151 			/* No need to match adr if there is no links defined */
1152 			if (!mach->links)
1153 				break;
1154 
1155 			link = mach->links;
1156 			for (i = 0; i < hdev->info.count && link->num_adr;
1157 			     i++, link++) {
1158 				/*
1159 				 * Try next machine if any expected Slaves
1160 				 * are not found on this link.
1161 				 */
1162 				if (!link_slaves_found(sdev, link, hdev->sdw))
1163 					break;
1164 			}
1165 			/* Found if all Slaves are checked */
1166 			if (i == hdev->info.count || !link->num_adr)
1167 				break;
1168 		}
1169 		if (mach && mach->link_mask) {
1170 			dev_dbg(bus->dev,
1171 				"SoundWire machine driver %s topology %s\n",
1172 				mach->drv_name,
1173 				mach->sof_tplg_filename);
1174 			pdata->machine = mach;
1175 			mach->mach_params.links = mach->links;
1176 			mach->mach_params.link_mask = mach->link_mask;
1177 			mach->mach_params.platform = dev_name(sdev->dev);
1178 			pdata->fw_filename = mach->sof_fw_filename;
1179 			pdata->tplg_filename = mach->sof_tplg_filename;
1180 		} else {
1181 			dev_info(sdev->dev,
1182 				 "No SoundWire machine driver found\n");
1183 		}
1184 	}
1185 
1186 	return 0;
1187 }
1188 #else
1189 static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
1190 {
1191 	return 0;
1192 }
1193 #endif
1194 
1195 void hda_set_mach_params(const struct snd_soc_acpi_mach *mach,
1196 			 struct device *dev)
1197 {
1198 	struct snd_soc_acpi_mach_params *mach_params;
1199 
1200 	mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params;
1201 	mach_params->platform = dev_name(dev);
1202 }
1203 
1204 void hda_machine_select(struct snd_sof_dev *sdev)
1205 {
1206 	struct snd_sof_pdata *sof_pdata = sdev->pdata;
1207 	const struct sof_dev_desc *desc = sof_pdata->desc;
1208 	struct snd_soc_acpi_mach *mach;
1209 
1210 	mach = snd_soc_acpi_find_machine(desc->machines);
1211 	if (mach) {
1212 		/*
1213 		 * If tplg file name is overridden, use it instead of
1214 		 * the one set in mach table
1215 		 */
1216 		if (!sof_pdata->tplg_filename)
1217 			sof_pdata->tplg_filename = mach->sof_tplg_filename;
1218 
1219 		sof_pdata->machine = mach;
1220 
1221 		if (mach->link_mask) {
1222 			mach->mach_params.links = mach->links;
1223 			mach->mach_params.link_mask = mach->link_mask;
1224 		}
1225 	}
1226 
1227 	/*
1228 	 * If I2S fails, try SoundWire
1229 	 */
1230 	hda_sdw_machine_select(sdev);
1231 
1232 	/*
1233 	 * Choose HDA generic machine driver if mach is NULL.
1234 	 * Otherwise, set certain mach params.
1235 	 */
1236 	hda_generic_machine_select(sdev);
1237 
1238 	if (!sof_pdata->machine)
1239 		dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");
1240 }
1241 
1242 MODULE_LICENSE("Dual BSD/GPL");
1243 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC);
1244 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
1245 MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
1246 MODULE_IMPORT_NS(SOUNDWIRE_INTEL_INIT);
1247