1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <sound/hda_register.h> 20 #include <sound/pcm_params.h> 21 #include "../sof-audio.h" 22 #include "../ops.h" 23 #include "hda.h" 24 25 #define SDnFMT_BASE(x) ((x) << 14) 26 #define SDnFMT_MULT(x) (((x) - 1) << 11) 27 #define SDnFMT_DIV(x) (((x) - 1) << 8) 28 #define SDnFMT_BITS(x) ((x) << 4) 29 #define SDnFMT_CHAN(x) ((x) << 0) 30 31 static bool hda_always_enable_dmi_l1; 32 module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444); 33 MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1"); 34 35 static bool hda_disable_rewinds = IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_DISABLE_REWINDS); 36 module_param_named(disable_rewinds, hda_disable_rewinds, bool, 0444); 37 MODULE_PARM_DESC(disable_rewinds, "SOF HDA disable rewinds"); 38 39 u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate) 40 { 41 switch (rate) { 42 case 8000: 43 return SDnFMT_DIV(6); 44 case 9600: 45 return SDnFMT_DIV(5); 46 case 11025: 47 return SDnFMT_BASE(1) | SDnFMT_DIV(4); 48 case 16000: 49 return SDnFMT_DIV(3); 50 case 22050: 51 return SDnFMT_BASE(1) | SDnFMT_DIV(2); 52 case 32000: 53 return SDnFMT_DIV(3) | SDnFMT_MULT(2); 54 case 44100: 55 return SDnFMT_BASE(1); 56 case 48000: 57 return 0; 58 case 88200: 59 return SDnFMT_BASE(1) | SDnFMT_MULT(2); 60 case 96000: 61 return SDnFMT_MULT(2); 62 case 176400: 63 return SDnFMT_BASE(1) | SDnFMT_MULT(4); 64 case 192000: 65 return SDnFMT_MULT(4); 66 default: 67 dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n", 68 rate); 69 return 0; /* use 48KHz if not found */ 70 } 71 }; 72 73 u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits) 74 { 75 switch (sample_bits) { 76 case 8: 77 return SDnFMT_BITS(0); 78 case 16: 79 return SDnFMT_BITS(1); 80 case 20: 81 return SDnFMT_BITS(2); 82 case 24: 83 return SDnFMT_BITS(3); 84 case 32: 85 return SDnFMT_BITS(4); 86 default: 87 dev_warn(sdev->dev, "can't find %d bits using 16bit\n", 88 sample_bits); 89 return SDnFMT_BITS(1); /* use 16bits format if not found */ 90 } 91 }; 92 93 int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev, 94 struct snd_pcm_substream *substream, 95 struct snd_pcm_hw_params *params, 96 struct snd_sof_platform_stream_params *platform_params) 97 { 98 struct hdac_stream *hstream = substream->runtime->private_data; 99 struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); 100 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 101 struct snd_dma_buffer *dmab; 102 int ret; 103 u32 size, rate, bits; 104 105 size = params_buffer_bytes(params); 106 rate = hda_dsp_get_mult_div(sdev, params_rate(params)); 107 bits = hda_dsp_get_bits(sdev, params_width(params)); 108 109 hstream->substream = substream; 110 111 dmab = substream->runtime->dma_buffer_p; 112 113 hstream->format_val = rate | bits | (params_channels(params) - 1); 114 hstream->bufsize = size; 115 hstream->period_bytes = params_period_bytes(params); 116 hstream->no_period_wakeup = 117 (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) && 118 (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP); 119 120 ret = hda_dsp_stream_hw_params(sdev, hext_stream, dmab, params); 121 if (ret < 0) { 122 dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); 123 return ret; 124 } 125 126 /* enable SPIB when rewinds are disabled */ 127 if (hda_disable_rewinds) 128 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_ENABLE, 0); 129 else 130 hda_dsp_stream_spib_config(sdev, hext_stream, HDA_DSP_SPIB_DISABLE, 0); 131 132 if (hda) 133 platform_params->no_ipc_position = hda->no_ipc_position; 134 135 platform_params->stream_tag = hstream->stream_tag; 136 137 return 0; 138 } 139 140 /* update SPIB register with appl position */ 141 int hda_dsp_pcm_ack(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) 142 { 143 struct hdac_stream *hstream = substream->runtime->private_data; 144 struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); 145 struct snd_pcm_runtime *runtime = substream->runtime; 146 ssize_t appl_pos, buf_size; 147 u32 spib; 148 149 appl_pos = frames_to_bytes(runtime, runtime->control->appl_ptr); 150 buf_size = frames_to_bytes(runtime, runtime->buffer_size); 151 152 spib = appl_pos % buf_size; 153 154 /* Allowable value for SPIB is 1 byte to max buffer size */ 155 if (!spib) 156 spib = buf_size; 157 158 sof_io_write(sdev, hext_stream->spib_addr, spib); 159 160 return 0; 161 } 162 163 int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev, 164 struct snd_pcm_substream *substream, int cmd) 165 { 166 struct hdac_stream *hstream = substream->runtime->private_data; 167 struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); 168 169 return hda_dsp_stream_trigger(sdev, hext_stream, cmd); 170 } 171 172 snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev, 173 struct snd_pcm_substream *substream) 174 { 175 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 176 struct snd_soc_component *scomp = sdev->component; 177 struct hdac_stream *hstream = substream->runtime->private_data; 178 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 179 struct snd_sof_pcm *spcm; 180 snd_pcm_uframes_t pos; 181 182 spcm = snd_sof_find_spcm_dai(scomp, rtd); 183 if (!spcm) { 184 dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n", 185 rtd->dai_link->id); 186 return 0; 187 } 188 189 if (hda && !hda->no_ipc_position) { 190 /* read position from IPC position */ 191 pos = spcm->stream[substream->stream].posn.host_posn; 192 goto found; 193 } 194 195 switch (sof_hda_position_quirk) { 196 case SOF_HDA_POSITION_QUIRK_USE_SKYLAKE_LEGACY: 197 /* 198 * This legacy code, inherited from the Skylake driver, 199 * mixes DPIB registers and DPIB DDR updates and 200 * does not seem to follow any known hardware recommendations. 201 * It's not clear e.g. why there is a different flow 202 * for capture and playback, the only information that matters is 203 * what traffic class is used, and on all SOF-enabled platforms 204 * only VC0 is supported so the work-around was likely not necessary 205 * and quite possibly wrong. 206 */ 207 208 /* DPIB/posbuf position mode: 209 * For Playback, Use DPIB register from HDA space which 210 * reflects the actual data transferred. 211 * For Capture, Use the position buffer for pointer, as DPIB 212 * is not accurate enough, its update may be completed 213 * earlier than the data written to DDR. 214 */ 215 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 216 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 217 AZX_REG_VS_SDXDPIB_XBASE + 218 (AZX_REG_VS_SDXDPIB_XINTERVAL * 219 hstream->index)); 220 } else { 221 /* 222 * For capture stream, we need more workaround to fix the 223 * position incorrect issue: 224 * 225 * 1. Wait at least 20us before reading position buffer after 226 * the interrupt generated(IOC), to make sure position update 227 * happens on frame boundary i.e. 20.833uSec for 48KHz. 228 * 2. Perform a dummy Read to DPIB register to flush DMA 229 * position value. 230 * 3. Read the DMA Position from posbuf. Now the readback 231 * value should be >= period boundary. 232 */ 233 usleep_range(20, 21); 234 snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 235 AZX_REG_VS_SDXDPIB_XBASE + 236 (AZX_REG_VS_SDXDPIB_XINTERVAL * 237 hstream->index)); 238 pos = snd_hdac_stream_get_pos_posbuf(hstream); 239 } 240 break; 241 case SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS: 242 /* 243 * In case VC1 traffic is disabled this is the recommended option 244 */ 245 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 246 AZX_REG_VS_SDXDPIB_XBASE + 247 (AZX_REG_VS_SDXDPIB_XINTERVAL * 248 hstream->index)); 249 break; 250 case SOF_HDA_POSITION_QUIRK_USE_DPIB_DDR_UPDATE: 251 /* 252 * This is the recommended option when VC1 is enabled. 253 * While this isn't needed for SOF platforms it's added for 254 * consistency and debug. 255 */ 256 pos = snd_hdac_stream_get_pos_posbuf(hstream); 257 break; 258 default: 259 dev_err_once(sdev->dev, "hda_position_quirk value %d not supported\n", 260 sof_hda_position_quirk); 261 pos = 0; 262 break; 263 } 264 265 if (pos >= hstream->bufsize) 266 pos = 0; 267 268 found: 269 pos = bytes_to_frames(substream->runtime, pos); 270 271 dev_vdbg(sdev->dev, "PCM: stream %d dir %d position %lu\n", 272 hstream->index, substream->stream, pos); 273 return pos; 274 } 275 276 int hda_dsp_pcm_open(struct snd_sof_dev *sdev, 277 struct snd_pcm_substream *substream) 278 { 279 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 280 struct snd_pcm_runtime *runtime = substream->runtime; 281 struct snd_soc_component *scomp = sdev->component; 282 struct hdac_ext_stream *dsp_stream; 283 struct snd_sof_pcm *spcm; 284 int direction = substream->stream; 285 u32 flags = 0; 286 287 spcm = snd_sof_find_spcm_dai(scomp, rtd); 288 if (!spcm) { 289 dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id); 290 return -EINVAL; 291 } 292 293 /* 294 * if we want the .ack to work, we need to prevent the control from being mapped. 295 * The status can still be mapped. 296 */ 297 if (hda_disable_rewinds) 298 runtime->hw.info |= SNDRV_PCM_INFO_NO_REWINDS | SNDRV_PCM_INFO_SYNC_APPLPTR; 299 300 /* 301 * All playback streams are DMI L1 capable, capture streams need 302 * pause push/release to be disabled 303 */ 304 if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE) 305 runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE; 306 307 if (hda_always_enable_dmi_l1 || 308 direction == SNDRV_PCM_STREAM_PLAYBACK || 309 spcm->stream[substream->stream].d0i3_compatible) 310 flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE; 311 312 dsp_stream = hda_dsp_stream_get(sdev, direction, flags); 313 if (!dsp_stream) { 314 dev_err(sdev->dev, "error: no stream available\n"); 315 return -ENODEV; 316 } 317 318 /* minimum as per HDA spec */ 319 snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); 320 321 /* avoid circular buffer wrap in middle of period */ 322 snd_pcm_hw_constraint_integer(substream->runtime, 323 SNDRV_PCM_HW_PARAM_PERIODS); 324 325 /* binding pcm substream to hda stream */ 326 substream->runtime->private_data = &dsp_stream->hstream; 327 return 0; 328 } 329 330 int hda_dsp_pcm_close(struct snd_sof_dev *sdev, 331 struct snd_pcm_substream *substream) 332 { 333 struct hdac_stream *hstream = substream->runtime->private_data; 334 int direction = substream->stream; 335 int ret; 336 337 ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag); 338 339 if (ret) { 340 dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name); 341 return -ENODEV; 342 } 343 344 /* unbinding pcm substream to hda stream */ 345 substream->runtime->private_data = NULL; 346 return 0; 347 } 348