1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <sound/hda_register.h> 20 #include <sound/pcm_params.h> 21 #include "../sof-audio.h" 22 #include "../ops.h" 23 #include "hda.h" 24 25 #define SDnFMT_BASE(x) ((x) << 14) 26 #define SDnFMT_MULT(x) (((x) - 1) << 11) 27 #define SDnFMT_DIV(x) (((x) - 1) << 8) 28 #define SDnFMT_BITS(x) ((x) << 4) 29 #define SDnFMT_CHAN(x) ((x) << 0) 30 31 static bool hda_always_enable_dmi_l1; 32 module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444); 33 MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1"); 34 35 u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate) 36 { 37 switch (rate) { 38 case 8000: 39 return SDnFMT_DIV(6); 40 case 9600: 41 return SDnFMT_DIV(5); 42 case 11025: 43 return SDnFMT_BASE(1) | SDnFMT_DIV(4); 44 case 16000: 45 return SDnFMT_DIV(3); 46 case 22050: 47 return SDnFMT_BASE(1) | SDnFMT_DIV(2); 48 case 32000: 49 return SDnFMT_DIV(3) | SDnFMT_MULT(2); 50 case 44100: 51 return SDnFMT_BASE(1); 52 case 48000: 53 return 0; 54 case 88200: 55 return SDnFMT_BASE(1) | SDnFMT_MULT(2); 56 case 96000: 57 return SDnFMT_MULT(2); 58 case 176400: 59 return SDnFMT_BASE(1) | SDnFMT_MULT(4); 60 case 192000: 61 return SDnFMT_MULT(4); 62 default: 63 dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n", 64 rate); 65 return 0; /* use 48KHz if not found */ 66 } 67 }; 68 69 u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits) 70 { 71 switch (sample_bits) { 72 case 8: 73 return SDnFMT_BITS(0); 74 case 16: 75 return SDnFMT_BITS(1); 76 case 20: 77 return SDnFMT_BITS(2); 78 case 24: 79 return SDnFMT_BITS(3); 80 case 32: 81 return SDnFMT_BITS(4); 82 default: 83 dev_warn(sdev->dev, "can't find %d bits using 16bit\n", 84 sample_bits); 85 return SDnFMT_BITS(1); /* use 16bits format if not found */ 86 } 87 }; 88 89 int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev, 90 struct snd_pcm_substream *substream, 91 struct snd_pcm_hw_params *params, 92 struct sof_ipc_stream_params *ipc_params) 93 { 94 struct hdac_stream *hstream = substream->runtime->private_data; 95 struct hdac_ext_stream *stream = stream_to_hdac_ext_stream(hstream); 96 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 97 struct snd_dma_buffer *dmab; 98 struct sof_ipc_fw_version *v = &sdev->fw_ready.version; 99 int ret; 100 u32 size, rate, bits; 101 102 size = params_buffer_bytes(params); 103 rate = hda_dsp_get_mult_div(sdev, params_rate(params)); 104 bits = hda_dsp_get_bits(sdev, params_width(params)); 105 106 hstream->substream = substream; 107 108 dmab = substream->runtime->dma_buffer_p; 109 110 hstream->format_val = rate | bits | (params_channels(params) - 1); 111 hstream->bufsize = size; 112 hstream->period_bytes = params_period_bytes(params); 113 hstream->no_period_wakeup = 114 (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) && 115 (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP); 116 117 ret = hda_dsp_stream_hw_params(sdev, stream, dmab, params); 118 if (ret < 0) { 119 dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); 120 return ret; 121 } 122 123 /* disable SPIB, to enable buffer wrap for stream */ 124 hda_dsp_stream_spib_config(sdev, stream, HDA_DSP_SPIB_DISABLE, 0); 125 126 /* update no_stream_position flag for ipc params */ 127 if (hda && hda->no_ipc_position) { 128 /* For older ABIs set host_period_bytes to zero to inform 129 * FW we don't want position updates. Newer versions use 130 * no_stream_position for this purpose. 131 */ 132 if (v->abi_version < SOF_ABI_VER(3, 10, 0)) 133 ipc_params->host_period_bytes = 0; 134 else 135 ipc_params->no_stream_position = 1; 136 } 137 138 ipc_params->stream_tag = hstream->stream_tag; 139 140 return 0; 141 } 142 143 int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev, 144 struct snd_pcm_substream *substream, int cmd) 145 { 146 struct hdac_stream *hstream = substream->runtime->private_data; 147 struct hdac_ext_stream *stream = stream_to_hdac_ext_stream(hstream); 148 149 return hda_dsp_stream_trigger(sdev, stream, cmd); 150 } 151 152 snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev, 153 struct snd_pcm_substream *substream) 154 { 155 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 156 struct snd_soc_component *scomp = sdev->component; 157 struct hdac_stream *hstream = substream->runtime->private_data; 158 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 159 struct snd_sof_pcm *spcm; 160 snd_pcm_uframes_t pos; 161 162 spcm = snd_sof_find_spcm_dai(scomp, rtd); 163 if (!spcm) { 164 dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n", 165 rtd->dai_link->id); 166 return 0; 167 } 168 169 if (hda && !hda->no_ipc_position) { 170 /* read position from IPC position */ 171 pos = spcm->stream[substream->stream].posn.host_posn; 172 goto found; 173 } 174 175 /* 176 * DPIB/posbuf position mode: 177 * For Playback, Use DPIB register from HDA space which 178 * reflects the actual data transferred. 179 * For Capture, Use the position buffer for pointer, as DPIB 180 * is not accurate enough, its update may be completed 181 * earlier than the data written to DDR. 182 */ 183 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 184 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 185 AZX_REG_VS_SDXDPIB_XBASE + 186 (AZX_REG_VS_SDXDPIB_XINTERVAL * 187 hstream->index)); 188 } else { 189 /* 190 * For capture stream, we need more workaround to fix the 191 * position incorrect issue: 192 * 193 * 1. Wait at least 20us before reading position buffer after 194 * the interrupt generated(IOC), to make sure position update 195 * happens on frame boundary i.e. 20.833uSec for 48KHz. 196 * 2. Perform a dummy Read to DPIB register to flush DMA 197 * position value. 198 * 3. Read the DMA Position from posbuf. Now the readback 199 * value should be >= period boundary. 200 */ 201 usleep_range(20, 21); 202 snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 203 AZX_REG_VS_SDXDPIB_XBASE + 204 (AZX_REG_VS_SDXDPIB_XINTERVAL * 205 hstream->index)); 206 pos = snd_hdac_stream_get_pos_posbuf(hstream); 207 } 208 209 if (pos >= hstream->bufsize) 210 pos = 0; 211 212 found: 213 pos = bytes_to_frames(substream->runtime, pos); 214 215 dev_vdbg(sdev->dev, "PCM: stream %d dir %d position %lu\n", 216 hstream->index, substream->stream, pos); 217 return pos; 218 } 219 220 int hda_dsp_pcm_open(struct snd_sof_dev *sdev, 221 struct snd_pcm_substream *substream) 222 { 223 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 224 struct snd_pcm_runtime *runtime = substream->runtime; 225 struct snd_soc_component *scomp = sdev->component; 226 struct hdac_ext_stream *dsp_stream; 227 struct snd_sof_pcm *spcm; 228 int direction = substream->stream; 229 u32 flags = 0; 230 231 spcm = snd_sof_find_spcm_dai(scomp, rtd); 232 if (!spcm) { 233 dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id); 234 return -EINVAL; 235 } 236 237 /* 238 * All playback streams are DMI L1 capable, capture streams need 239 * pause push/release to be disabled 240 */ 241 if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE) 242 runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE; 243 244 if (hda_always_enable_dmi_l1 || 245 spcm->stream[substream->stream].d0i3_compatible) 246 flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE; 247 248 dsp_stream = hda_dsp_stream_get(sdev, direction, flags); 249 if (!dsp_stream) { 250 dev_err(sdev->dev, "error: no stream available\n"); 251 return -ENODEV; 252 } 253 254 /* minimum as per HDA spec */ 255 snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); 256 257 /* avoid circular buffer wrap in middle of period */ 258 snd_pcm_hw_constraint_integer(substream->runtime, 259 SNDRV_PCM_HW_PARAM_PERIODS); 260 261 /* binding pcm substream to hda stream */ 262 substream->runtime->private_data = &dsp_stream->hstream; 263 return 0; 264 } 265 266 int hda_dsp_pcm_close(struct snd_sof_dev *sdev, 267 struct snd_pcm_substream *substream) 268 { 269 struct hdac_stream *hstream = substream->runtime->private_data; 270 int direction = substream->stream; 271 int ret; 272 273 ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag); 274 275 if (ret) { 276 dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name); 277 return -ENODEV; 278 } 279 280 /* unbinding pcm substream to hda stream */ 281 substream->runtime->private_data = NULL; 282 return 0; 283 } 284