1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2018 Intel Corporation. All rights reserved. 7 // 8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10 // Rander Wang <rander.wang@intel.com> 11 // Keyon Jie <yang.jie@linux.intel.com> 12 // 13 14 /* 15 * Hardware interface for generic Intel audio DSP HDA IP 16 */ 17 18 #include <linux/moduleparam.h> 19 #include <sound/hda_register.h> 20 #include <sound/pcm_params.h> 21 #include "../sof-audio.h" 22 #include "../ops.h" 23 #include "hda.h" 24 25 #define SDnFMT_BASE(x) ((x) << 14) 26 #define SDnFMT_MULT(x) (((x) - 1) << 11) 27 #define SDnFMT_DIV(x) (((x) - 1) << 8) 28 #define SDnFMT_BITS(x) ((x) << 4) 29 #define SDnFMT_CHAN(x) ((x) << 0) 30 31 static bool hda_always_enable_dmi_l1; 32 module_param_named(always_enable_dmi_l1, hda_always_enable_dmi_l1, bool, 0444); 33 MODULE_PARM_DESC(always_enable_dmi_l1, "SOF HDA always enable DMI l1"); 34 35 static bool hda_disable_rewinds = IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_DISABLE_REWINDS); 36 module_param_named(disable_rewinds, hda_disable_rewinds, bool, 0444); 37 MODULE_PARM_DESC(disable_rewinds, "SOF HDA disable rewinds"); 38 39 u32 hda_dsp_get_mult_div(struct snd_sof_dev *sdev, int rate) 40 { 41 switch (rate) { 42 case 8000: 43 return SDnFMT_DIV(6); 44 case 9600: 45 return SDnFMT_DIV(5); 46 case 11025: 47 return SDnFMT_BASE(1) | SDnFMT_DIV(4); 48 case 16000: 49 return SDnFMT_DIV(3); 50 case 22050: 51 return SDnFMT_BASE(1) | SDnFMT_DIV(2); 52 case 32000: 53 return SDnFMT_DIV(3) | SDnFMT_MULT(2); 54 case 44100: 55 return SDnFMT_BASE(1); 56 case 48000: 57 return 0; 58 case 88200: 59 return SDnFMT_BASE(1) | SDnFMT_MULT(2); 60 case 96000: 61 return SDnFMT_MULT(2); 62 case 176400: 63 return SDnFMT_BASE(1) | SDnFMT_MULT(4); 64 case 192000: 65 return SDnFMT_MULT(4); 66 default: 67 dev_warn(sdev->dev, "can't find div rate %d using 48kHz\n", 68 rate); 69 return 0; /* use 48KHz if not found */ 70 } 71 }; 72 73 u32 hda_dsp_get_bits(struct snd_sof_dev *sdev, int sample_bits) 74 { 75 switch (sample_bits) { 76 case 8: 77 return SDnFMT_BITS(0); 78 case 16: 79 return SDnFMT_BITS(1); 80 case 20: 81 return SDnFMT_BITS(2); 82 case 24: 83 return SDnFMT_BITS(3); 84 case 32: 85 return SDnFMT_BITS(4); 86 default: 87 dev_warn(sdev->dev, "can't find %d bits using 16bit\n", 88 sample_bits); 89 return SDnFMT_BITS(1); /* use 16bits format if not found */ 90 } 91 }; 92 93 int hda_dsp_pcm_hw_params(struct snd_sof_dev *sdev, 94 struct snd_pcm_substream *substream, 95 struct snd_pcm_hw_params *params, 96 struct sof_ipc_stream_params *ipc_params) 97 { 98 struct hdac_stream *hstream = substream->runtime->private_data; 99 struct hdac_ext_stream *stream = stream_to_hdac_ext_stream(hstream); 100 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 101 struct snd_dma_buffer *dmab; 102 struct sof_ipc_fw_version *v = &sdev->fw_ready.version; 103 int ret; 104 u32 size, rate, bits; 105 106 size = params_buffer_bytes(params); 107 rate = hda_dsp_get_mult_div(sdev, params_rate(params)); 108 bits = hda_dsp_get_bits(sdev, params_width(params)); 109 110 hstream->substream = substream; 111 112 dmab = substream->runtime->dma_buffer_p; 113 114 hstream->format_val = rate | bits | (params_channels(params) - 1); 115 hstream->bufsize = size; 116 hstream->period_bytes = params_period_bytes(params); 117 hstream->no_period_wakeup = 118 (params->info & SNDRV_PCM_INFO_NO_PERIOD_WAKEUP) && 119 (params->flags & SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP); 120 121 ret = hda_dsp_stream_hw_params(sdev, stream, dmab, params); 122 if (ret < 0) { 123 dev_err(sdev->dev, "error: hdac prepare failed: %d\n", ret); 124 return ret; 125 } 126 127 /* enable SPIB when rewinds are disabled */ 128 if (hda_disable_rewinds) 129 hda_dsp_stream_spib_config(sdev, stream, HDA_DSP_SPIB_ENABLE, 0); 130 else 131 hda_dsp_stream_spib_config(sdev, stream, HDA_DSP_SPIB_DISABLE, 0); 132 133 /* update no_stream_position flag for ipc params */ 134 if (hda && hda->no_ipc_position) { 135 /* For older ABIs set host_period_bytes to zero to inform 136 * FW we don't want position updates. Newer versions use 137 * no_stream_position for this purpose. 138 */ 139 if (v->abi_version < SOF_ABI_VER(3, 10, 0)) 140 ipc_params->host_period_bytes = 0; 141 else 142 ipc_params->no_stream_position = 1; 143 } 144 145 ipc_params->stream_tag = hstream->stream_tag; 146 147 return 0; 148 } 149 150 /* update SPIB register with appl position */ 151 int hda_dsp_pcm_ack(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream) 152 { 153 struct hdac_stream *hstream = substream->runtime->private_data; 154 struct hdac_ext_stream *hext_stream = stream_to_hdac_ext_stream(hstream); 155 struct snd_pcm_runtime *runtime = substream->runtime; 156 ssize_t appl_pos, buf_size; 157 u32 spib; 158 159 appl_pos = frames_to_bytes(runtime, runtime->control->appl_ptr); 160 buf_size = frames_to_bytes(runtime, runtime->buffer_size); 161 162 spib = appl_pos % buf_size; 163 164 /* Allowable value for SPIB is 1 byte to max buffer size */ 165 if (!spib) 166 spib = buf_size; 167 168 sof_io_write(sdev, hext_stream->spib_addr, spib); 169 170 return 0; 171 } 172 173 int hda_dsp_pcm_trigger(struct snd_sof_dev *sdev, 174 struct snd_pcm_substream *substream, int cmd) 175 { 176 struct hdac_stream *hstream = substream->runtime->private_data; 177 struct hdac_ext_stream *stream = stream_to_hdac_ext_stream(hstream); 178 179 return hda_dsp_stream_trigger(sdev, stream, cmd); 180 } 181 182 snd_pcm_uframes_t hda_dsp_pcm_pointer(struct snd_sof_dev *sdev, 183 struct snd_pcm_substream *substream) 184 { 185 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 186 struct snd_soc_component *scomp = sdev->component; 187 struct hdac_stream *hstream = substream->runtime->private_data; 188 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 189 struct snd_sof_pcm *spcm; 190 snd_pcm_uframes_t pos; 191 192 spcm = snd_sof_find_spcm_dai(scomp, rtd); 193 if (!spcm) { 194 dev_warn_ratelimited(sdev->dev, "warn: can't find PCM with DAI ID %d\n", 195 rtd->dai_link->id); 196 return 0; 197 } 198 199 if (hda && !hda->no_ipc_position) { 200 /* read position from IPC position */ 201 pos = spcm->stream[substream->stream].posn.host_posn; 202 goto found; 203 } 204 205 switch (sof_hda_position_quirk) { 206 case SOF_HDA_POSITION_QUIRK_USE_SKYLAKE_LEGACY: 207 /* 208 * This legacy code, inherited from the Skylake driver, 209 * mixes DPIB registers and DPIB DDR updates and 210 * does not seem to follow any known hardware recommendations. 211 * It's not clear e.g. why there is a different flow 212 * for capture and playback, the only information that matters is 213 * what traffic class is used, and on all SOF-enabled platforms 214 * only VC0 is supported so the work-around was likely not necessary 215 * and quite possibly wrong. 216 */ 217 218 /* DPIB/posbuf position mode: 219 * For Playback, Use DPIB register from HDA space which 220 * reflects the actual data transferred. 221 * For Capture, Use the position buffer for pointer, as DPIB 222 * is not accurate enough, its update may be completed 223 * earlier than the data written to DDR. 224 */ 225 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 226 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 227 AZX_REG_VS_SDXDPIB_XBASE + 228 (AZX_REG_VS_SDXDPIB_XINTERVAL * 229 hstream->index)); 230 } else { 231 /* 232 * For capture stream, we need more workaround to fix the 233 * position incorrect issue: 234 * 235 * 1. Wait at least 20us before reading position buffer after 236 * the interrupt generated(IOC), to make sure position update 237 * happens on frame boundary i.e. 20.833uSec for 48KHz. 238 * 2. Perform a dummy Read to DPIB register to flush DMA 239 * position value. 240 * 3. Read the DMA Position from posbuf. Now the readback 241 * value should be >= period boundary. 242 */ 243 usleep_range(20, 21); 244 snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 245 AZX_REG_VS_SDXDPIB_XBASE + 246 (AZX_REG_VS_SDXDPIB_XINTERVAL * 247 hstream->index)); 248 pos = snd_hdac_stream_get_pos_posbuf(hstream); 249 } 250 break; 251 case SOF_HDA_POSITION_QUIRK_USE_DPIB_REGISTERS: 252 /* 253 * In case VC1 traffic is disabled this is the recommended option 254 */ 255 pos = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, 256 AZX_REG_VS_SDXDPIB_XBASE + 257 (AZX_REG_VS_SDXDPIB_XINTERVAL * 258 hstream->index)); 259 break; 260 case SOF_HDA_POSITION_QUIRK_USE_DPIB_DDR_UPDATE: 261 /* 262 * This is the recommended option when VC1 is enabled. 263 * While this isn't needed for SOF platforms it's added for 264 * consistency and debug. 265 */ 266 pos = snd_hdac_stream_get_pos_posbuf(hstream); 267 break; 268 default: 269 dev_err_once(sdev->dev, "hda_position_quirk value %d not supported\n", 270 sof_hda_position_quirk); 271 pos = 0; 272 break; 273 } 274 275 if (pos >= hstream->bufsize) 276 pos = 0; 277 278 found: 279 pos = bytes_to_frames(substream->runtime, pos); 280 281 dev_vdbg(sdev->dev, "PCM: stream %d dir %d position %lu\n", 282 hstream->index, substream->stream, pos); 283 return pos; 284 } 285 286 int hda_dsp_pcm_open(struct snd_sof_dev *sdev, 287 struct snd_pcm_substream *substream) 288 { 289 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 290 struct snd_pcm_runtime *runtime = substream->runtime; 291 struct snd_soc_component *scomp = sdev->component; 292 struct hdac_ext_stream *dsp_stream; 293 struct snd_sof_pcm *spcm; 294 int direction = substream->stream; 295 u32 flags = 0; 296 297 spcm = snd_sof_find_spcm_dai(scomp, rtd); 298 if (!spcm) { 299 dev_err(sdev->dev, "error: can't find PCM with DAI ID %d\n", rtd->dai_link->id); 300 return -EINVAL; 301 } 302 303 /* 304 * if we want the .ack to work, we need to prevent the control from being mapped. 305 * The status can still be mapped. 306 */ 307 if (hda_disable_rewinds) 308 runtime->hw.info |= SNDRV_PCM_INFO_NO_REWINDS | SNDRV_PCM_INFO_SYNC_APPLPTR; 309 310 /* 311 * All playback streams are DMI L1 capable, capture streams need 312 * pause push/release to be disabled 313 */ 314 if (hda_always_enable_dmi_l1 && direction == SNDRV_PCM_STREAM_CAPTURE) 315 runtime->hw.info &= ~SNDRV_PCM_INFO_PAUSE; 316 317 if (hda_always_enable_dmi_l1 || 318 spcm->stream[substream->stream].d0i3_compatible) 319 flags |= SOF_HDA_STREAM_DMI_L1_COMPATIBLE; 320 321 dsp_stream = hda_dsp_stream_get(sdev, direction, flags); 322 if (!dsp_stream) { 323 dev_err(sdev->dev, "error: no stream available\n"); 324 return -ENODEV; 325 } 326 327 /* minimum as per HDA spec */ 328 snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); 329 330 /* avoid circular buffer wrap in middle of period */ 331 snd_pcm_hw_constraint_integer(substream->runtime, 332 SNDRV_PCM_HW_PARAM_PERIODS); 333 334 /* binding pcm substream to hda stream */ 335 substream->runtime->private_data = &dsp_stream->hstream; 336 return 0; 337 } 338 339 int hda_dsp_pcm_close(struct snd_sof_dev *sdev, 340 struct snd_pcm_substream *substream) 341 { 342 struct hdac_stream *hstream = substream->runtime->private_data; 343 int direction = substream->stream; 344 int ret; 345 346 ret = hda_dsp_stream_put(sdev, direction, hstream->stream_tag); 347 348 if (ret) { 349 dev_dbg(sdev->dev, "stream %s not opened!\n", substream->name); 350 return -ENODEV; 351 } 352 353 /* unbinding pcm substream to hda stream */ 354 substream->runtime->private_data = NULL; 355 return 0; 356 } 357