1d16046ffSLiam Girdwood // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2d16046ffSLiam Girdwood // 3d16046ffSLiam Girdwood // This file is provided under a dual BSD/GPLv2 license. When using or 4d16046ffSLiam Girdwood // redistributing this file, you may do so under either license. 5d16046ffSLiam Girdwood // 6d16046ffSLiam Girdwood // Copyright(c) 2018 Intel Corporation. All rights reserved. 7d16046ffSLiam Girdwood // 8d16046ffSLiam Girdwood // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9d16046ffSLiam Girdwood // Ranjani Sridharan <ranjani.sridharan@linux.intel.com> 10d16046ffSLiam Girdwood // Rander Wang <rander.wang@intel.com> 11d16046ffSLiam Girdwood // Keyon Jie <yang.jie@linux.intel.com> 12d16046ffSLiam Girdwood // 13d16046ffSLiam Girdwood 14d16046ffSLiam Girdwood /* 15d16046ffSLiam Girdwood * Hardware interface for HDA DSP code loader 16d16046ffSLiam Girdwood */ 17d16046ffSLiam Girdwood 18d16046ffSLiam Girdwood #include <linux/firmware.h> 19d16046ffSLiam Girdwood #include <sound/hdaudio_ext.h> 20d16046ffSLiam Girdwood #include <sound/sof.h> 21d16046ffSLiam Girdwood #include "../ops.h" 22d16046ffSLiam Girdwood #include "hda.h" 23d16046ffSLiam Girdwood 24d16046ffSLiam Girdwood #define HDA_FW_BOOT_ATTEMPTS 3 25d16046ffSLiam Girdwood 26d16046ffSLiam Girdwood static int cl_stream_prepare(struct snd_sof_dev *sdev, unsigned int format, 27d16046ffSLiam Girdwood unsigned int size, struct snd_dma_buffer *dmab, 28d16046ffSLiam Girdwood int direction) 29d16046ffSLiam Girdwood { 30d16046ffSLiam Girdwood struct hdac_ext_stream *dsp_stream; 31d16046ffSLiam Girdwood struct hdac_stream *hstream; 32d16046ffSLiam Girdwood struct pci_dev *pci = to_pci_dev(sdev->dev); 33d16046ffSLiam Girdwood int ret; 34d16046ffSLiam Girdwood 35d16046ffSLiam Girdwood if (direction != SNDRV_PCM_STREAM_PLAYBACK) { 36d16046ffSLiam Girdwood dev_err(sdev->dev, "error: code loading DMA is playback only\n"); 37d16046ffSLiam Girdwood return -EINVAL; 38d16046ffSLiam Girdwood } 39d16046ffSLiam Girdwood 40d16046ffSLiam Girdwood dsp_stream = hda_dsp_stream_get(sdev, direction); 41d16046ffSLiam Girdwood 42d16046ffSLiam Girdwood if (!dsp_stream) { 43d16046ffSLiam Girdwood dev_err(sdev->dev, "error: no stream available\n"); 44d16046ffSLiam Girdwood return -ENODEV; 45d16046ffSLiam Girdwood } 46d16046ffSLiam Girdwood hstream = &dsp_stream->hstream; 474ff5f643SKai Vehmanen hstream->substream = NULL; 48d16046ffSLiam Girdwood 49d16046ffSLiam Girdwood /* allocate DMA buffer */ 50d16046ffSLiam Girdwood ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_SG, &pci->dev, size, dmab); 51d16046ffSLiam Girdwood if (ret < 0) { 52d16046ffSLiam Girdwood dev_err(sdev->dev, "error: memory alloc failed: %x\n", ret); 53d16046ffSLiam Girdwood goto error; 54d16046ffSLiam Girdwood } 55d16046ffSLiam Girdwood 56d16046ffSLiam Girdwood hstream->period_bytes = 0;/* initialize period_bytes */ 57d16046ffSLiam Girdwood hstream->format_val = format; 58d16046ffSLiam Girdwood hstream->bufsize = size; 59d16046ffSLiam Girdwood 60d16046ffSLiam Girdwood ret = hda_dsp_stream_hw_params(sdev, dsp_stream, dmab, NULL); 61d16046ffSLiam Girdwood if (ret < 0) { 62d16046ffSLiam Girdwood dev_err(sdev->dev, "error: hdac prepare failed: %x\n", ret); 63d16046ffSLiam Girdwood goto error; 64d16046ffSLiam Girdwood } 65d16046ffSLiam Girdwood 66d16046ffSLiam Girdwood hda_dsp_stream_spib_config(sdev, dsp_stream, HDA_DSP_SPIB_ENABLE, size); 67d16046ffSLiam Girdwood 68d16046ffSLiam Girdwood return hstream->stream_tag; 69d16046ffSLiam Girdwood 70d16046ffSLiam Girdwood error: 71d16046ffSLiam Girdwood hda_dsp_stream_put(sdev, direction, hstream->stream_tag); 72d16046ffSLiam Girdwood snd_dma_free_pages(dmab); 73d16046ffSLiam Girdwood return ret; 74d16046ffSLiam Girdwood } 75d16046ffSLiam Girdwood 76d16046ffSLiam Girdwood /* 77d16046ffSLiam Girdwood * first boot sequence has some extra steps. core 0 waits for power 78d16046ffSLiam Girdwood * status on core 1, so power up core 1 also momentarily, keep it in 79d16046ffSLiam Girdwood * reset/stall and then turn it off 80d16046ffSLiam Girdwood */ 81d16046ffSLiam Girdwood static int cl_dsp_init(struct snd_sof_dev *sdev, const void *fwdata, 82d16046ffSLiam Girdwood u32 fwsize, int stream_tag) 83d16046ffSLiam Girdwood { 84d16046ffSLiam Girdwood struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; 85d16046ffSLiam Girdwood const struct sof_intel_dsp_desc *chip = hda->desc; 86d16046ffSLiam Girdwood unsigned int status; 87d16046ffSLiam Girdwood int ret; 8874ed4097SZhu Yingjiang int i; 89d16046ffSLiam Girdwood 90d16046ffSLiam Girdwood /* step 1: power up corex */ 91d16046ffSLiam Girdwood ret = hda_dsp_core_power_up(sdev, chip->cores_mask); 92d16046ffSLiam Girdwood if (ret < 0) { 93d16046ffSLiam Girdwood dev_err(sdev->dev, "error: dsp core 0/1 power up failed\n"); 94d16046ffSLiam Girdwood goto err; 95d16046ffSLiam Girdwood } 96d16046ffSLiam Girdwood 9774ed4097SZhu Yingjiang /* DSP is powered up, set all SSPs to slave mode */ 9874ed4097SZhu Yingjiang for (i = 0; i < chip->ssp_count; i++) { 9974ed4097SZhu Yingjiang snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, 10074ed4097SZhu Yingjiang chip->ssp_base_offset 10174ed4097SZhu Yingjiang + i * SSP_DEV_MEM_SIZE 10274ed4097SZhu Yingjiang + SSP_SSC1_OFFSET, 10374ed4097SZhu Yingjiang SSP_SET_SLAVE, 10474ed4097SZhu Yingjiang SSP_SET_SLAVE); 10574ed4097SZhu Yingjiang } 10674ed4097SZhu Yingjiang 107d16046ffSLiam Girdwood /* step 2: purge FW request */ 108d16046ffSLiam Girdwood snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, 109d16046ffSLiam Girdwood chip->ipc_req_mask | (HDA_DSP_IPC_PURGE_FW | 110d16046ffSLiam Girdwood ((stream_tag - 1) << 9))); 111d16046ffSLiam Girdwood 112d16046ffSLiam Girdwood /* step 3: unset core 0 reset state & unstall/run core 0 */ 113d16046ffSLiam Girdwood ret = hda_dsp_core_run(sdev, HDA_DSP_CORE_MASK(0)); 114d16046ffSLiam Girdwood if (ret < 0) { 115d16046ffSLiam Girdwood dev_err(sdev->dev, "error: dsp core start failed %d\n", ret); 116d16046ffSLiam Girdwood ret = -EIO; 117d16046ffSLiam Girdwood goto err; 118d16046ffSLiam Girdwood } 119d16046ffSLiam Girdwood 120d16046ffSLiam Girdwood /* step 4: wait for IPC DONE bit from ROM */ 121d16046ffSLiam Girdwood ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, 122d16046ffSLiam Girdwood chip->ipc_ack, status, 123d16046ffSLiam Girdwood ((status & chip->ipc_ack_mask) 124d16046ffSLiam Girdwood == chip->ipc_ack_mask), 125d16046ffSLiam Girdwood HDA_DSP_REG_POLL_INTERVAL_US, 126d16046ffSLiam Girdwood HDA_DSP_INIT_TIMEOUT_US); 127d16046ffSLiam Girdwood 128d16046ffSLiam Girdwood if (ret < 0) { 129d16046ffSLiam Girdwood dev_err(sdev->dev, "error: waiting for HIPCIE done\n"); 130d16046ffSLiam Girdwood goto err; 131d16046ffSLiam Girdwood } 132d16046ffSLiam Girdwood 133d16046ffSLiam Girdwood /* step 5: power down corex */ 134d16046ffSLiam Girdwood ret = hda_dsp_core_power_down(sdev, 135d16046ffSLiam Girdwood chip->cores_mask & ~(HDA_DSP_CORE_MASK(0))); 136d16046ffSLiam Girdwood if (ret < 0) { 137d16046ffSLiam Girdwood dev_err(sdev->dev, "error: dsp core x power down failed\n"); 138d16046ffSLiam Girdwood goto err; 139d16046ffSLiam Girdwood } 140d16046ffSLiam Girdwood 141d16046ffSLiam Girdwood /* step 6: enable IPC interrupts */ 142d16046ffSLiam Girdwood hda_dsp_ipc_int_enable(sdev); 143d16046ffSLiam Girdwood 144d16046ffSLiam Girdwood /* step 7: wait for ROM init */ 145d16046ffSLiam Girdwood ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, 146d16046ffSLiam Girdwood HDA_DSP_SRAM_REG_ROM_STATUS, status, 147d16046ffSLiam Girdwood ((status & HDA_DSP_ROM_STS_MASK) 148d16046ffSLiam Girdwood == HDA_DSP_ROM_INIT), 149d16046ffSLiam Girdwood HDA_DSP_REG_POLL_INTERVAL_US, 150d16046ffSLiam Girdwood chip->rom_init_timeout * 151d16046ffSLiam Girdwood USEC_PER_MSEC); 152d16046ffSLiam Girdwood if (!ret) 153d16046ffSLiam Girdwood return 0; 154d16046ffSLiam Girdwood 155d16046ffSLiam Girdwood err: 156d16046ffSLiam Girdwood hda_dsp_dump(sdev, SOF_DBG_REGS | SOF_DBG_PCI | SOF_DBG_MBOX); 157d16046ffSLiam Girdwood hda_dsp_core_reset_power_down(sdev, chip->cores_mask); 158d16046ffSLiam Girdwood 159d16046ffSLiam Girdwood return ret; 160d16046ffSLiam Girdwood } 161d16046ffSLiam Girdwood 162d16046ffSLiam Girdwood static int cl_trigger(struct snd_sof_dev *sdev, 163d16046ffSLiam Girdwood struct hdac_ext_stream *stream, int cmd) 164d16046ffSLiam Girdwood { 165d16046ffSLiam Girdwood struct hdac_stream *hstream = &stream->hstream; 166d16046ffSLiam Girdwood int sd_offset = SOF_STREAM_SD_OFFSET(hstream); 167d16046ffSLiam Girdwood 168d16046ffSLiam Girdwood /* code loader is special case that reuses stream ops */ 169d16046ffSLiam Girdwood switch (cmd) { 170d16046ffSLiam Girdwood case SNDRV_PCM_TRIGGER_START: 171d16046ffSLiam Girdwood wait_event_timeout(sdev->waitq, !sdev->code_loading, 172d16046ffSLiam Girdwood HDA_DSP_CL_TRIGGER_TIMEOUT); 173d16046ffSLiam Girdwood 174d16046ffSLiam Girdwood snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, 175d16046ffSLiam Girdwood 1 << hstream->index, 176d16046ffSLiam Girdwood 1 << hstream->index); 177d16046ffSLiam Girdwood 178d16046ffSLiam Girdwood snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, 179d16046ffSLiam Girdwood sd_offset, 180d16046ffSLiam Girdwood SOF_HDA_SD_CTL_DMA_START | 181d16046ffSLiam Girdwood SOF_HDA_CL_DMA_SD_INT_MASK, 182d16046ffSLiam Girdwood SOF_HDA_SD_CTL_DMA_START | 183d16046ffSLiam Girdwood SOF_HDA_CL_DMA_SD_INT_MASK); 184d16046ffSLiam Girdwood 185d16046ffSLiam Girdwood hstream->running = true; 186d16046ffSLiam Girdwood return 0; 187d16046ffSLiam Girdwood default: 188d16046ffSLiam Girdwood return hda_dsp_stream_trigger(sdev, stream, cmd); 189d16046ffSLiam Girdwood } 190d16046ffSLiam Girdwood } 191d16046ffSLiam Girdwood 192d16046ffSLiam Girdwood static struct hdac_ext_stream *get_stream_with_tag(struct snd_sof_dev *sdev, 193d16046ffSLiam Girdwood int tag) 194d16046ffSLiam Girdwood { 195d16046ffSLiam Girdwood struct hdac_bus *bus = sof_to_bus(sdev); 196d16046ffSLiam Girdwood struct hdac_stream *s; 197d16046ffSLiam Girdwood 198d16046ffSLiam Girdwood /* get stream with tag */ 199d16046ffSLiam Girdwood list_for_each_entry(s, &bus->stream_list, list) { 200d16046ffSLiam Girdwood if (s->direction == SNDRV_PCM_STREAM_PLAYBACK && 201d16046ffSLiam Girdwood s->stream_tag == tag) { 202d16046ffSLiam Girdwood return stream_to_hdac_ext_stream(s); 203d16046ffSLiam Girdwood } 204d16046ffSLiam Girdwood } 205d16046ffSLiam Girdwood 206d16046ffSLiam Girdwood return NULL; 207d16046ffSLiam Girdwood } 208d16046ffSLiam Girdwood 209d16046ffSLiam Girdwood static int cl_cleanup(struct snd_sof_dev *sdev, struct snd_dma_buffer *dmab, 210d16046ffSLiam Girdwood struct hdac_ext_stream *stream) 211d16046ffSLiam Girdwood { 212d16046ffSLiam Girdwood struct hdac_stream *hstream = &stream->hstream; 213d16046ffSLiam Girdwood int sd_offset = SOF_STREAM_SD_OFFSET(hstream); 214d16046ffSLiam Girdwood int ret; 215d16046ffSLiam Girdwood 216d16046ffSLiam Girdwood ret = hda_dsp_stream_spib_config(sdev, stream, HDA_DSP_SPIB_DISABLE, 0); 217d16046ffSLiam Girdwood 218d16046ffSLiam Girdwood hda_dsp_stream_put(sdev, SNDRV_PCM_STREAM_PLAYBACK, 219d16046ffSLiam Girdwood hstream->stream_tag); 220d16046ffSLiam Girdwood hstream->running = 0; 221d16046ffSLiam Girdwood hstream->substream = NULL; 222d16046ffSLiam Girdwood 223d16046ffSLiam Girdwood /* reset BDL address */ 224d16046ffSLiam Girdwood snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, 225d16046ffSLiam Girdwood sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPL, 0); 226d16046ffSLiam Girdwood snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, 227d16046ffSLiam Girdwood sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, 0); 228d16046ffSLiam Girdwood 229d16046ffSLiam Girdwood snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, sd_offset, 0); 230d16046ffSLiam Girdwood snd_dma_free_pages(dmab); 231d16046ffSLiam Girdwood dmab->area = NULL; 232d16046ffSLiam Girdwood hstream->bufsize = 0; 233d16046ffSLiam Girdwood hstream->format_val = 0; 234d16046ffSLiam Girdwood 235d16046ffSLiam Girdwood return ret; 236d16046ffSLiam Girdwood } 237d16046ffSLiam Girdwood 238d16046ffSLiam Girdwood static int cl_copy_fw(struct snd_sof_dev *sdev, struct hdac_ext_stream *stream) 239d16046ffSLiam Girdwood { 240d16046ffSLiam Girdwood unsigned int reg; 241d16046ffSLiam Girdwood int ret, status; 242d16046ffSLiam Girdwood 243d16046ffSLiam Girdwood ret = cl_trigger(sdev, stream, SNDRV_PCM_TRIGGER_START); 244d16046ffSLiam Girdwood if (ret < 0) { 245d16046ffSLiam Girdwood dev_err(sdev->dev, "error: DMA trigger start failed\n"); 246d16046ffSLiam Girdwood return ret; 247d16046ffSLiam Girdwood } 248d16046ffSLiam Girdwood 249d16046ffSLiam Girdwood status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, 250d16046ffSLiam Girdwood HDA_DSP_SRAM_REG_ROM_STATUS, reg, 251d16046ffSLiam Girdwood ((reg & HDA_DSP_ROM_STS_MASK) 252d16046ffSLiam Girdwood == HDA_DSP_ROM_FW_ENTERED), 253d16046ffSLiam Girdwood HDA_DSP_REG_POLL_INTERVAL_US, 254d16046ffSLiam Girdwood HDA_DSP_BASEFW_TIMEOUT_US); 255d16046ffSLiam Girdwood 25676dc6a2bSPierre-Louis Bossart /* 25776dc6a2bSPierre-Louis Bossart * even in case of errors we still need to stop the DMAs, 25876dc6a2bSPierre-Louis Bossart * but we return the initial error should the DMA stop also fail 25976dc6a2bSPierre-Louis Bossart */ 26076dc6a2bSPierre-Louis Bossart 261d16046ffSLiam Girdwood ret = cl_trigger(sdev, stream, SNDRV_PCM_TRIGGER_STOP); 262d16046ffSLiam Girdwood if (ret < 0) { 263d16046ffSLiam Girdwood dev_err(sdev->dev, "error: DMA trigger stop failed\n"); 26476dc6a2bSPierre-Louis Bossart if (!status) 26576dc6a2bSPierre-Louis Bossart status = ret; 266d16046ffSLiam Girdwood } 267d16046ffSLiam Girdwood 268d16046ffSLiam Girdwood return status; 269d16046ffSLiam Girdwood } 270d16046ffSLiam Girdwood 271d16046ffSLiam Girdwood int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev) 272d16046ffSLiam Girdwood { 273d16046ffSLiam Girdwood struct snd_sof_pdata *plat_data = sdev->pdata; 274d16046ffSLiam Girdwood const struct sof_dev_desc *desc = plat_data->desc; 275d16046ffSLiam Girdwood const struct sof_intel_dsp_desc *chip_info; 276d16046ffSLiam Girdwood struct hdac_ext_stream *stream; 277d16046ffSLiam Girdwood struct firmware stripped_firmware; 278d16046ffSLiam Girdwood int ret, ret1, tag, i; 279d16046ffSLiam Girdwood 280d16046ffSLiam Girdwood chip_info = desc->chip_info; 281d16046ffSLiam Girdwood 282d16046ffSLiam Girdwood stripped_firmware.data = plat_data->fw->data; 283d16046ffSLiam Girdwood stripped_firmware.size = plat_data->fw->size; 284d16046ffSLiam Girdwood 285d16046ffSLiam Girdwood /* init for booting wait */ 286d16046ffSLiam Girdwood init_waitqueue_head(&sdev->boot_wait); 287d16046ffSLiam Girdwood sdev->boot_complete = false; 288d16046ffSLiam Girdwood 289d16046ffSLiam Girdwood /* prepare DMA for code loader stream */ 290d16046ffSLiam Girdwood tag = cl_stream_prepare(sdev, 0x40, stripped_firmware.size, 291d16046ffSLiam Girdwood &sdev->dmab, SNDRV_PCM_STREAM_PLAYBACK); 292d16046ffSLiam Girdwood 293d16046ffSLiam Girdwood if (tag < 0) { 294d16046ffSLiam Girdwood dev_err(sdev->dev, "error: dma prepare for fw loading err: %x\n", 295d16046ffSLiam Girdwood tag); 296d16046ffSLiam Girdwood return tag; 297d16046ffSLiam Girdwood } 298d16046ffSLiam Girdwood 299d16046ffSLiam Girdwood /* get stream with tag */ 300d16046ffSLiam Girdwood stream = get_stream_with_tag(sdev, tag); 301d16046ffSLiam Girdwood if (!stream) { 302d16046ffSLiam Girdwood dev_err(sdev->dev, 303d16046ffSLiam Girdwood "error: could not get stream with stream tag %d\n", 304d16046ffSLiam Girdwood tag); 305d16046ffSLiam Girdwood ret = -ENODEV; 306d16046ffSLiam Girdwood goto err; 307d16046ffSLiam Girdwood } 308d16046ffSLiam Girdwood 309d16046ffSLiam Girdwood memcpy(sdev->dmab.area, stripped_firmware.data, 310d16046ffSLiam Girdwood stripped_firmware.size); 311d16046ffSLiam Girdwood 312d16046ffSLiam Girdwood /* try ROM init a few times before giving up */ 313d16046ffSLiam Girdwood for (i = 0; i < HDA_FW_BOOT_ATTEMPTS; i++) { 314d16046ffSLiam Girdwood ret = cl_dsp_init(sdev, stripped_firmware.data, 315d16046ffSLiam Girdwood stripped_firmware.size, tag); 316d16046ffSLiam Girdwood 317d16046ffSLiam Girdwood /* don't retry anymore if successful */ 318d16046ffSLiam Girdwood if (!ret) 319d16046ffSLiam Girdwood break; 320d16046ffSLiam Girdwood 321d16046ffSLiam Girdwood dev_err(sdev->dev, "error: Error code=0x%x: FW status=0x%x\n", 322d16046ffSLiam Girdwood snd_sof_dsp_read(sdev, HDA_DSP_BAR, 323d16046ffSLiam Girdwood HDA_DSP_SRAM_REG_ROM_ERROR), 324d16046ffSLiam Girdwood snd_sof_dsp_read(sdev, HDA_DSP_BAR, 325d16046ffSLiam Girdwood HDA_DSP_SRAM_REG_ROM_STATUS)); 326d16046ffSLiam Girdwood dev_err(sdev->dev, "error: iteration %d of Core En/ROM load failed: %d\n", 327d16046ffSLiam Girdwood i, ret); 328d16046ffSLiam Girdwood } 329d16046ffSLiam Girdwood 330d16046ffSLiam Girdwood if (i == HDA_FW_BOOT_ATTEMPTS) { 331d16046ffSLiam Girdwood dev_err(sdev->dev, "error: dsp init failed after %d attempts with err: %d\n", 332d16046ffSLiam Girdwood i, ret); 333d16046ffSLiam Girdwood goto cleanup; 334d16046ffSLiam Girdwood } 335d16046ffSLiam Girdwood 336d16046ffSLiam Girdwood /* 337d16046ffSLiam Girdwood * at this point DSP ROM has been initialized and 338d16046ffSLiam Girdwood * should be ready for code loading and firmware boot 339d16046ffSLiam Girdwood */ 340d16046ffSLiam Girdwood ret = cl_copy_fw(sdev, stream); 341d16046ffSLiam Girdwood if (!ret) 342d16046ffSLiam Girdwood dev_dbg(sdev->dev, "Firmware download successful, booting...\n"); 343d16046ffSLiam Girdwood else 344d16046ffSLiam Girdwood dev_err(sdev->dev, "error: load fw failed ret: %d\n", ret); 345d16046ffSLiam Girdwood 346d16046ffSLiam Girdwood cleanup: 347d16046ffSLiam Girdwood /* 348d16046ffSLiam Girdwood * Perform codeloader stream cleanup. 349d16046ffSLiam Girdwood * This should be done even if firmware loading fails. 35076dc6a2bSPierre-Louis Bossart * If the cleanup also fails, we return the initial error 351d16046ffSLiam Girdwood */ 352d16046ffSLiam Girdwood ret1 = cl_cleanup(sdev, &sdev->dmab, stream); 353d16046ffSLiam Girdwood if (ret1 < 0) { 354d16046ffSLiam Girdwood dev_err(sdev->dev, "error: Code loader DSP cleanup failed\n"); 355d16046ffSLiam Girdwood 356d16046ffSLiam Girdwood /* set return value to indicate cleanup failure */ 35776dc6a2bSPierre-Louis Bossart if (!ret) 358d16046ffSLiam Girdwood ret = ret1; 359d16046ffSLiam Girdwood } 360d16046ffSLiam Girdwood 361d16046ffSLiam Girdwood /* 362d16046ffSLiam Girdwood * return master core id if both fw copy 363d16046ffSLiam Girdwood * and stream clean up are successful 364d16046ffSLiam Girdwood */ 365d16046ffSLiam Girdwood if (!ret) 366d16046ffSLiam Girdwood return chip_info->init_core_mask; 367d16046ffSLiam Girdwood 368d16046ffSLiam Girdwood /* dump dsp registers and disable DSP upon error */ 369d16046ffSLiam Girdwood err: 370d16046ffSLiam Girdwood hda_dsp_dump(sdev, SOF_DBG_REGS | SOF_DBG_PCI | SOF_DBG_MBOX); 371d16046ffSLiam Girdwood 372d16046ffSLiam Girdwood /* disable DSP */ 373d16046ffSLiam Girdwood snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, 374d16046ffSLiam Girdwood SOF_HDA_REG_PP_PPCTL, 375d16046ffSLiam Girdwood SOF_HDA_PPCTL_GPROCEN, 0); 376d16046ffSLiam Girdwood return ret; 377d16046ffSLiam Girdwood } 378d16046ffSLiam Girdwood 379d16046ffSLiam Girdwood /* pre fw run operations */ 380d16046ffSLiam Girdwood int hda_dsp_pre_fw_run(struct snd_sof_dev *sdev) 381d16046ffSLiam Girdwood { 382d16046ffSLiam Girdwood /* disable clock gating and power gating */ 383d16046ffSLiam Girdwood return hda_dsp_ctrl_clock_power_gating(sdev, false); 384d16046ffSLiam Girdwood } 385d16046ffSLiam Girdwood 386d16046ffSLiam Girdwood /* post fw run operations */ 387d16046ffSLiam Girdwood int hda_dsp_post_fw_run(struct snd_sof_dev *sdev) 388d16046ffSLiam Girdwood { 389d16046ffSLiam Girdwood /* re-enable clock gating and power gating */ 390d16046ffSLiam Girdwood return hda_dsp_ctrl_clock_power_gating(sdev, true); 391d16046ffSLiam Girdwood } 392