1e149ca29SPierre-Louis Bossart // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 29e42c5caSLiam Girdwood // 39e42c5caSLiam Girdwood // This file is provided under a dual BSD/GPLv2 license. When using or 49e42c5caSLiam Girdwood // redistributing this file, you may do so under either license. 59e42c5caSLiam Girdwood // 69e42c5caSLiam Girdwood // Copyright(c) 2018 Intel Corporation. All rights reserved. 79e42c5caSLiam Girdwood // 89e42c5caSLiam Girdwood // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 99e42c5caSLiam Girdwood // 109e42c5caSLiam Girdwood 119e42c5caSLiam Girdwood /* 129e42c5caSLiam Girdwood * Hardware interface for audio DSP on Baytrail, Braswell and Cherrytrail. 139e42c5caSLiam Girdwood */ 149e42c5caSLiam Girdwood 159e42c5caSLiam Girdwood #include <linux/module.h> 169e42c5caSLiam Girdwood #include <sound/sof.h> 179e42c5caSLiam Girdwood #include <sound/sof/xtensa.h> 188a49cd11SArnd Bergmann #include <sound/soc-acpi.h> 198a49cd11SArnd Bergmann #include <sound/soc-acpi-intel-match.h> 208a49cd11SArnd Bergmann #include <sound/intel-dsp-config.h> 219e42c5caSLiam Girdwood #include "../ops.h" 22*47fad239SPierre-Louis Bossart #include "atom.h" 239e42c5caSLiam Girdwood #include "shim.h" 248a49cd11SArnd Bergmann #include "../sof-acpi-dev.h" 25285880a2SDaniel Baluta #include "../sof-audio.h" 262aae447aSPierre-Louis Bossart #include "../../intel/common/soc-intel-quirks.h" 279e42c5caSLiam Girdwood 289e42c5caSLiam Girdwood static const struct snd_sof_debugfs_map byt_debugfs[] = { 291c5ab2dcSPierre-Louis Bossart {"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE, 309e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_ALWAYS}, 311c5ab2dcSPierre-Louis Bossart {"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE, 329e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_ALWAYS}, 331c5ab2dcSPierre-Louis Bossart {"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE, 349e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_ALWAYS}, 351c5ab2dcSPierre-Louis Bossart {"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE, 369e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_ALWAYS}, 371c5ab2dcSPierre-Louis Bossart {"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE, 389e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_ALWAYS}, 391c5ab2dcSPierre-Louis Bossart {"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE, 409e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_D0_ONLY}, 411c5ab2dcSPierre-Louis Bossart {"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE, 429e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_D0_ONLY}, 431c5ab2dcSPierre-Louis Bossart {"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT, 449e42c5caSLiam Girdwood SOF_DEBUGFS_ACCESS_ALWAYS}, 459e42c5caSLiam Girdwood }; 469e42c5caSLiam Girdwood 47*47fad239SPierre-Louis Bossart static const struct snd_sof_debugfs_map cht_debugfs[] = { 481c5ab2dcSPierre-Louis Bossart {"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE, 491c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 501c5ab2dcSPierre-Louis Bossart {"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE, 511c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 52*47fad239SPierre-Louis Bossart {"dmac2", DSP_BAR, DMAC2_OFFSET, DMAC_SIZE, 53*47fad239SPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 541c5ab2dcSPierre-Louis Bossart {"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE, 551c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 561c5ab2dcSPierre-Louis Bossart {"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE, 571c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 581c5ab2dcSPierre-Louis Bossart {"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE, 591c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 60*47fad239SPierre-Louis Bossart {"ssp3", DSP_BAR, SSP3_OFFSET, SSP_SIZE, 61*47fad239SPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 62*47fad239SPierre-Louis Bossart {"ssp4", DSP_BAR, SSP4_OFFSET, SSP_SIZE, 63*47fad239SPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 64*47fad239SPierre-Louis Bossart {"ssp5", DSP_BAR, SSP5_OFFSET, SSP_SIZE, 65*47fad239SPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 661c5ab2dcSPierre-Louis Bossart {"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE, 671c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_D0_ONLY}, 681c5ab2dcSPierre-Louis Bossart {"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE, 691c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_D0_ONLY}, 70*47fad239SPierre-Louis Bossart {"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_CHT, 711c5ab2dcSPierre-Louis Bossart SOF_DEBUGFS_ACCESS_ALWAYS}, 721c5ab2dcSPierre-Louis Bossart }; 731c5ab2dcSPierre-Louis Bossart 74af89e7daSPierre-Louis Bossart static void byt_reset_dsp_disable_int(struct snd_sof_dev *sdev) 75af89e7daSPierre-Louis Bossart { 76af89e7daSPierre-Louis Bossart /* Disable Interrupt from both sides */ 771c5ab2dcSPierre-Louis Bossart snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX, 0x3, 0x3); 781c5ab2dcSPierre-Louis Bossart snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRD, 0x3, 0x3); 79af89e7daSPierre-Louis Bossart 80af89e7daSPierre-Louis Bossart /* Put DSP into reset, set reset vector */ 811c5ab2dcSPierre-Louis Bossart snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR, 82af89e7daSPierre-Louis Bossart SHIM_BYT_CSR_RST | SHIM_BYT_CSR_VECTOR_SEL, 83af89e7daSPierre-Louis Bossart SHIM_BYT_CSR_RST | SHIM_BYT_CSR_VECTOR_SEL); 84af89e7daSPierre-Louis Bossart } 85af89e7daSPierre-Louis Bossart 86af89e7daSPierre-Louis Bossart static int byt_suspend(struct snd_sof_dev *sdev, u32 target_state) 87af89e7daSPierre-Louis Bossart { 88af89e7daSPierre-Louis Bossart byt_reset_dsp_disable_int(sdev); 89af89e7daSPierre-Louis Bossart 90af89e7daSPierre-Louis Bossart return 0; 91af89e7daSPierre-Louis Bossart } 92af89e7daSPierre-Louis Bossart 93af89e7daSPierre-Louis Bossart static int byt_resume(struct snd_sof_dev *sdev) 94af89e7daSPierre-Louis Bossart { 95af89e7daSPierre-Louis Bossart /* enable BUSY and disable DONE Interrupt by default */ 961c5ab2dcSPierre-Louis Bossart snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX, 97af89e7daSPierre-Louis Bossart SHIM_IMRX_BUSY | SHIM_IMRX_DONE, 98af89e7daSPierre-Louis Bossart SHIM_IMRX_DONE); 99af89e7daSPierre-Louis Bossart 100af89e7daSPierre-Louis Bossart return 0; 101af89e7daSPierre-Louis Bossart } 102af89e7daSPierre-Louis Bossart 103af89e7daSPierre-Louis Bossart static int byt_remove(struct snd_sof_dev *sdev) 104af89e7daSPierre-Louis Bossart { 105af89e7daSPierre-Louis Bossart byt_reset_dsp_disable_int(sdev); 106af89e7daSPierre-Louis Bossart 107af89e7daSPierre-Louis Bossart return 0; 108af89e7daSPierre-Louis Bossart } 109af89e7daSPierre-Louis Bossart 1109e42c5caSLiam Girdwood static int byt_acpi_probe(struct snd_sof_dev *sdev) 1119e42c5caSLiam Girdwood { 1129e42c5caSLiam Girdwood struct snd_sof_pdata *pdata = sdev->pdata; 1139e42c5caSLiam Girdwood const struct sof_dev_desc *desc = pdata->desc; 1149e42c5caSLiam Girdwood struct platform_device *pdev = 1159e42c5caSLiam Girdwood container_of(sdev->dev, struct platform_device, dev); 1169e42c5caSLiam Girdwood struct resource *mmio; 1179e42c5caSLiam Girdwood u32 base, size; 1189e42c5caSLiam Girdwood int ret; 1199e42c5caSLiam Girdwood 1209e42c5caSLiam Girdwood /* DSP DMA can only access low 31 bits of host memory */ 1219e42c5caSLiam Girdwood ret = dma_coerce_mask_and_coherent(sdev->dev, DMA_BIT_MASK(31)); 1229e42c5caSLiam Girdwood if (ret < 0) { 1239e42c5caSLiam Girdwood dev_err(sdev->dev, "error: failed to set DMA mask %d\n", ret); 1249e42c5caSLiam Girdwood return ret; 1259e42c5caSLiam Girdwood } 1269e42c5caSLiam Girdwood 1279e42c5caSLiam Girdwood /* LPE base */ 1289e42c5caSLiam Girdwood mmio = platform_get_resource(pdev, IORESOURCE_MEM, 1299e42c5caSLiam Girdwood desc->resindex_lpe_base); 1309e42c5caSLiam Girdwood if (mmio) { 1319e42c5caSLiam Girdwood base = mmio->start; 1329e42c5caSLiam Girdwood size = resource_size(mmio); 1339e42c5caSLiam Girdwood } else { 1349e42c5caSLiam Girdwood dev_err(sdev->dev, "error: failed to get LPE base at idx %d\n", 1359e42c5caSLiam Girdwood desc->resindex_lpe_base); 1369e42c5caSLiam Girdwood return -EINVAL; 1379e42c5caSLiam Girdwood } 1389e42c5caSLiam Girdwood 1399e42c5caSLiam Girdwood dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size); 1401c5ab2dcSPierre-Louis Bossart sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size); 1411c5ab2dcSPierre-Louis Bossart if (!sdev->bar[DSP_BAR]) { 1429e42c5caSLiam Girdwood dev_err(sdev->dev, "error: failed to ioremap LPE base 0x%x size 0x%x\n", 1439e42c5caSLiam Girdwood base, size); 1449e42c5caSLiam Girdwood return -ENODEV; 1459e42c5caSLiam Girdwood } 1461c5ab2dcSPierre-Louis Bossart dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]); 1479e42c5caSLiam Girdwood 1489e42c5caSLiam Girdwood /* TODO: add offsets */ 1491c5ab2dcSPierre-Louis Bossart sdev->mmio_bar = DSP_BAR; 1501c5ab2dcSPierre-Louis Bossart sdev->mailbox_bar = DSP_BAR; 1519e42c5caSLiam Girdwood 1529e42c5caSLiam Girdwood /* IMR base - optional */ 1539e42c5caSLiam Girdwood if (desc->resindex_imr_base == -1) 1549e42c5caSLiam Girdwood goto irq; 1559e42c5caSLiam Girdwood 1569e42c5caSLiam Girdwood mmio = platform_get_resource(pdev, IORESOURCE_MEM, 1579e42c5caSLiam Girdwood desc->resindex_imr_base); 1589e42c5caSLiam Girdwood if (mmio) { 1599e42c5caSLiam Girdwood base = mmio->start; 1609e42c5caSLiam Girdwood size = resource_size(mmio); 1619e42c5caSLiam Girdwood } else { 1629e42c5caSLiam Girdwood dev_err(sdev->dev, "error: failed to get IMR base at idx %d\n", 1639e42c5caSLiam Girdwood desc->resindex_imr_base); 1649e42c5caSLiam Girdwood return -ENODEV; 1659e42c5caSLiam Girdwood } 1669e42c5caSLiam Girdwood 1679e42c5caSLiam Girdwood /* some BIOSes don't map IMR */ 1689e42c5caSLiam Girdwood if (base == 0x55aa55aa || base == 0x0) { 1699e42c5caSLiam Girdwood dev_info(sdev->dev, "IMR not set by BIOS. Ignoring\n"); 1709e42c5caSLiam Girdwood goto irq; 1719e42c5caSLiam Girdwood } 1729e42c5caSLiam Girdwood 1739e42c5caSLiam Girdwood dev_dbg(sdev->dev, "IMR base at 0x%x size 0x%x", base, size); 1741c5ab2dcSPierre-Louis Bossart sdev->bar[IMR_BAR] = devm_ioremap(sdev->dev, base, size); 1751c5ab2dcSPierre-Louis Bossart if (!sdev->bar[IMR_BAR]) { 1769e42c5caSLiam Girdwood dev_err(sdev->dev, "error: failed to ioremap IMR base 0x%x size 0x%x\n", 1779e42c5caSLiam Girdwood base, size); 1789e42c5caSLiam Girdwood return -ENODEV; 1799e42c5caSLiam Girdwood } 1801c5ab2dcSPierre-Louis Bossart dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[IMR_BAR]); 1819e42c5caSLiam Girdwood 1829e42c5caSLiam Girdwood irq: 1839e42c5caSLiam Girdwood /* register our IRQ */ 1849e42c5caSLiam Girdwood sdev->ipc_irq = platform_get_irq(pdev, desc->irqindex_host_ipc); 185cf9441adSStephen Boyd if (sdev->ipc_irq < 0) 1869e42c5caSLiam Girdwood return sdev->ipc_irq; 1879e42c5caSLiam Girdwood 1889e42c5caSLiam Girdwood dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq); 1899e42c5caSLiam Girdwood ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq, 1901c5ab2dcSPierre-Louis Bossart atom_irq_handler, atom_irq_thread, 1919e42c5caSLiam Girdwood IRQF_SHARED, "AudioDSP", sdev); 1929e42c5caSLiam Girdwood if (ret < 0) { 1939e42c5caSLiam Girdwood dev_err(sdev->dev, "error: failed to register IRQ %d\n", 1949e42c5caSLiam Girdwood sdev->ipc_irq); 1959e42c5caSLiam Girdwood return ret; 1969e42c5caSLiam Girdwood } 1979e42c5caSLiam Girdwood 1983d2e5c48SKeyon Jie /* enable BUSY and disable DONE Interrupt by default */ 1991c5ab2dcSPierre-Louis Bossart snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX, 2003d2e5c48SKeyon Jie SHIM_IMRX_BUSY | SHIM_IMRX_DONE, 2013d2e5c48SKeyon Jie SHIM_IMRX_DONE); 2029e42c5caSLiam Girdwood 2039e42c5caSLiam Girdwood /* set default mailbox offset for FW ready message */ 2049e42c5caSLiam Girdwood sdev->dsp_box.offset = MBOX_OFFSET; 2059e42c5caSLiam Girdwood 2069e42c5caSLiam Girdwood return ret; 2079e42c5caSLiam Girdwood } 2089e42c5caSLiam Girdwood 2099e42c5caSLiam Girdwood /* baytrail ops */ 2108a49cd11SArnd Bergmann static const struct snd_sof_dsp_ops sof_byt_ops = { 2119e42c5caSLiam Girdwood /* device init */ 2129e42c5caSLiam Girdwood .probe = byt_acpi_probe, 213c691f0c6SRanjani Sridharan .remove = byt_remove, 2149e42c5caSLiam Girdwood 2159e42c5caSLiam Girdwood /* DSP core boot / reset */ 2161c5ab2dcSPierre-Louis Bossart .run = atom_run, 2171c5ab2dcSPierre-Louis Bossart .reset = atom_reset, 2189e42c5caSLiam Girdwood 2199e42c5caSLiam Girdwood /* Register IO */ 2209e42c5caSLiam Girdwood .write = sof_io_write, 2219e42c5caSLiam Girdwood .read = sof_io_read, 2229e42c5caSLiam Girdwood .write64 = sof_io_write64, 2239e42c5caSLiam Girdwood .read64 = sof_io_read64, 2249e42c5caSLiam Girdwood 2259e42c5caSLiam Girdwood /* Block IO */ 2269e42c5caSLiam Girdwood .block_read = sof_block_read, 2279e42c5caSLiam Girdwood .block_write = sof_block_write, 2289e42c5caSLiam Girdwood 2299e42c5caSLiam Girdwood /* doorbell */ 2301c5ab2dcSPierre-Louis Bossart .irq_handler = atom_irq_handler, 2311c5ab2dcSPierre-Louis Bossart .irq_thread = atom_irq_thread, 2329e42c5caSLiam Girdwood 2339e42c5caSLiam Girdwood /* ipc */ 2341c5ab2dcSPierre-Louis Bossart .send_msg = atom_send_msg, 23583ee7ab1SDaniel Baluta .fw_ready = sof_fw_ready, 2361c5ab2dcSPierre-Louis Bossart .get_mailbox_offset = atom_get_mailbox_offset, 2371c5ab2dcSPierre-Louis Bossart .get_window_offset = atom_get_window_offset, 2389e42c5caSLiam Girdwood 2399e42c5caSLiam Girdwood .ipc_msg_data = intel_ipc_msg_data, 2409e42c5caSLiam Girdwood .ipc_pcm_params = intel_ipc_pcm_params, 2419e42c5caSLiam Girdwood 242285880a2SDaniel Baluta /* machine driver */ 2431c5ab2dcSPierre-Louis Bossart .machine_select = atom_machine_select, 244285880a2SDaniel Baluta .machine_register = sof_machine_register, 245285880a2SDaniel Baluta .machine_unregister = sof_machine_unregister, 2461c5ab2dcSPierre-Louis Bossart .set_mach_params = atom_set_mach_params, 247285880a2SDaniel Baluta 2489e42c5caSLiam Girdwood /* debug */ 2499e42c5caSLiam Girdwood .debug_map = byt_debugfs, 2509e42c5caSLiam Girdwood .debug_map_count = ARRAY_SIZE(byt_debugfs), 2511c5ab2dcSPierre-Louis Bossart .dbg_dump = atom_dump, 2529e42c5caSLiam Girdwood 2539e42c5caSLiam Girdwood /* stream callbacks */ 2549e42c5caSLiam Girdwood .pcm_open = intel_pcm_open, 2559e42c5caSLiam Girdwood .pcm_close = intel_pcm_close, 2569e42c5caSLiam Girdwood 2579e42c5caSLiam Girdwood /* module loading */ 2589e42c5caSLiam Girdwood .load_module = snd_sof_parse_module_memcpy, 2599e42c5caSLiam Girdwood 2609e42c5caSLiam Girdwood /*Firmware loading */ 2619e42c5caSLiam Girdwood .load_firmware = snd_sof_load_firmware_memcpy, 2629e42c5caSLiam Girdwood 263ddcccd54SRanjani Sridharan /* PM */ 264ddcccd54SRanjani Sridharan .suspend = byt_suspend, 265ddcccd54SRanjani Sridharan .resume = byt_resume, 266ddcccd54SRanjani Sridharan 2679e42c5caSLiam Girdwood /* DAI drivers */ 2681c5ab2dcSPierre-Louis Bossart .drv = atom_dai, 2699e42c5caSLiam Girdwood .num_drv = 3, /* we have only 3 SSPs on byt*/ 27027e322faSPierre-Louis Bossart 27127e322faSPierre-Louis Bossart /* ALSA HW info flags */ 27227e322faSPierre-Louis Bossart .hw_info = SNDRV_PCM_INFO_MMAP | 27327e322faSPierre-Louis Bossart SNDRV_PCM_INFO_MMAP_VALID | 27427e322faSPierre-Louis Bossart SNDRV_PCM_INFO_INTERLEAVED | 27527e322faSPierre-Louis Bossart SNDRV_PCM_INFO_PAUSE | 2764c02a7bdSPierre-Louis Bossart SNDRV_PCM_INFO_BATCH, 2770f501c7cSPierre-Louis Bossart 2780f501c7cSPierre-Louis Bossart .arch_ops = &sof_xtensa_arch_ops, 2799e42c5caSLiam Girdwood }; 2809e42c5caSLiam Girdwood 2818a49cd11SArnd Bergmann static const struct sof_intel_dsp_desc byt_chip_info = { 2829e42c5caSLiam Girdwood .cores_num = 1, 28364b96917SRanjani Sridharan .host_managed_cores_mask = 1, 2849e42c5caSLiam Girdwood }; 2859e42c5caSLiam Girdwood 2869e42c5caSLiam Girdwood /* cherrytrail and braswell ops */ 2878a49cd11SArnd Bergmann static const struct snd_sof_dsp_ops sof_cht_ops = { 2889e42c5caSLiam Girdwood /* device init */ 2899e42c5caSLiam Girdwood .probe = byt_acpi_probe, 290c691f0c6SRanjani Sridharan .remove = byt_remove, 2919e42c5caSLiam Girdwood 2929e42c5caSLiam Girdwood /* DSP core boot / reset */ 2931c5ab2dcSPierre-Louis Bossart .run = atom_run, 2941c5ab2dcSPierre-Louis Bossart .reset = atom_reset, 2959e42c5caSLiam Girdwood 2969e42c5caSLiam Girdwood /* Register IO */ 2979e42c5caSLiam Girdwood .write = sof_io_write, 2989e42c5caSLiam Girdwood .read = sof_io_read, 2999e42c5caSLiam Girdwood .write64 = sof_io_write64, 3009e42c5caSLiam Girdwood .read64 = sof_io_read64, 3019e42c5caSLiam Girdwood 3029e42c5caSLiam Girdwood /* Block IO */ 3039e42c5caSLiam Girdwood .block_read = sof_block_read, 3049e42c5caSLiam Girdwood .block_write = sof_block_write, 3059e42c5caSLiam Girdwood 3069e42c5caSLiam Girdwood /* doorbell */ 3071c5ab2dcSPierre-Louis Bossart .irq_handler = atom_irq_handler, 3081c5ab2dcSPierre-Louis Bossart .irq_thread = atom_irq_thread, 3099e42c5caSLiam Girdwood 3109e42c5caSLiam Girdwood /* ipc */ 3111c5ab2dcSPierre-Louis Bossart .send_msg = atom_send_msg, 31283ee7ab1SDaniel Baluta .fw_ready = sof_fw_ready, 3131c5ab2dcSPierre-Louis Bossart .get_mailbox_offset = atom_get_mailbox_offset, 3141c5ab2dcSPierre-Louis Bossart .get_window_offset = atom_get_window_offset, 3159e42c5caSLiam Girdwood 3169e42c5caSLiam Girdwood .ipc_msg_data = intel_ipc_msg_data, 3179e42c5caSLiam Girdwood .ipc_pcm_params = intel_ipc_pcm_params, 3189e42c5caSLiam Girdwood 319285880a2SDaniel Baluta /* machine driver */ 3201c5ab2dcSPierre-Louis Bossart .machine_select = atom_machine_select, 321285880a2SDaniel Baluta .machine_register = sof_machine_register, 322285880a2SDaniel Baluta .machine_unregister = sof_machine_unregister, 3231c5ab2dcSPierre-Louis Bossart .set_mach_params = atom_set_mach_params, 324285880a2SDaniel Baluta 3259e42c5caSLiam Girdwood /* debug */ 3269e42c5caSLiam Girdwood .debug_map = cht_debugfs, 3279e42c5caSLiam Girdwood .debug_map_count = ARRAY_SIZE(cht_debugfs), 3281c5ab2dcSPierre-Louis Bossart .dbg_dump = atom_dump, 3299e42c5caSLiam Girdwood 3309e42c5caSLiam Girdwood /* stream callbacks */ 3319e42c5caSLiam Girdwood .pcm_open = intel_pcm_open, 3329e42c5caSLiam Girdwood .pcm_close = intel_pcm_close, 3339e42c5caSLiam Girdwood 3349e42c5caSLiam Girdwood /* module loading */ 3359e42c5caSLiam Girdwood .load_module = snd_sof_parse_module_memcpy, 3369e42c5caSLiam Girdwood 3379e42c5caSLiam Girdwood /*Firmware loading */ 3389e42c5caSLiam Girdwood .load_firmware = snd_sof_load_firmware_memcpy, 3399e42c5caSLiam Girdwood 340ddcccd54SRanjani Sridharan /* PM */ 341ddcccd54SRanjani Sridharan .suspend = byt_suspend, 342ddcccd54SRanjani Sridharan .resume = byt_resume, 343ddcccd54SRanjani Sridharan 3449e42c5caSLiam Girdwood /* DAI drivers */ 3451c5ab2dcSPierre-Louis Bossart .drv = atom_dai, 3469e42c5caSLiam Girdwood /* all 6 SSPs may be available for cherrytrail */ 3471c5ab2dcSPierre-Louis Bossart .num_drv = 6, 34827e322faSPierre-Louis Bossart 34927e322faSPierre-Louis Bossart /* ALSA HW info flags */ 35027e322faSPierre-Louis Bossart .hw_info = SNDRV_PCM_INFO_MMAP | 35127e322faSPierre-Louis Bossart SNDRV_PCM_INFO_MMAP_VALID | 35227e322faSPierre-Louis Bossart SNDRV_PCM_INFO_INTERLEAVED | 35327e322faSPierre-Louis Bossart SNDRV_PCM_INFO_PAUSE | 3544c02a7bdSPierre-Louis Bossart SNDRV_PCM_INFO_BATCH, 3550f501c7cSPierre-Louis Bossart 3560f501c7cSPierre-Louis Bossart .arch_ops = &sof_xtensa_arch_ops, 3579e42c5caSLiam Girdwood }; 3589e42c5caSLiam Girdwood 3598a49cd11SArnd Bergmann static const struct sof_intel_dsp_desc cht_chip_info = { 3609e42c5caSLiam Girdwood .cores_num = 1, 36164b96917SRanjani Sridharan .host_managed_cores_mask = 1, 3629e42c5caSLiam Girdwood }; 3638a49cd11SArnd Bergmann 3648a49cd11SArnd Bergmann /* BYTCR uses different IRQ index */ 3658a49cd11SArnd Bergmann static const struct sof_dev_desc sof_acpi_baytrailcr_desc = { 3668a49cd11SArnd Bergmann .machines = snd_soc_acpi_intel_baytrail_machines, 3678a49cd11SArnd Bergmann .resindex_lpe_base = 0, 3688a49cd11SArnd Bergmann .resindex_pcicfg_base = 1, 3698a49cd11SArnd Bergmann .resindex_imr_base = 2, 3708a49cd11SArnd Bergmann .irqindex_host_ipc = 0, 3718a49cd11SArnd Bergmann .chip_info = &byt_chip_info, 3728a49cd11SArnd Bergmann .default_fw_path = "intel/sof", 3738a49cd11SArnd Bergmann .default_tplg_path = "intel/sof-tplg", 3748a49cd11SArnd Bergmann .default_fw_filename = "sof-byt.ri", 3758a49cd11SArnd Bergmann .nocodec_tplg_filename = "sof-byt-nocodec.tplg", 3768a49cd11SArnd Bergmann .ops = &sof_byt_ops, 3778a49cd11SArnd Bergmann }; 3788a49cd11SArnd Bergmann 3798a49cd11SArnd Bergmann static const struct sof_dev_desc sof_acpi_baytrail_desc = { 3808a49cd11SArnd Bergmann .machines = snd_soc_acpi_intel_baytrail_machines, 3818a49cd11SArnd Bergmann .resindex_lpe_base = 0, 3828a49cd11SArnd Bergmann .resindex_pcicfg_base = 1, 3838a49cd11SArnd Bergmann .resindex_imr_base = 2, 3848a49cd11SArnd Bergmann .irqindex_host_ipc = 5, 3858a49cd11SArnd Bergmann .chip_info = &byt_chip_info, 3868a49cd11SArnd Bergmann .default_fw_path = "intel/sof", 3878a49cd11SArnd Bergmann .default_tplg_path = "intel/sof-tplg", 3888a49cd11SArnd Bergmann .default_fw_filename = "sof-byt.ri", 3898a49cd11SArnd Bergmann .nocodec_tplg_filename = "sof-byt-nocodec.tplg", 3908a49cd11SArnd Bergmann .ops = &sof_byt_ops, 3918a49cd11SArnd Bergmann }; 3928a49cd11SArnd Bergmann 3938a49cd11SArnd Bergmann static const struct sof_dev_desc sof_acpi_cherrytrail_desc = { 3948a49cd11SArnd Bergmann .machines = snd_soc_acpi_intel_cherrytrail_machines, 3958a49cd11SArnd Bergmann .resindex_lpe_base = 0, 3968a49cd11SArnd Bergmann .resindex_pcicfg_base = 1, 3978a49cd11SArnd Bergmann .resindex_imr_base = 2, 3988a49cd11SArnd Bergmann .irqindex_host_ipc = 5, 3998a49cd11SArnd Bergmann .chip_info = &cht_chip_info, 4008a49cd11SArnd Bergmann .default_fw_path = "intel/sof", 4018a49cd11SArnd Bergmann .default_tplg_path = "intel/sof-tplg", 4028a49cd11SArnd Bergmann .default_fw_filename = "sof-cht.ri", 4038a49cd11SArnd Bergmann .nocodec_tplg_filename = "sof-cht-nocodec.tplg", 4048a49cd11SArnd Bergmann .ops = &sof_cht_ops, 4058a49cd11SArnd Bergmann }; 4068a49cd11SArnd Bergmann 4078a49cd11SArnd Bergmann static const struct acpi_device_id sof_baytrail_match[] = { 4088a49cd11SArnd Bergmann { "80860F28", (unsigned long)&sof_acpi_baytrail_desc }, 4098a49cd11SArnd Bergmann { "808622A8", (unsigned long)&sof_acpi_cherrytrail_desc }, 4108a49cd11SArnd Bergmann { } 4118a49cd11SArnd Bergmann }; 4128a49cd11SArnd Bergmann MODULE_DEVICE_TABLE(acpi, sof_baytrail_match); 4138a49cd11SArnd Bergmann 4148a49cd11SArnd Bergmann static int sof_baytrail_probe(struct platform_device *pdev) 4158a49cd11SArnd Bergmann { 4168a49cd11SArnd Bergmann struct device *dev = &pdev->dev; 4178a49cd11SArnd Bergmann const struct sof_dev_desc *desc; 4188a49cd11SArnd Bergmann const struct acpi_device_id *id; 4198a49cd11SArnd Bergmann int ret; 4208a49cd11SArnd Bergmann 4218a49cd11SArnd Bergmann id = acpi_match_device(dev->driver->acpi_match_table, dev); 4228a49cd11SArnd Bergmann if (!id) 4238a49cd11SArnd Bergmann return -ENODEV; 4248a49cd11SArnd Bergmann 4258a49cd11SArnd Bergmann ret = snd_intel_acpi_dsp_driver_probe(dev, id->id); 4268a49cd11SArnd Bergmann if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_SOF) { 4278a49cd11SArnd Bergmann dev_dbg(dev, "SOF ACPI driver not selected, aborting probe\n"); 4288a49cd11SArnd Bergmann return -ENODEV; 4298a49cd11SArnd Bergmann } 4308a49cd11SArnd Bergmann 4318a49cd11SArnd Bergmann desc = device_get_match_data(&pdev->dev); 4328a49cd11SArnd Bergmann if (!desc) 4338a49cd11SArnd Bergmann return -ENODEV; 4348a49cd11SArnd Bergmann 4358a49cd11SArnd Bergmann if (desc == &sof_acpi_baytrail_desc && soc_intel_is_byt_cr(pdev)) 4368a49cd11SArnd Bergmann desc = &sof_acpi_baytrailcr_desc; 4378a49cd11SArnd Bergmann 4388a49cd11SArnd Bergmann return sof_acpi_probe(pdev, desc); 4398a49cd11SArnd Bergmann } 4408a49cd11SArnd Bergmann 4418a49cd11SArnd Bergmann /* acpi_driver definition */ 4428a49cd11SArnd Bergmann static struct platform_driver snd_sof_acpi_intel_byt_driver = { 4438a49cd11SArnd Bergmann .probe = sof_baytrail_probe, 4448a49cd11SArnd Bergmann .remove = sof_acpi_remove, 4458a49cd11SArnd Bergmann .driver = { 4468a49cd11SArnd Bergmann .name = "sof-audio-acpi-intel-byt", 4478a49cd11SArnd Bergmann .pm = &sof_acpi_pm, 4488a49cd11SArnd Bergmann .acpi_match_table = sof_baytrail_match, 4498a49cd11SArnd Bergmann }, 4508a49cd11SArnd Bergmann }; 4518a49cd11SArnd Bergmann module_platform_driver(snd_sof_acpi_intel_byt_driver); 4529e42c5caSLiam Girdwood 4539e42c5caSLiam Girdwood MODULE_LICENSE("Dual BSD/GPL"); 454f4483a0fSPierre-Louis Bossart MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HIFI_EP_IPC); 455068ac0dbSPierre-Louis Bossart MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); 4568a49cd11SArnd Bergmann MODULE_IMPORT_NS(SND_SOC_SOF_ACPI_DEV); 457*47fad239SPierre-Louis Bossart MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_ATOM_HIFI_EP); 458