1 /* 2 * Renesas R-Car SSIU/SSI support 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 6 * 7 * Based on fsi.c 8 * Kuninori Morimoto <morimoto.kuninori@renesas.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 #include <linux/delay.h> 15 #include "rsnd.h" 16 #define RSND_SSI_NAME_SIZE 16 17 18 /* 19 * SSICR 20 */ 21 #define FORCE (1 << 31) /* Fixed */ 22 #define DMEN (1 << 28) /* DMA Enable */ 23 #define UIEN (1 << 27) /* Underflow Interrupt Enable */ 24 #define OIEN (1 << 26) /* Overflow Interrupt Enable */ 25 #define IIEN (1 << 25) /* Idle Mode Interrupt Enable */ 26 #define DIEN (1 << 24) /* Data Interrupt Enable */ 27 28 #define DWL_8 (0 << 19) /* Data Word Length */ 29 #define DWL_16 (1 << 19) /* Data Word Length */ 30 #define DWL_18 (2 << 19) /* Data Word Length */ 31 #define DWL_20 (3 << 19) /* Data Word Length */ 32 #define DWL_22 (4 << 19) /* Data Word Length */ 33 #define DWL_24 (5 << 19) /* Data Word Length */ 34 #define DWL_32 (6 << 19) /* Data Word Length */ 35 36 #define SWL_32 (3 << 16) /* R/W System Word Length */ 37 #define SCKD (1 << 15) /* Serial Bit Clock Direction */ 38 #define SWSD (1 << 14) /* Serial WS Direction */ 39 #define SCKP (1 << 13) /* Serial Bit Clock Polarity */ 40 #define SWSP (1 << 12) /* Serial WS Polarity */ 41 #define SDTA (1 << 10) /* Serial Data Alignment */ 42 #define DEL (1 << 8) /* Serial Data Delay */ 43 #define CKDV(v) (v << 4) /* Serial Clock Division Ratio */ 44 #define TRMD (1 << 1) /* Transmit/Receive Mode Select */ 45 #define EN (1 << 0) /* SSI Module Enable */ 46 47 /* 48 * SSISR 49 */ 50 #define UIRQ (1 << 27) /* Underflow Error Interrupt Status */ 51 #define OIRQ (1 << 26) /* Overflow Error Interrupt Status */ 52 #define IIRQ (1 << 25) /* Idle Mode Interrupt Status */ 53 #define DIRQ (1 << 24) /* Data Interrupt Status Flag */ 54 55 /* 56 * SSIWSR 57 */ 58 #define CONT (1 << 8) /* WS Continue Function */ 59 60 struct rsnd_ssi { 61 struct clk *clk; 62 struct rsnd_ssi_platform_info *info; /* rcar_snd.h */ 63 struct rsnd_ssi *parent; 64 struct rsnd_mod mod; 65 66 struct rsnd_dai *rdai; 67 struct rsnd_dai_stream *io; 68 u32 cr_own; 69 u32 cr_clk; 70 u32 cr_etc; 71 int err; 72 int dma_offset; 73 unsigned int usrcnt; 74 unsigned int rate; 75 }; 76 77 struct rsnd_ssiu { 78 u32 ssi_mode0; 79 u32 ssi_mode1; 80 81 int ssi_nr; 82 struct rsnd_ssi *ssi; 83 }; 84 85 #define for_each_rsnd_ssi(pos, priv, i) \ 86 for (i = 0; \ 87 (i < rsnd_ssi_nr(priv)) && \ 88 ((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \ 89 i++) 90 91 #define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr) 92 #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod) 93 #define rsnd_dma_to_ssi(dma) rsnd_mod_to_ssi(rsnd_dma_to_mod(dma)) 94 #define rsnd_ssi_pio_available(ssi) ((ssi)->info->pio_irq > 0) 95 #define rsnd_ssi_dma_available(ssi) \ 96 rsnd_dma_available(rsnd_mod_to_dma(&(ssi)->mod)) 97 #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent) 98 #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master) 99 #define rsnd_ssi_mode_flags(p) ((p)->info->flags) 100 #define rsnd_ssi_dai_id(ssi) ((ssi)->info->dai_id) 101 #define rsnd_ssi_to_ssiu(ssi)\ 102 (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1) 103 104 static void rsnd_ssi_mode_set(struct rsnd_priv *priv, 105 struct rsnd_dai *rdai, 106 struct rsnd_ssi *ssi) 107 { 108 struct device *dev = rsnd_priv_to_dev(priv); 109 struct rsnd_mod *scu; 110 struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi); 111 int id = rsnd_mod_id(&ssi->mod); 112 u32 flags; 113 u32 val; 114 115 scu = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod)); 116 117 /* 118 * SSI_MODE0 119 */ 120 121 /* see also BUSIF_MODE */ 122 if (rsnd_scu_hpbif_is_enable(scu)) { 123 ssiu->ssi_mode0 &= ~(1 << id); 124 dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", id); 125 } else { 126 ssiu->ssi_mode0 |= (1 << id); 127 dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", id); 128 } 129 130 /* 131 * SSI_MODE1 132 */ 133 #define ssi_parent_set(p, sync, adg, ext) \ 134 do { \ 135 ssi->parent = ssiu->ssi + p; \ 136 if (rsnd_rdai_is_clk_master(rdai)) \ 137 val = adg; \ 138 else \ 139 val = ext; \ 140 if (flags & RSND_SSI_SYNC) \ 141 val |= sync; \ 142 } while (0) 143 144 flags = rsnd_ssi_mode_flags(ssi); 145 if (flags & RSND_SSI_CLK_PIN_SHARE) { 146 147 val = 0; 148 switch (id) { 149 case 1: 150 ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0)); 151 break; 152 case 2: 153 ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2)); 154 break; 155 case 4: 156 ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16)); 157 break; 158 case 8: 159 ssi_parent_set(7, 0, 0, 0); 160 break; 161 } 162 163 ssiu->ssi_mode1 |= val; 164 } 165 166 rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0); 167 rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1); 168 } 169 170 static void rsnd_ssi_status_check(struct rsnd_mod *mod, 171 u32 bit) 172 { 173 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 174 struct device *dev = rsnd_priv_to_dev(priv); 175 u32 status; 176 int i; 177 178 for (i = 0; i < 1024; i++) { 179 status = rsnd_mod_read(mod, SSISR); 180 if (status & bit) 181 return; 182 183 udelay(50); 184 } 185 186 dev_warn(dev, "status check failed\n"); 187 } 188 189 static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, 190 struct rsnd_dai_stream *io) 191 { 192 struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod); 193 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 194 struct device *dev = rsnd_priv_to_dev(priv); 195 int i, j, ret; 196 int adg_clk_div_table[] = { 197 1, 6, /* see adg.c */ 198 }; 199 int ssi_clk_mul_table[] = { 200 1, 2, 4, 8, 16, 6, 12, 201 }; 202 unsigned int main_rate; 203 unsigned int rate = rsnd_scu_get_ssi_rate(priv, &ssi->mod, runtime); 204 205 /* 206 * Find best clock, and try to start ADG 207 */ 208 for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) { 209 for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) { 210 211 /* 212 * this driver is assuming that 213 * system word is 64fs (= 2 x 32bit) 214 * see rsnd_ssi_init() 215 */ 216 main_rate = rate / adg_clk_div_table[i] 217 * 32 * 2 * ssi_clk_mul_table[j]; 218 219 ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate); 220 if (0 == ret) { 221 ssi->rate = rate; 222 ssi->cr_clk = FORCE | SWL_32 | 223 SCKD | SWSD | CKDV(j); 224 225 dev_dbg(dev, "ssi%d outputs %u Hz\n", 226 rsnd_mod_id(&ssi->mod), rate); 227 228 return 0; 229 } 230 } 231 } 232 233 dev_err(dev, "unsupported clock rate\n"); 234 return -EIO; 235 } 236 237 static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi) 238 { 239 ssi->rate = 0; 240 ssi->cr_clk = 0; 241 rsnd_adg_ssi_clk_stop(&ssi->mod); 242 } 243 244 static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi, 245 struct rsnd_dai *rdai, 246 struct rsnd_dai_stream *io) 247 { 248 struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod); 249 struct device *dev = rsnd_priv_to_dev(priv); 250 u32 cr; 251 252 if (0 == ssi->usrcnt) { 253 clk_enable(ssi->clk); 254 255 if (rsnd_rdai_is_clk_master(rdai)) { 256 if (rsnd_ssi_clk_from_parent(ssi)) 257 rsnd_ssi_hw_start(ssi->parent, rdai, io); 258 else 259 rsnd_ssi_master_clk_start(ssi, io); 260 } 261 } 262 263 cr = ssi->cr_own | 264 ssi->cr_clk | 265 ssi->cr_etc | 266 EN; 267 268 rsnd_mod_write(&ssi->mod, SSICR, cr); 269 270 ssi->usrcnt++; 271 272 dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod)); 273 } 274 275 static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi, 276 struct rsnd_dai *rdai) 277 { 278 struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod); 279 struct device *dev = rsnd_priv_to_dev(priv); 280 u32 cr; 281 282 if (0 == ssi->usrcnt) /* stop might be called without start */ 283 return; 284 285 ssi->usrcnt--; 286 287 if (0 == ssi->usrcnt) { 288 /* 289 * disable all IRQ, 290 * and, wait all data was sent 291 */ 292 cr = ssi->cr_own | 293 ssi->cr_clk; 294 295 rsnd_mod_write(&ssi->mod, SSICR, cr | EN); 296 rsnd_ssi_status_check(&ssi->mod, DIRQ); 297 298 /* 299 * disable SSI, 300 * and, wait idle state 301 */ 302 rsnd_mod_write(&ssi->mod, SSICR, cr); /* disabled all */ 303 rsnd_ssi_status_check(&ssi->mod, IIRQ); 304 305 if (rsnd_rdai_is_clk_master(rdai)) { 306 if (rsnd_ssi_clk_from_parent(ssi)) 307 rsnd_ssi_hw_stop(ssi->parent, rdai); 308 else 309 rsnd_ssi_master_clk_stop(ssi); 310 } 311 312 clk_disable(ssi->clk); 313 } 314 315 dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod)); 316 } 317 318 /* 319 * SSI mod common functions 320 */ 321 static int rsnd_ssi_init(struct rsnd_mod *mod, 322 struct rsnd_dai *rdai, 323 struct rsnd_dai_stream *io) 324 { 325 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 326 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 327 struct device *dev = rsnd_priv_to_dev(priv); 328 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 329 u32 cr; 330 331 cr = FORCE; 332 333 /* 334 * always use 32bit system word for easy clock calculation. 335 * see also rsnd_ssi_master_clk_enable() 336 */ 337 cr |= SWL_32; 338 339 /* 340 * init clock settings for SSICR 341 */ 342 switch (runtime->sample_bits) { 343 case 16: 344 cr |= DWL_16; 345 break; 346 case 32: 347 cr |= DWL_24; 348 break; 349 default: 350 return -EIO; 351 } 352 353 if (rdai->bit_clk_inv) 354 cr |= SCKP; 355 if (rdai->frm_clk_inv) 356 cr |= SWSP; 357 if (rdai->data_alignment) 358 cr |= SDTA; 359 if (rdai->sys_delay) 360 cr |= DEL; 361 if (rsnd_dai_is_play(rdai, io)) 362 cr |= TRMD; 363 364 /* 365 * set ssi parameter 366 */ 367 ssi->rdai = rdai; 368 ssi->io = io; 369 ssi->cr_own = cr; 370 ssi->err = -1; /* ignore 1st error */ 371 372 rsnd_ssi_mode_set(priv, rdai, ssi); 373 374 dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); 375 376 return 0; 377 } 378 379 static int rsnd_ssi_quit(struct rsnd_mod *mod, 380 struct rsnd_dai *rdai, 381 struct rsnd_dai_stream *io) 382 { 383 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 384 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 385 struct device *dev = rsnd_priv_to_dev(priv); 386 387 dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); 388 389 if (ssi->err > 0) 390 dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err); 391 392 ssi->rdai = NULL; 393 ssi->io = NULL; 394 ssi->cr_own = 0; 395 ssi->err = 0; 396 397 return 0; 398 } 399 400 static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status) 401 { 402 /* under/over flow error */ 403 if (status & (UIRQ | OIRQ)) { 404 ssi->err++; 405 406 /* clear error status */ 407 rsnd_mod_write(&ssi->mod, SSISR, 0); 408 } 409 } 410 411 /* 412 * SSI PIO 413 */ 414 static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data) 415 { 416 struct rsnd_ssi *ssi = data; 417 struct rsnd_dai_stream *io = ssi->io; 418 u32 status = rsnd_mod_read(&ssi->mod, SSISR); 419 irqreturn_t ret = IRQ_NONE; 420 421 if (io && (status & DIRQ)) { 422 struct rsnd_dai *rdai = ssi->rdai; 423 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 424 u32 *buf = (u32 *)(runtime->dma_area + 425 rsnd_dai_pointer_offset(io, 0)); 426 427 rsnd_ssi_record_error(ssi, status); 428 429 /* 430 * 8/16/32 data can be assesse to TDR/RDR register 431 * directly as 32bit data 432 * see rsnd_ssi_init() 433 */ 434 if (rsnd_dai_is_play(rdai, io)) 435 rsnd_mod_write(&ssi->mod, SSITDR, *buf); 436 else 437 *buf = rsnd_mod_read(&ssi->mod, SSIRDR); 438 439 rsnd_dai_pointer_update(io, sizeof(*buf)); 440 441 ret = IRQ_HANDLED; 442 } 443 444 return ret; 445 } 446 447 static int rsnd_ssi_pio_start(struct rsnd_mod *mod, 448 struct rsnd_dai *rdai, 449 struct rsnd_dai_stream *io) 450 { 451 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 452 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 453 struct device *dev = rsnd_priv_to_dev(priv); 454 455 /* enable PIO IRQ */ 456 ssi->cr_etc = UIEN | OIEN | DIEN; 457 458 /* enable PIO interrupt if gen2 */ 459 if (rsnd_is_gen2(priv)) 460 rsnd_mod_write(&ssi->mod, INT_ENABLE, 0x0f000000); 461 462 rsnd_ssi_hw_start(ssi, rdai, io); 463 464 dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); 465 466 return 0; 467 } 468 469 static int rsnd_ssi_pio_stop(struct rsnd_mod *mod, 470 struct rsnd_dai *rdai, 471 struct rsnd_dai_stream *io) 472 { 473 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 474 struct device *dev = rsnd_priv_to_dev(priv); 475 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 476 477 dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); 478 479 ssi->cr_etc = 0; 480 481 rsnd_ssi_hw_stop(ssi, rdai); 482 483 return 0; 484 } 485 486 static struct rsnd_mod_ops rsnd_ssi_pio_ops = { 487 .name = "ssi (pio)", 488 .init = rsnd_ssi_init, 489 .quit = rsnd_ssi_quit, 490 .start = rsnd_ssi_pio_start, 491 .stop = rsnd_ssi_pio_stop, 492 }; 493 494 static int rsnd_ssi_dma_inquiry(struct rsnd_dma *dma, dma_addr_t *buf, int *len) 495 { 496 struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma); 497 struct rsnd_dai_stream *io = ssi->io; 498 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 499 500 *len = io->byte_per_period; 501 *buf = runtime->dma_addr + 502 rsnd_dai_pointer_offset(io, ssi->dma_offset + *len); 503 ssi->dma_offset = *len; /* it cares A/B plane */ 504 505 return 0; 506 } 507 508 static int rsnd_ssi_dma_complete(struct rsnd_dma *dma) 509 { 510 struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma); 511 struct rsnd_dai_stream *io = ssi->io; 512 u32 status = rsnd_mod_read(&ssi->mod, SSISR); 513 514 rsnd_ssi_record_error(ssi, status); 515 516 rsnd_dai_pointer_update(ssi->io, io->byte_per_period); 517 518 return 0; 519 } 520 521 static int rsnd_ssi_dma_start(struct rsnd_mod *mod, 522 struct rsnd_dai *rdai, 523 struct rsnd_dai_stream *io) 524 { 525 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 526 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod); 527 528 /* enable DMA transfer */ 529 ssi->cr_etc = DMEN; 530 ssi->dma_offset = 0; 531 532 rsnd_dma_start(dma); 533 534 rsnd_ssi_hw_start(ssi, ssi->rdai, io); 535 536 /* enable WS continue */ 537 if (rsnd_rdai_is_clk_master(rdai)) 538 rsnd_mod_write(&ssi->mod, SSIWSR, CONT); 539 540 return 0; 541 } 542 543 static int rsnd_ssi_dma_stop(struct rsnd_mod *mod, 544 struct rsnd_dai *rdai, 545 struct rsnd_dai_stream *io) 546 { 547 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); 548 struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod); 549 550 ssi->cr_etc = 0; 551 552 rsnd_ssi_hw_stop(ssi, rdai); 553 554 rsnd_dma_stop(dma); 555 556 return 0; 557 } 558 559 static struct rsnd_mod_ops rsnd_ssi_dma_ops = { 560 .name = "ssi (dma)", 561 .init = rsnd_ssi_init, 562 .quit = rsnd_ssi_quit, 563 .start = rsnd_ssi_dma_start, 564 .stop = rsnd_ssi_dma_stop, 565 }; 566 567 /* 568 * Non SSI 569 */ 570 static int rsnd_ssi_non(struct rsnd_mod *mod, 571 struct rsnd_dai *rdai, 572 struct rsnd_dai_stream *io) 573 { 574 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 575 struct device *dev = rsnd_priv_to_dev(priv); 576 577 dev_dbg(dev, "%s\n", __func__); 578 579 return 0; 580 } 581 582 static struct rsnd_mod_ops rsnd_ssi_non_ops = { 583 .name = "ssi (non)", 584 .init = rsnd_ssi_non, 585 .quit = rsnd_ssi_non, 586 .start = rsnd_ssi_non, 587 .stop = rsnd_ssi_non, 588 }; 589 590 /* 591 * ssi mod function 592 */ 593 struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv, 594 int dai_id, int is_play) 595 { 596 struct rsnd_ssi *ssi; 597 int i, has_play; 598 599 is_play = !!is_play; 600 601 for_each_rsnd_ssi(ssi, priv, i) { 602 if (rsnd_ssi_dai_id(ssi) != dai_id) 603 continue; 604 605 has_play = !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY); 606 607 if (is_play == has_play) 608 return &ssi->mod; 609 } 610 611 return NULL; 612 } 613 614 struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id) 615 { 616 if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv))) 617 id = 0; 618 619 return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod; 620 } 621 622 int rsnd_ssi_probe(struct platform_device *pdev, 623 struct rcar_snd_info *info, 624 struct rsnd_priv *priv) 625 { 626 struct rsnd_ssi_platform_info *pinfo; 627 struct device *dev = rsnd_priv_to_dev(priv); 628 struct rsnd_mod_ops *ops; 629 struct clk *clk; 630 struct rsnd_ssiu *ssiu; 631 struct rsnd_ssi *ssi; 632 char name[RSND_SSI_NAME_SIZE]; 633 int i, nr, ret; 634 635 /* 636 * init SSI 637 */ 638 nr = info->ssi_info_nr; 639 ssiu = devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr), 640 GFP_KERNEL); 641 if (!ssiu) { 642 dev_err(dev, "SSI allocate failed\n"); 643 return -ENOMEM; 644 } 645 646 priv->ssiu = ssiu; 647 ssiu->ssi = (struct rsnd_ssi *)(ssiu + 1); 648 ssiu->ssi_nr = nr; 649 650 for_each_rsnd_ssi(ssi, priv, i) { 651 pinfo = &info->ssi_info[i]; 652 653 snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i); 654 655 clk = devm_clk_get(dev, name); 656 if (IS_ERR(clk)) 657 return PTR_ERR(clk); 658 659 ssi->info = pinfo; 660 ssi->clk = clk; 661 662 ops = &rsnd_ssi_non_ops; 663 664 /* 665 * SSI DMA case 666 */ 667 if (pinfo->dma_id > 0) { 668 ret = rsnd_dma_init( 669 priv, rsnd_mod_to_dma(&ssi->mod), 670 (rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY), 671 pinfo->dma_id, 672 rsnd_ssi_dma_inquiry, 673 rsnd_ssi_dma_complete); 674 if (ret < 0) 675 dev_info(dev, "SSI DMA failed. try PIO transter\n"); 676 else 677 ops = &rsnd_ssi_dma_ops; 678 679 dev_dbg(dev, "SSI%d use DMA transfer\n", i); 680 } 681 682 /* 683 * SSI PIO case 684 */ 685 if (!rsnd_ssi_dma_available(ssi) && 686 rsnd_ssi_pio_available(ssi)) { 687 ret = devm_request_irq(dev, pinfo->pio_irq, 688 &rsnd_ssi_pio_interrupt, 689 IRQF_SHARED, 690 dev_name(dev), ssi); 691 if (ret) { 692 dev_err(dev, "SSI request interrupt failed\n"); 693 return ret; 694 } 695 696 ops = &rsnd_ssi_pio_ops; 697 698 dev_dbg(dev, "SSI%d use PIO transfer\n", i); 699 } 700 701 rsnd_mod_init(priv, &ssi->mod, ops, i); 702 } 703 704 dev_dbg(dev, "ssi probed\n"); 705 706 return 0; 707 } 708 709 void rsnd_ssi_remove(struct platform_device *pdev, 710 struct rsnd_priv *priv) 711 { 712 struct rsnd_ssi *ssi; 713 int i; 714 715 for_each_rsnd_ssi(ssi, priv, i) { 716 if (rsnd_ssi_dma_available(ssi)) 717 rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod)); 718 } 719 720 } 721