1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // SH7760 ("camelot") DMABRG audio DMA unit support 4 // 5 // Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net> 6 // 7 // The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which 8 // trigger an interrupt when one half of the programmed transfer size 9 // has been xmitted. 10 // 11 // FIXME: little-endian only for now 12 13 #include <linux/module.h> 14 #include <linux/gfp.h> 15 #include <linux/init.h> 16 #include <linux/platform_device.h> 17 #include <linux/dma-mapping.h> 18 #include <sound/core.h> 19 #include <sound/pcm.h> 20 #include <sound/pcm_params.h> 21 #include <sound/soc.h> 22 #include <asm/dmabrg.h> 23 24 25 /* registers and bits */ 26 #define BRGATXSAR 0x00 27 #define BRGARXDAR 0x04 28 #define BRGATXTCR 0x08 29 #define BRGARXTCR 0x0C 30 #define BRGACR 0x10 31 #define BRGATXTCNT 0x14 32 #define BRGARXTCNT 0x18 33 34 #define ACR_RAR (1 << 18) 35 #define ACR_RDS (1 << 17) 36 #define ACR_RDE (1 << 16) 37 #define ACR_TAR (1 << 2) 38 #define ACR_TDS (1 << 1) 39 #define ACR_TDE (1 << 0) 40 41 /* receiver/transmitter data alignment */ 42 #define ACR_RAM_NONE (0 << 24) 43 #define ACR_RAM_4BYTE (1 << 24) 44 #define ACR_RAM_2WORD (2 << 24) 45 #define ACR_TAM_NONE (0 << 8) 46 #define ACR_TAM_4BYTE (1 << 8) 47 #define ACR_TAM_2WORD (2 << 8) 48 49 50 struct camelot_pcm { 51 unsigned long mmio; /* DMABRG audio channel control reg MMIO */ 52 unsigned int txid; /* ID of first DMABRG IRQ for this unit */ 53 54 struct snd_pcm_substream *tx_ss; 55 unsigned long tx_period_size; 56 unsigned int tx_period; 57 58 struct snd_pcm_substream *rx_ss; 59 unsigned long rx_period_size; 60 unsigned int rx_period; 61 62 } cam_pcm_data[2] = { 63 { 64 .mmio = 0xFE3C0040, 65 .txid = DMABRGIRQ_A0TXF, 66 }, 67 { 68 .mmio = 0xFE3C0060, 69 .txid = DMABRGIRQ_A1TXF, 70 }, 71 }; 72 73 #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x))) 74 75 /* 76 * set a minimum of 16kb per period, to avoid interrupt-"storm" and 77 * resulting skipping. In general, the bigger the minimum size, the 78 * better for overall system performance. (The SH7760 is a puny CPU 79 * with a slow SDRAM interface and poor internal bus bandwidth, 80 * *especially* when the LCDC is active). The minimum for the DMAC 81 * is 8 bytes; 16kbytes are enough to get skip-free playback of a 82 * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain 83 * reasonable responsiveness in MPlayer. 84 */ 85 #define DMABRG_PERIOD_MIN 16 * 1024 86 #define DMABRG_PERIOD_MAX 0x03fffffc 87 #define DMABRG_PREALLOC_BUFFER 32 * 1024 88 #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024 89 90 static const struct snd_pcm_hardware camelot_pcm_hardware = { 91 .info = (SNDRV_PCM_INFO_MMAP | 92 SNDRV_PCM_INFO_INTERLEAVED | 93 SNDRV_PCM_INFO_BLOCK_TRANSFER | 94 SNDRV_PCM_INFO_MMAP_VALID | 95 SNDRV_PCM_INFO_BATCH), 96 .buffer_bytes_max = DMABRG_PERIOD_MAX, 97 .period_bytes_min = DMABRG_PERIOD_MIN, 98 .period_bytes_max = DMABRG_PERIOD_MAX / 2, 99 .periods_min = 2, 100 .periods_max = 2, 101 .fifo_size = 128, 102 }; 103 104 static void camelot_txdma(void *data) 105 { 106 struct camelot_pcm *cam = data; 107 cam->tx_period ^= 1; 108 snd_pcm_period_elapsed(cam->tx_ss); 109 } 110 111 static void camelot_rxdma(void *data) 112 { 113 struct camelot_pcm *cam = data; 114 cam->rx_period ^= 1; 115 snd_pcm_period_elapsed(cam->rx_ss); 116 } 117 118 static int camelot_pcm_open(struct snd_soc_component *component, 119 struct snd_pcm_substream *substream) 120 { 121 struct snd_soc_pcm_runtime *rtd = substream->private_data; 122 struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; 123 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 124 int ret, dmairq; 125 126 snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware); 127 128 /* DMABRG buffer half/full events */ 129 dmairq = (recv) ? cam->txid + 2 : cam->txid; 130 if (recv) { 131 cam->rx_ss = substream; 132 ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam); 133 if (unlikely(ret)) { 134 pr_debug("audio unit %d irqs already taken!\n", 135 rtd->cpu_dai->id); 136 return -EBUSY; 137 } 138 (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam); 139 } else { 140 cam->tx_ss = substream; 141 ret = dmabrg_request_irq(dmairq, camelot_txdma, cam); 142 if (unlikely(ret)) { 143 pr_debug("audio unit %d irqs already taken!\n", 144 rtd->cpu_dai->id); 145 return -EBUSY; 146 } 147 (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam); 148 } 149 return 0; 150 } 151 152 static int camelot_pcm_close(struct snd_soc_component *component, 153 struct snd_pcm_substream *substream) 154 { 155 struct snd_soc_pcm_runtime *rtd = substream->private_data; 156 struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; 157 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 158 int dmairq; 159 160 dmairq = (recv) ? cam->txid + 2 : cam->txid; 161 162 if (recv) 163 cam->rx_ss = NULL; 164 else 165 cam->tx_ss = NULL; 166 167 dmabrg_free_irq(dmairq + 1); 168 dmabrg_free_irq(dmairq); 169 170 return 0; 171 } 172 173 static int camelot_hw_params(struct snd_soc_component *component, 174 struct snd_pcm_substream *substream, 175 struct snd_pcm_hw_params *hw_params) 176 { 177 struct snd_soc_pcm_runtime *rtd = substream->private_data; 178 struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; 179 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 180 int ret; 181 182 if (recv) { 183 cam->rx_period_size = params_period_bytes(hw_params); 184 cam->rx_period = 0; 185 } else { 186 cam->tx_period_size = params_period_bytes(hw_params); 187 cam->tx_period = 0; 188 } 189 return 0; 190 } 191 192 static int camelot_prepare(struct snd_soc_component *component, 193 struct snd_pcm_substream *substream) 194 { 195 struct snd_pcm_runtime *runtime = substream->runtime; 196 struct snd_soc_pcm_runtime *rtd = substream->private_data; 197 struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; 198 199 pr_debug("PCM data: addr 0x%08lx len %d\n", 200 (u32)runtime->dma_addr, runtime->dma_bytes); 201 202 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 203 BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area; 204 BRGREG(BRGATXTCR) = runtime->dma_bytes; 205 } else { 206 BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area; 207 BRGREG(BRGARXTCR) = runtime->dma_bytes; 208 } 209 210 return 0; 211 } 212 213 static inline void dmabrg_play_dma_start(struct camelot_pcm *cam) 214 { 215 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 216 /* start DMABRG engine: XFER start, auto-addr-reload */ 217 BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; 218 } 219 220 static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam) 221 { 222 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 223 /* forcibly terminate data transmission */ 224 BRGREG(BRGACR) = acr | ACR_TDS; 225 } 226 227 static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam) 228 { 229 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 230 /* start DMABRG engine: recv start, auto-reload */ 231 BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; 232 } 233 234 static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam) 235 { 236 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); 237 /* forcibly terminate data receiver */ 238 BRGREG(BRGACR) = acr | ACR_RDS; 239 } 240 241 static int camelot_trigger(struct snd_soc_component *component, 242 struct snd_pcm_substream *substream, int cmd) 243 { 244 struct snd_soc_pcm_runtime *rtd = substream->private_data; 245 struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; 246 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 247 248 switch (cmd) { 249 case SNDRV_PCM_TRIGGER_START: 250 if (recv) 251 dmabrg_rec_dma_start(cam); 252 else 253 dmabrg_play_dma_start(cam); 254 break; 255 case SNDRV_PCM_TRIGGER_STOP: 256 if (recv) 257 dmabrg_rec_dma_stop(cam); 258 else 259 dmabrg_play_dma_stop(cam); 260 break; 261 default: 262 return -EINVAL; 263 } 264 265 return 0; 266 } 267 268 static snd_pcm_uframes_t camelot_pos(struct snd_soc_component *component, 269 struct snd_pcm_substream *substream) 270 { 271 struct snd_pcm_runtime *runtime = substream->runtime; 272 struct snd_soc_pcm_runtime *rtd = substream->private_data; 273 struct camelot_pcm *cam = &cam_pcm_data[rtd->cpu_dai->id]; 274 int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1; 275 unsigned long pos; 276 277 /* cannot use the DMABRG pointer register: under load, by the 278 * time ALSA comes around to read the register, it is already 279 * far ahead (or worse, already done with the fragment) of the 280 * position at the time the IRQ was triggered, which results in 281 * fast-playback sound in my test application (ScummVM) 282 */ 283 if (recv) 284 pos = cam->rx_period ? cam->rx_period_size : 0; 285 else 286 pos = cam->tx_period ? cam->tx_period_size : 0; 287 288 return bytes_to_frames(runtime, pos); 289 } 290 291 static int camelot_pcm_new(struct snd_soc_component *component, 292 struct snd_soc_pcm_runtime *rtd) 293 { 294 struct snd_pcm *pcm = rtd->pcm; 295 296 /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel 297 * in MMAP mode (i.e. aplay -M) 298 */ 299 snd_pcm_set_managed_buffer_all(pcm, 300 SNDRV_DMA_TYPE_CONTINUOUS, 301 NULL, 302 DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX); 303 304 return 0; 305 } 306 307 static const struct snd_soc_component_driver sh7760_soc_component = { 308 .open = camelot_pcm_open, 309 .close = camelot_pcm_close, 310 .hw_params = camelot_hw_params, 311 .prepare = camelot_prepare, 312 .trigger = camelot_trigger, 313 .pointer = camelot_pos, 314 .pcm_construct = camelot_pcm_new, 315 }; 316 317 static int sh7760_soc_platform_probe(struct platform_device *pdev) 318 { 319 return devm_snd_soc_register_component(&pdev->dev, &sh7760_soc_component, 320 NULL, 0); 321 } 322 323 static struct platform_driver sh7760_pcm_driver = { 324 .driver = { 325 .name = "sh7760-pcm-audio", 326 }, 327 328 .probe = sh7760_soc_platform_probe, 329 }; 330 331 module_platform_driver(sh7760_pcm_driver); 332 333 MODULE_LICENSE("GPL v2"); 334 MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver"); 335 MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>"); 336