1d2ec3abaSSangbeom Kim /*
2d2ec3abaSSangbeom Kim  *  sound/soc/samsung/smdk_wm8994pcm.c
3d2ec3abaSSangbeom Kim  *
4d2ec3abaSSangbeom Kim  *  Copyright (c) 2011 Samsung Electronics Co., Ltd
5d2ec3abaSSangbeom Kim  *		http://www.samsung.com
6d2ec3abaSSangbeom Kim  *
7d2ec3abaSSangbeom Kim  *  This program is free software; you can redistribute  it and/or  modify it
8d2ec3abaSSangbeom Kim  *  under  the terms of  the GNU General  Public License as published by the
9d2ec3abaSSangbeom Kim  *  Free Software Foundation;  either version 2 of the  License, or (at your
10d2ec3abaSSangbeom Kim  *  option) any later version.
11d2ec3abaSSangbeom Kim  */
12da155d5bSPaul Gortmaker #include <linux/module.h>
13d2ec3abaSSangbeom Kim #include <sound/soc.h>
14d2ec3abaSSangbeom Kim #include <sound/pcm.h>
15d2ec3abaSSangbeom Kim #include <sound/pcm_params.h>
16d2ec3abaSSangbeom Kim 
17d2ec3abaSSangbeom Kim #include "../codecs/wm8994.h"
18d2ec3abaSSangbeom Kim #include "dma.h"
19d2ec3abaSSangbeom Kim #include "pcm.h"
20d2ec3abaSSangbeom Kim 
21d2ec3abaSSangbeom Kim /*
22d2ec3abaSSangbeom Kim  * Board Settings:
23d2ec3abaSSangbeom Kim  *  o '1' means 'ON'
24d2ec3abaSSangbeom Kim  *  o '0' means 'OFF'
25d2ec3abaSSangbeom Kim  *  o 'X' means 'Don't care'
26d2ec3abaSSangbeom Kim  *
27d2ec3abaSSangbeom Kim  * SMDKC210, SMDKV310: CFG3- 1001, CFG5-1000, CFG7-111111
28d2ec3abaSSangbeom Kim  */
29d2ec3abaSSangbeom Kim 
30d2ec3abaSSangbeom Kim /*
31d2ec3abaSSangbeom Kim  * Configure audio route as :-
32d2ec3abaSSangbeom Kim  * $ amixer sset 'DAC1' on,on
33d2ec3abaSSangbeom Kim  * $ amixer sset 'Right Headphone Mux' 'DAC'
34d2ec3abaSSangbeom Kim  * $ amixer sset 'Left Headphone Mux' 'DAC'
35d2ec3abaSSangbeom Kim  * $ amixer sset 'DAC1R Mixer AIF1.1' on
36d2ec3abaSSangbeom Kim  * $ amixer sset 'DAC1L Mixer AIF1.1' on
37d2ec3abaSSangbeom Kim  * $ amixer sset 'IN2L' on
38d2ec3abaSSangbeom Kim  * $ amixer sset 'IN2L PGA IN2LN' on
39d2ec3abaSSangbeom Kim  * $ amixer sset 'MIXINL IN2L' on
40d2ec3abaSSangbeom Kim  * $ amixer sset 'AIF1ADC1L Mixer ADC/DMIC' on
41d2ec3abaSSangbeom Kim  * $ amixer sset 'IN2R' on
42d2ec3abaSSangbeom Kim  * $ amixer sset 'IN2R PGA IN2RN' on
43d2ec3abaSSangbeom Kim  * $ amixer sset 'MIXINR IN2R' on
44d2ec3abaSSangbeom Kim  * $ amixer sset 'AIF1ADC1R Mixer ADC/DMIC' on
45d2ec3abaSSangbeom Kim  */
46d2ec3abaSSangbeom Kim 
47d2ec3abaSSangbeom Kim /* SMDK has a 16.9344MHZ crystal attached to WM8994 */
48d2ec3abaSSangbeom Kim #define SMDK_WM8994_FREQ 16934400
49d2ec3abaSSangbeom Kim 
50d2ec3abaSSangbeom Kim static int smdk_wm8994_pcm_hw_params(struct snd_pcm_substream *substream,
51d2ec3abaSSangbeom Kim 			      struct snd_pcm_hw_params *params)
52d2ec3abaSSangbeom Kim {
53d2ec3abaSSangbeom Kim 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
54d2ec3abaSSangbeom Kim 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
55d2ec3abaSSangbeom Kim 	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
56d2ec3abaSSangbeom Kim 	unsigned long mclk_freq;
57d2ec3abaSSangbeom Kim 	int rfs, ret;
58d2ec3abaSSangbeom Kim 
59d2ec3abaSSangbeom Kim 	switch(params_rate(params)) {
60d2ec3abaSSangbeom Kim 	case 8000:
61d2ec3abaSSangbeom Kim 		rfs = 512;
62d2ec3abaSSangbeom Kim 		break;
63d2ec3abaSSangbeom Kim 	default:
64d2ec3abaSSangbeom Kim 		dev_err(cpu_dai->dev, "%s:%d Sampling Rate %u not supported!\n",
65d2ec3abaSSangbeom Kim 		__func__, __LINE__, params_rate(params));
66d2ec3abaSSangbeom Kim 		return -EINVAL;
67d2ec3abaSSangbeom Kim 	}
68d2ec3abaSSangbeom Kim 
69d2ec3abaSSangbeom Kim 	mclk_freq = params_rate(params) * rfs;
70d2ec3abaSSangbeom Kim 
71d2ec3abaSSangbeom Kim 	/* Set the codec DAI configuration */
72d2ec3abaSSangbeom Kim 	ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B
73d2ec3abaSSangbeom Kim 				| SND_SOC_DAIFMT_IB_NF
74d2ec3abaSSangbeom Kim 				| SND_SOC_DAIFMT_CBS_CFS);
75d2ec3abaSSangbeom Kim 	if (ret < 0)
76d2ec3abaSSangbeom Kim 		return ret;
77d2ec3abaSSangbeom Kim 
78d2ec3abaSSangbeom Kim 	/* Set the cpu DAI configuration */
79d2ec3abaSSangbeom Kim 	ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_DSP_B
80d2ec3abaSSangbeom Kim 				| SND_SOC_DAIFMT_IB_NF
81d2ec3abaSSangbeom Kim 				| SND_SOC_DAIFMT_CBS_CFS);
82d2ec3abaSSangbeom Kim 	if (ret < 0)
83d2ec3abaSSangbeom Kim 		return ret;
84d2ec3abaSSangbeom Kim 
85d2ec3abaSSangbeom Kim 	ret = snd_soc_dai_set_sysclk(codec_dai, WM8994_SYSCLK_FLL1,
86d2ec3abaSSangbeom Kim 					mclk_freq, SND_SOC_CLOCK_IN);
87d2ec3abaSSangbeom Kim 	if (ret < 0)
88d2ec3abaSSangbeom Kim 		return ret;
89d2ec3abaSSangbeom Kim 
90d2ec3abaSSangbeom Kim 	ret = snd_soc_dai_set_pll(codec_dai, WM8994_FLL1, WM8994_FLL_SRC_MCLK1,
91d2ec3abaSSangbeom Kim 					SMDK_WM8994_FREQ, mclk_freq);
92d2ec3abaSSangbeom Kim 	if (ret < 0)
93d2ec3abaSSangbeom Kim 		return ret;
94d2ec3abaSSangbeom Kim 
95d2ec3abaSSangbeom Kim 	/* Set PCM source clock on CPU */
96d2ec3abaSSangbeom Kim 	ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
97d2ec3abaSSangbeom Kim 					mclk_freq, SND_SOC_CLOCK_IN);
98d2ec3abaSSangbeom Kim 	if (ret < 0)
99d2ec3abaSSangbeom Kim 		return ret;
100d2ec3abaSSangbeom Kim 
101d2ec3abaSSangbeom Kim 	/* Set SCLK_DIV for making bclk */
102d2ec3abaSSangbeom Kim 	ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
103d2ec3abaSSangbeom Kim 	if (ret < 0)
104d2ec3abaSSangbeom Kim 		return ret;
105d2ec3abaSSangbeom Kim 
106d2ec3abaSSangbeom Kim 	return 0;
107d2ec3abaSSangbeom Kim }
108d2ec3abaSSangbeom Kim 
109d2ec3abaSSangbeom Kim static struct snd_soc_ops smdk_wm8994_pcm_ops = {
110d2ec3abaSSangbeom Kim 	.hw_params = smdk_wm8994_pcm_hw_params,
111d2ec3abaSSangbeom Kim };
112d2ec3abaSSangbeom Kim 
113d2ec3abaSSangbeom Kim static struct snd_soc_dai_link smdk_dai[] = {
114d2ec3abaSSangbeom Kim 	{
115d2ec3abaSSangbeom Kim 		.name = "WM8994 PAIF PCM",
116d2ec3abaSSangbeom Kim 		.stream_name = "Primary PCM",
117d2ec3abaSSangbeom Kim 		.cpu_dai_name = "samsung-pcm.0",
118d2ec3abaSSangbeom Kim 		.codec_dai_name = "wm8994-aif1",
119a08485d8SPadmavathi Venna 		.platform_name = "samsung-pcm.0",
120d2ec3abaSSangbeom Kim 		.codec_name = "wm8994-codec",
121d2ec3abaSSangbeom Kim 		.ops = &smdk_wm8994_pcm_ops,
122d2ec3abaSSangbeom Kim 	},
123d2ec3abaSSangbeom Kim };
124d2ec3abaSSangbeom Kim 
125d2ec3abaSSangbeom Kim static struct snd_soc_card smdk_pcm = {
126d2ec3abaSSangbeom Kim 	.name = "SMDK-PCM",
127095d79dcSAxel Lin 	.owner = THIS_MODULE,
128d2ec3abaSSangbeom Kim 	.dai_link = smdk_dai,
129d2ec3abaSSangbeom Kim 	.num_links = 1,
130d2ec3abaSSangbeom Kim };
131d2ec3abaSSangbeom Kim 
132fdca21adSBill Pemberton static int snd_smdk_probe(struct platform_device *pdev)
133d2ec3abaSSangbeom Kim {
134d2ec3abaSSangbeom Kim 	int ret = 0;
135d2ec3abaSSangbeom Kim 
136d2ec3abaSSangbeom Kim 	smdk_pcm.dev = &pdev->dev;
137c583883eSTushar Behera 	ret = devm_snd_soc_register_card(&pdev->dev, &smdk_pcm);
138c583883eSTushar Behera 	if (ret)
139d2ec3abaSSangbeom Kim 		dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
140c583883eSTushar Behera 
141d2ec3abaSSangbeom Kim 	return ret;
142d2ec3abaSSangbeom Kim }
143d2ec3abaSSangbeom Kim 
144d2ec3abaSSangbeom Kim static struct platform_driver snd_smdk_driver = {
145d2ec3abaSSangbeom Kim 	.driver = {
146d2ec3abaSSangbeom Kim 		.owner = THIS_MODULE,
147d2ec3abaSSangbeom Kim 		.name = "samsung-smdk-pcm",
148d2ec3abaSSangbeom Kim 	},
149d2ec3abaSSangbeom Kim 	.probe = snd_smdk_probe,
150d2ec3abaSSangbeom Kim };
151d2ec3abaSSangbeom Kim 
1521175f711SAxel Lin module_platform_driver(snd_smdk_driver);
153d2ec3abaSSangbeom Kim 
154d2ec3abaSSangbeom Kim MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
155d2ec3abaSSangbeom Kim MODULE_DESCRIPTION("ALSA SoC SMDK WM8994 for PCM");
156d2ec3abaSSangbeom Kim MODULE_LICENSE("GPL");
157