xref: /openbmc/linux/sound/soc/samsung/idma.c (revision d78c317f) 
1 /*
2  * sound/soc/samsung/idma.c
3  *
4  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5  *		http://www.samsung.com
6  *
7  * I2S0's Internal DMA driver
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/slab.h>
18 #include <linux/module.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 
23 #include "i2s.h"
24 #include "idma.h"
25 #include "dma.h"
26 #include "i2s-regs.h"
27 
28 #define ST_RUNNING		(1<<0)
29 #define ST_OPENED		(1<<1)
30 
31 static const struct snd_pcm_hardware idma_hardware = {
32 	.info = SNDRV_PCM_INFO_INTERLEAVED |
33 		    SNDRV_PCM_INFO_BLOCK_TRANSFER |
34 		    SNDRV_PCM_INFO_MMAP |
35 		    SNDRV_PCM_INFO_MMAP_VALID |
36 		    SNDRV_PCM_INFO_PAUSE |
37 		    SNDRV_PCM_INFO_RESUME,
38 	.formats = SNDRV_PCM_FMTBIT_S16_LE |
39 		    SNDRV_PCM_FMTBIT_U16_LE |
40 		    SNDRV_PCM_FMTBIT_S24_LE |
41 		    SNDRV_PCM_FMTBIT_U24_LE |
42 		    SNDRV_PCM_FMTBIT_U8 |
43 		    SNDRV_PCM_FMTBIT_S8,
44 	.channels_min = 2,
45 	.channels_max = 2,
46 	.buffer_bytes_max = MAX_IDMA_BUFFER,
47 	.period_bytes_min = 128,
48 	.period_bytes_max = MAX_IDMA_PERIOD,
49 	.periods_min = 1,
50 	.periods_max = 2,
51 };
52 
53 struct idma_ctrl {
54 	spinlock_t	lock;
55 	int		state;
56 	dma_addr_t	start;
57 	dma_addr_t	pos;
58 	dma_addr_t	end;
59 	dma_addr_t	period;
60 	dma_addr_t	periodsz;
61 	void		*token;
62 	void		(*cb)(void *dt, int bytes_xfer);
63 };
64 
65 static struct idma_info {
66 	spinlock_t	lock;
67 	void		 __iomem  *regs;
68 	dma_addr_t	lp_tx_addr;
69 } idma;
70 
71 static void idma_getpos(dma_addr_t *src)
72 {
73 	*src = idma.lp_tx_addr +
74 		(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
75 }
76 
77 static int idma_enqueue(struct snd_pcm_substream *substream)
78 {
79 	struct snd_pcm_runtime *runtime = substream->runtime;
80 	struct idma_ctrl *prtd = substream->runtime->private_data;
81 	u32 val;
82 
83 	spin_lock(&prtd->lock);
84 	prtd->token = (void *) substream;
85 	spin_unlock(&prtd->lock);
86 
87 	/* Internal DMA Level0 Interrupt Address */
88 	val = idma.lp_tx_addr + prtd->periodsz;
89 	writel(val, idma.regs + I2SLVL0ADDR);
90 
91 	/* Start address0 of I2S internal DMA operation. */
92 	val = idma.lp_tx_addr;
93 	writel(val, idma.regs + I2SSTR0);
94 
95 	/*
96 	 * Transfer block size for I2S internal DMA.
97 	 * Should decide transfer size before start dma operation
98 	 */
99 	val = readl(idma.regs + I2SSIZE);
100 	val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
101 	val |= (((runtime->dma_bytes >> 2) &
102 			I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
103 	writel(val, idma.regs + I2SSIZE);
104 
105 	val = readl(idma.regs + I2SAHB);
106 	val |= AHB_INTENLVL0;
107 	writel(val, idma.regs + I2SAHB);
108 
109 	return 0;
110 }
111 
112 static void idma_setcallbk(struct snd_pcm_substream *substream,
113 				void (*cb)(void *, int))
114 {
115 	struct idma_ctrl *prtd = substream->runtime->private_data;
116 
117 	spin_lock(&prtd->lock);
118 	prtd->cb = cb;
119 	spin_unlock(&prtd->lock);
120 }
121 
122 static void idma_control(int op)
123 {
124 	u32 val = readl(idma.regs + I2SAHB);
125 
126 	spin_lock(&idma.lock);
127 
128 	switch (op) {
129 	case LPAM_DMA_START:
130 		val |= (AHB_INTENLVL0 | AHB_DMAEN);
131 		break;
132 	case LPAM_DMA_STOP:
133 		val &= ~(AHB_INTENLVL0 | AHB_DMAEN);
134 		break;
135 	default:
136 		spin_unlock(&idma.lock);
137 		return;
138 	}
139 
140 	writel(val, idma.regs + I2SAHB);
141 	spin_unlock(&idma.lock);
142 }
143 
144 static void idma_done(void *id, int bytes_xfer)
145 {
146 	struct snd_pcm_substream *substream = id;
147 	struct idma_ctrl *prtd = substream->runtime->private_data;
148 
149 	if (prtd && (prtd->state & ST_RUNNING))
150 		snd_pcm_period_elapsed(substream);
151 }
152 
153 static int idma_hw_params(struct snd_pcm_substream *substream,
154 				struct snd_pcm_hw_params *params)
155 {
156 	struct snd_pcm_runtime *runtime = substream->runtime;
157 	struct idma_ctrl *prtd = substream->runtime->private_data;
158 	u32 mod = readl(idma.regs + I2SMOD);
159 	u32 ahb = readl(idma.regs + I2SAHB);
160 
161 	ahb |= (AHB_DMARLD | AHB_INTMASK);
162 	mod |= MOD_TXS_IDMA;
163 	writel(ahb, idma.regs + I2SAHB);
164 	writel(mod, idma.regs + I2SMOD);
165 
166 	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
167 	runtime->dma_bytes = params_buffer_bytes(params);
168 
169 	prtd->start = prtd->pos = runtime->dma_addr;
170 	prtd->period = params_periods(params);
171 	prtd->periodsz = params_period_bytes(params);
172 	prtd->end = runtime->dma_addr + runtime->dma_bytes;
173 
174 	idma_setcallbk(substream, idma_done);
175 
176 	return 0;
177 }
178 
179 static int idma_hw_free(struct snd_pcm_substream *substream)
180 {
181 	snd_pcm_set_runtime_buffer(substream, NULL);
182 
183 	return 0;
184 }
185 
186 static int idma_prepare(struct snd_pcm_substream *substream)
187 {
188 	struct idma_ctrl *prtd = substream->runtime->private_data;
189 
190 	prtd->pos = prtd->start;
191 
192 	/* flush the DMA channel */
193 	idma_control(LPAM_DMA_STOP);
194 	idma_enqueue(substream);
195 
196 	return 0;
197 }
198 
199 static int idma_trigger(struct snd_pcm_substream *substream, int cmd)
200 {
201 	struct idma_ctrl *prtd = substream->runtime->private_data;
202 	int ret = 0;
203 
204 	spin_lock(&prtd->lock);
205 
206 	switch (cmd) {
207 	case SNDRV_PCM_TRIGGER_RESUME:
208 	case SNDRV_PCM_TRIGGER_START:
209 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
210 		prtd->state |= ST_RUNNING;
211 		idma_control(LPAM_DMA_START);
212 		break;
213 
214 	case SNDRV_PCM_TRIGGER_SUSPEND:
215 	case SNDRV_PCM_TRIGGER_STOP:
216 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
217 		prtd->state &= ~ST_RUNNING;
218 		idma_control(LPAM_DMA_STOP);
219 		break;
220 
221 	default:
222 		ret = -EINVAL;
223 		break;
224 	}
225 
226 	spin_unlock(&prtd->lock);
227 
228 	return ret;
229 }
230 
231 static snd_pcm_uframes_t
232 	idma_pointer(struct snd_pcm_substream *substream)
233 {
234 	struct snd_pcm_runtime *runtime = substream->runtime;
235 	struct idma_ctrl *prtd = runtime->private_data;
236 	dma_addr_t src;
237 	unsigned long res;
238 
239 	spin_lock(&prtd->lock);
240 
241 	idma_getpos(&src);
242 	res = src - prtd->start;
243 
244 	spin_unlock(&prtd->lock);
245 
246 	return bytes_to_frames(substream->runtime, res);
247 }
248 
249 static int idma_mmap(struct snd_pcm_substream *substream,
250 	struct vm_area_struct *vma)
251 {
252 	struct snd_pcm_runtime *runtime = substream->runtime;
253 	unsigned long size, offset;
254 	int ret;
255 
256 	/* From snd_pcm_lib_mmap_iomem */
257 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
258 	vma->vm_flags |= VM_IO;
259 	size = vma->vm_end - vma->vm_start;
260 	offset = vma->vm_pgoff << PAGE_SHIFT;
261 	ret = io_remap_pfn_range(vma, vma->vm_start,
262 			(runtime->dma_addr + offset) >> PAGE_SHIFT,
263 			size, vma->vm_page_prot);
264 
265 	return ret;
266 }
267 
268 static irqreturn_t iis_irq(int irqno, void *dev_id)
269 {
270 	struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id;
271 	u32 iiscon, iisahb, val, addr;
272 
273 	iisahb  = readl(idma.regs + I2SAHB);
274 	iiscon  = readl(idma.regs + I2SCON);
275 
276 	val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;
277 
278 	if (val) {
279 		iisahb |= val;
280 		writel(iisahb, idma.regs + I2SAHB);
281 
282 		addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
283 		addr += prtd->periodsz;
284 		addr %= (prtd->end - prtd->start);
285 		addr += idma.lp_tx_addr;
286 
287 		writel(addr, idma.regs + I2SLVL0ADDR);
288 
289 		if (prtd->cb)
290 			prtd->cb(prtd->token, prtd->period);
291 	}
292 
293 	return IRQ_HANDLED;
294 }
295 
296 static int idma_open(struct snd_pcm_substream *substream)
297 {
298 	struct snd_pcm_runtime *runtime = substream->runtime;
299 	struct idma_ctrl *prtd;
300 	int ret;
301 
302 	snd_soc_set_runtime_hwparams(substream, &idma_hardware);
303 
304 	prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL);
305 	if (prtd == NULL)
306 		return -ENOMEM;
307 
308 	ret = request_irq(IRQ_I2S0, iis_irq, 0, "i2s", prtd);
309 	if (ret < 0) {
310 		pr_err("fail to claim i2s irq , ret = %d\n", ret);
311 		kfree(prtd);
312 		return ret;
313 	}
314 
315 	spin_lock_init(&prtd->lock);
316 
317 	runtime->private_data = prtd;
318 
319 	return 0;
320 }
321 
322 static int idma_close(struct snd_pcm_substream *substream)
323 {
324 	struct snd_pcm_runtime *runtime = substream->runtime;
325 	struct idma_ctrl *prtd = runtime->private_data;
326 
327 	free_irq(IRQ_I2S0, prtd);
328 
329 	if (!prtd)
330 		pr_err("idma_close called with prtd == NULL\n");
331 
332 	kfree(prtd);
333 
334 	return 0;
335 }
336 
337 static struct snd_pcm_ops idma_ops = {
338 	.open		= idma_open,
339 	.close		= idma_close,
340 	.ioctl		= snd_pcm_lib_ioctl,
341 	.trigger	= idma_trigger,
342 	.pointer	= idma_pointer,
343 	.mmap		= idma_mmap,
344 	.hw_params	= idma_hw_params,
345 	.hw_free	= idma_hw_free,
346 	.prepare	= idma_prepare,
347 };
348 
349 static void idma_free(struct snd_pcm *pcm)
350 {
351 	struct snd_pcm_substream *substream;
352 	struct snd_dma_buffer *buf;
353 
354 	substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
355 	if (!substream)
356 		return;
357 
358 	buf = &substream->dma_buffer;
359 	if (!buf->area)
360 		return;
361 
362 	iounmap(buf->area);
363 
364 	buf->area = NULL;
365 	buf->addr = 0;
366 }
367 
368 static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
369 {
370 	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
371 	struct snd_dma_buffer *buf = &substream->dma_buffer;
372 
373 	buf->dev.dev = pcm->card->dev;
374 	buf->private_data = NULL;
375 
376 	/* Assign PCM buffer pointers */
377 	buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
378 	buf->addr = idma.lp_tx_addr;
379 	buf->bytes = idma_hardware.buffer_bytes_max;
380 	buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes);
381 
382 	return 0;
383 }
384 
385 static u64 idma_mask = DMA_BIT_MASK(32);
386 
387 static int idma_new(struct snd_soc_pcm_runtime *rtd)
388 {
389 	struct snd_card *card = rtd->card->snd_card;
390 	struct snd_pcm *pcm = rtd->pcm;
391 	int ret = 0;
392 
393 	if (!card->dev->dma_mask)
394 		card->dev->dma_mask = &idma_mask;
395 	if (!card->dev->coherent_dma_mask)
396 		card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
397 
398 	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
399 		ret = preallocate_idma_buffer(pcm,
400 				SNDRV_PCM_STREAM_PLAYBACK);
401 	}
402 
403 	return ret;
404 }
405 
406 void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
407 {
408 	spin_lock_init(&idma.lock);
409 	idma.regs = regs;
410 	idma.lp_tx_addr = addr;
411 }
412 
413 static struct snd_soc_platform_driver asoc_idma_platform = {
414 	.ops = &idma_ops,
415 	.pcm_new = idma_new,
416 	.pcm_free = idma_free,
417 };
418 
419 static int __devinit asoc_idma_platform_probe(struct platform_device *pdev)
420 {
421 	return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform);
422 }
423 
424 static int __devexit asoc_idma_platform_remove(struct platform_device *pdev)
425 {
426 	snd_soc_unregister_platform(&pdev->dev);
427 	return 0;
428 }
429 
430 static struct platform_driver asoc_idma_driver = {
431 	.driver = {
432 		.name = "samsung-idma",
433 		.owner = THIS_MODULE,
434 	},
435 
436 	.probe = asoc_idma_platform_probe,
437 	.remove = __devexit_p(asoc_idma_platform_remove),
438 };
439 
440 module_platform_driver(asoc_idma_driver);
441 
442 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
443 MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
444 MODULE_LICENSE("GPL");
445