xref: /openbmc/linux/sound/soc/samsung/idma.c (revision b34e08d5) 
1 /*
2  * sound/soc/samsung/idma.c
3  *
4  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5  *		http://www.samsung.com
6  *
7  * I2S0's Internal DMA driver
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/slab.h>
18 #include <linux/module.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 
23 #include "i2s.h"
24 #include "idma.h"
25 #include "dma.h"
26 #include "i2s-regs.h"
27 
28 #define ST_RUNNING		(1<<0)
29 #define ST_OPENED		(1<<1)
30 
31 static const struct snd_pcm_hardware idma_hardware = {
32 	.info = SNDRV_PCM_INFO_INTERLEAVED |
33 		    SNDRV_PCM_INFO_BLOCK_TRANSFER |
34 		    SNDRV_PCM_INFO_MMAP |
35 		    SNDRV_PCM_INFO_MMAP_VALID |
36 		    SNDRV_PCM_INFO_PAUSE |
37 		    SNDRV_PCM_INFO_RESUME,
38 	.buffer_bytes_max = MAX_IDMA_BUFFER,
39 	.period_bytes_min = 128,
40 	.period_bytes_max = MAX_IDMA_PERIOD,
41 	.periods_min = 1,
42 	.periods_max = 2,
43 };
44 
45 struct idma_ctrl {
46 	spinlock_t	lock;
47 	int		state;
48 	dma_addr_t	start;
49 	dma_addr_t	pos;
50 	dma_addr_t	end;
51 	dma_addr_t	period;
52 	dma_addr_t	periodsz;
53 	void		*token;
54 	void		(*cb)(void *dt, int bytes_xfer);
55 };
56 
57 static struct idma_info {
58 	spinlock_t	lock;
59 	void		 __iomem  *regs;
60 	dma_addr_t	lp_tx_addr;
61 } idma;
62 
63 static int idma_irq;
64 
65 static void idma_getpos(dma_addr_t *src)
66 {
67 	*src = idma.lp_tx_addr +
68 		(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
69 }
70 
71 static int idma_enqueue(struct snd_pcm_substream *substream)
72 {
73 	struct snd_pcm_runtime *runtime = substream->runtime;
74 	struct idma_ctrl *prtd = substream->runtime->private_data;
75 	u32 val;
76 
77 	spin_lock(&prtd->lock);
78 	prtd->token = (void *) substream;
79 	spin_unlock(&prtd->lock);
80 
81 	/* Internal DMA Level0 Interrupt Address */
82 	val = idma.lp_tx_addr + prtd->periodsz;
83 	writel(val, idma.regs + I2SLVL0ADDR);
84 
85 	/* Start address0 of I2S internal DMA operation. */
86 	val = idma.lp_tx_addr;
87 	writel(val, idma.regs + I2SSTR0);
88 
89 	/*
90 	 * Transfer block size for I2S internal DMA.
91 	 * Should decide transfer size before start dma operation
92 	 */
93 	val = readl(idma.regs + I2SSIZE);
94 	val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
95 	val |= (((runtime->dma_bytes >> 2) &
96 			I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
97 	writel(val, idma.regs + I2SSIZE);
98 
99 	val = readl(idma.regs + I2SAHB);
100 	val |= AHB_INTENLVL0;
101 	writel(val, idma.regs + I2SAHB);
102 
103 	return 0;
104 }
105 
106 static void idma_setcallbk(struct snd_pcm_substream *substream,
107 				void (*cb)(void *, int))
108 {
109 	struct idma_ctrl *prtd = substream->runtime->private_data;
110 
111 	spin_lock(&prtd->lock);
112 	prtd->cb = cb;
113 	spin_unlock(&prtd->lock);
114 }
115 
116 static void idma_control(int op)
117 {
118 	u32 val = readl(idma.regs + I2SAHB);
119 
120 	spin_lock(&idma.lock);
121 
122 	switch (op) {
123 	case LPAM_DMA_START:
124 		val |= (AHB_INTENLVL0 | AHB_DMAEN);
125 		break;
126 	case LPAM_DMA_STOP:
127 		val &= ~(AHB_INTENLVL0 | AHB_DMAEN);
128 		break;
129 	default:
130 		spin_unlock(&idma.lock);
131 		return;
132 	}
133 
134 	writel(val, idma.regs + I2SAHB);
135 	spin_unlock(&idma.lock);
136 }
137 
138 static void idma_done(void *id, int bytes_xfer)
139 {
140 	struct snd_pcm_substream *substream = id;
141 	struct idma_ctrl *prtd = substream->runtime->private_data;
142 
143 	if (prtd && (prtd->state & ST_RUNNING))
144 		snd_pcm_period_elapsed(substream);
145 }
146 
147 static int idma_hw_params(struct snd_pcm_substream *substream,
148 				struct snd_pcm_hw_params *params)
149 {
150 	struct snd_pcm_runtime *runtime = substream->runtime;
151 	struct idma_ctrl *prtd = substream->runtime->private_data;
152 	u32 mod = readl(idma.regs + I2SMOD);
153 	u32 ahb = readl(idma.regs + I2SAHB);
154 
155 	ahb |= (AHB_DMARLD | AHB_INTMASK);
156 	mod |= MOD_TXS_IDMA;
157 	writel(ahb, idma.regs + I2SAHB);
158 	writel(mod, idma.regs + I2SMOD);
159 
160 	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
161 	runtime->dma_bytes = params_buffer_bytes(params);
162 
163 	prtd->start = prtd->pos = runtime->dma_addr;
164 	prtd->period = params_periods(params);
165 	prtd->periodsz = params_period_bytes(params);
166 	prtd->end = runtime->dma_addr + runtime->dma_bytes;
167 
168 	idma_setcallbk(substream, idma_done);
169 
170 	return 0;
171 }
172 
173 static int idma_hw_free(struct snd_pcm_substream *substream)
174 {
175 	snd_pcm_set_runtime_buffer(substream, NULL);
176 
177 	return 0;
178 }
179 
180 static int idma_prepare(struct snd_pcm_substream *substream)
181 {
182 	struct idma_ctrl *prtd = substream->runtime->private_data;
183 
184 	prtd->pos = prtd->start;
185 
186 	/* flush the DMA channel */
187 	idma_control(LPAM_DMA_STOP);
188 	idma_enqueue(substream);
189 
190 	return 0;
191 }
192 
193 static int idma_trigger(struct snd_pcm_substream *substream, int cmd)
194 {
195 	struct idma_ctrl *prtd = substream->runtime->private_data;
196 	int ret = 0;
197 
198 	spin_lock(&prtd->lock);
199 
200 	switch (cmd) {
201 	case SNDRV_PCM_TRIGGER_RESUME:
202 	case SNDRV_PCM_TRIGGER_START:
203 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
204 		prtd->state |= ST_RUNNING;
205 		idma_control(LPAM_DMA_START);
206 		break;
207 
208 	case SNDRV_PCM_TRIGGER_SUSPEND:
209 	case SNDRV_PCM_TRIGGER_STOP:
210 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
211 		prtd->state &= ~ST_RUNNING;
212 		idma_control(LPAM_DMA_STOP);
213 		break;
214 
215 	default:
216 		ret = -EINVAL;
217 		break;
218 	}
219 
220 	spin_unlock(&prtd->lock);
221 
222 	return ret;
223 }
224 
225 static snd_pcm_uframes_t
226 	idma_pointer(struct snd_pcm_substream *substream)
227 {
228 	struct snd_pcm_runtime *runtime = substream->runtime;
229 	struct idma_ctrl *prtd = runtime->private_data;
230 	dma_addr_t src;
231 	unsigned long res;
232 
233 	spin_lock(&prtd->lock);
234 
235 	idma_getpos(&src);
236 	res = src - prtd->start;
237 
238 	spin_unlock(&prtd->lock);
239 
240 	return bytes_to_frames(substream->runtime, res);
241 }
242 
243 static int idma_mmap(struct snd_pcm_substream *substream,
244 	struct vm_area_struct *vma)
245 {
246 	struct snd_pcm_runtime *runtime = substream->runtime;
247 	unsigned long size, offset;
248 	int ret;
249 
250 	/* From snd_pcm_lib_mmap_iomem */
251 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
252 	size = vma->vm_end - vma->vm_start;
253 	offset = vma->vm_pgoff << PAGE_SHIFT;
254 	ret = io_remap_pfn_range(vma, vma->vm_start,
255 			(runtime->dma_addr + offset) >> PAGE_SHIFT,
256 			size, vma->vm_page_prot);
257 
258 	return ret;
259 }
260 
261 static irqreturn_t iis_irq(int irqno, void *dev_id)
262 {
263 	struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id;
264 	u32 iiscon, iisahb, val, addr;
265 
266 	iisahb  = readl(idma.regs + I2SAHB);
267 	iiscon  = readl(idma.regs + I2SCON);
268 
269 	val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;
270 
271 	if (val) {
272 		iisahb |= val;
273 		writel(iisahb, idma.regs + I2SAHB);
274 
275 		addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
276 		addr += prtd->periodsz;
277 		addr %= (prtd->end - prtd->start);
278 		addr += idma.lp_tx_addr;
279 
280 		writel(addr, idma.regs + I2SLVL0ADDR);
281 
282 		if (prtd->cb)
283 			prtd->cb(prtd->token, prtd->period);
284 	}
285 
286 	return IRQ_HANDLED;
287 }
288 
289 static int idma_open(struct snd_pcm_substream *substream)
290 {
291 	struct snd_pcm_runtime *runtime = substream->runtime;
292 	struct idma_ctrl *prtd;
293 	int ret;
294 
295 	snd_soc_set_runtime_hwparams(substream, &idma_hardware);
296 
297 	prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL);
298 	if (prtd == NULL)
299 		return -ENOMEM;
300 
301 	ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd);
302 	if (ret < 0) {
303 		pr_err("fail to claim i2s irq , ret = %d\n", ret);
304 		kfree(prtd);
305 		return ret;
306 	}
307 
308 	spin_lock_init(&prtd->lock);
309 
310 	runtime->private_data = prtd;
311 
312 	return 0;
313 }
314 
315 static int idma_close(struct snd_pcm_substream *substream)
316 {
317 	struct snd_pcm_runtime *runtime = substream->runtime;
318 	struct idma_ctrl *prtd = runtime->private_data;
319 
320 	free_irq(idma_irq, prtd);
321 
322 	if (!prtd)
323 		pr_err("idma_close called with prtd == NULL\n");
324 
325 	kfree(prtd);
326 
327 	return 0;
328 }
329 
330 static struct snd_pcm_ops idma_ops = {
331 	.open		= idma_open,
332 	.close		= idma_close,
333 	.ioctl		= snd_pcm_lib_ioctl,
334 	.trigger	= idma_trigger,
335 	.pointer	= idma_pointer,
336 	.mmap		= idma_mmap,
337 	.hw_params	= idma_hw_params,
338 	.hw_free	= idma_hw_free,
339 	.prepare	= idma_prepare,
340 };
341 
342 static void idma_free(struct snd_pcm *pcm)
343 {
344 	struct snd_pcm_substream *substream;
345 	struct snd_dma_buffer *buf;
346 
347 	substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
348 	if (!substream)
349 		return;
350 
351 	buf = &substream->dma_buffer;
352 	if (!buf->area)
353 		return;
354 
355 	iounmap(buf->area);
356 
357 	buf->area = NULL;
358 	buf->addr = 0;
359 }
360 
361 static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
362 {
363 	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
364 	struct snd_dma_buffer *buf = &substream->dma_buffer;
365 
366 	buf->dev.dev = pcm->card->dev;
367 	buf->private_data = NULL;
368 
369 	/* Assign PCM buffer pointers */
370 	buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
371 	buf->addr = idma.lp_tx_addr;
372 	buf->bytes = idma_hardware.buffer_bytes_max;
373 	buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes);
374 
375 	return 0;
376 }
377 
378 static int idma_new(struct snd_soc_pcm_runtime *rtd)
379 {
380 	struct snd_card *card = rtd->card->snd_card;
381 	struct snd_pcm *pcm = rtd->pcm;
382 	int ret;
383 
384 	ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
385 	if (ret)
386 		return ret;
387 
388 	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
389 		ret = preallocate_idma_buffer(pcm,
390 				SNDRV_PCM_STREAM_PLAYBACK);
391 	}
392 
393 	return ret;
394 }
395 
396 void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
397 {
398 	spin_lock_init(&idma.lock);
399 	idma.regs = regs;
400 	idma.lp_tx_addr = addr;
401 }
402 EXPORT_SYMBOL_GPL(idma_reg_addr_init);
403 
404 static struct snd_soc_platform_driver asoc_idma_platform = {
405 	.ops = &idma_ops,
406 	.pcm_new = idma_new,
407 	.pcm_free = idma_free,
408 };
409 
410 static int asoc_idma_platform_probe(struct platform_device *pdev)
411 {
412 	idma_irq = platform_get_irq(pdev, 0);
413 	if (idma_irq < 0)
414 		return idma_irq;
415 
416 	return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform);
417 }
418 
419 static int asoc_idma_platform_remove(struct platform_device *pdev)
420 {
421 	snd_soc_unregister_platform(&pdev->dev);
422 	return 0;
423 }
424 
425 static struct platform_driver asoc_idma_driver = {
426 	.driver = {
427 		.name = "samsung-idma",
428 		.owner = THIS_MODULE,
429 	},
430 
431 	.probe = asoc_idma_platform_probe,
432 	.remove = asoc_idma_platform_remove,
433 };
434 
435 module_platform_driver(asoc_idma_driver);
436 
437 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
438 MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
439 MODULE_LICENSE("GPL");
440