1 /* 2 * sound/soc/samsung/idma.c 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * 7 * I2S0's Internal DMA driver 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 #include <linux/interrupt.h> 15 #include <linux/platform_device.h> 16 #include <linux/dma-mapping.h> 17 #include <linux/slab.h> 18 #include <linux/module.h> 19 #include <sound/pcm.h> 20 #include <sound/pcm_params.h> 21 #include <sound/soc.h> 22 23 #include "i2s.h" 24 #include "idma.h" 25 #include "dma.h" 26 #include "i2s-regs.h" 27 28 #define ST_RUNNING (1<<0) 29 #define ST_OPENED (1<<1) 30 31 static const struct snd_pcm_hardware idma_hardware = { 32 .info = SNDRV_PCM_INFO_INTERLEAVED | 33 SNDRV_PCM_INFO_BLOCK_TRANSFER | 34 SNDRV_PCM_INFO_MMAP | 35 SNDRV_PCM_INFO_MMAP_VALID | 36 SNDRV_PCM_INFO_PAUSE | 37 SNDRV_PCM_INFO_RESUME, 38 .formats = SNDRV_PCM_FMTBIT_S16_LE | 39 SNDRV_PCM_FMTBIT_U16_LE | 40 SNDRV_PCM_FMTBIT_S24_LE | 41 SNDRV_PCM_FMTBIT_U24_LE | 42 SNDRV_PCM_FMTBIT_U8 | 43 SNDRV_PCM_FMTBIT_S8, 44 .channels_min = 2, 45 .channels_max = 2, 46 .buffer_bytes_max = MAX_IDMA_BUFFER, 47 .period_bytes_min = 128, 48 .period_bytes_max = MAX_IDMA_PERIOD, 49 .periods_min = 1, 50 .periods_max = 2, 51 }; 52 53 struct idma_ctrl { 54 spinlock_t lock; 55 int state; 56 dma_addr_t start; 57 dma_addr_t pos; 58 dma_addr_t end; 59 dma_addr_t period; 60 dma_addr_t periodsz; 61 void *token; 62 void (*cb)(void *dt, int bytes_xfer); 63 }; 64 65 static struct idma_info { 66 spinlock_t lock; 67 void __iomem *regs; 68 dma_addr_t lp_tx_addr; 69 } idma; 70 71 static int idma_irq; 72 73 static void idma_getpos(dma_addr_t *src) 74 { 75 *src = idma.lp_tx_addr + 76 (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; 77 } 78 79 static int idma_enqueue(struct snd_pcm_substream *substream) 80 { 81 struct snd_pcm_runtime *runtime = substream->runtime; 82 struct idma_ctrl *prtd = substream->runtime->private_data; 83 u32 val; 84 85 spin_lock(&prtd->lock); 86 prtd->token = (void *) substream; 87 spin_unlock(&prtd->lock); 88 89 /* Internal DMA Level0 Interrupt Address */ 90 val = idma.lp_tx_addr + prtd->periodsz; 91 writel(val, idma.regs + I2SLVL0ADDR); 92 93 /* Start address0 of I2S internal DMA operation. */ 94 val = idma.lp_tx_addr; 95 writel(val, idma.regs + I2SSTR0); 96 97 /* 98 * Transfer block size for I2S internal DMA. 99 * Should decide transfer size before start dma operation 100 */ 101 val = readl(idma.regs + I2SSIZE); 102 val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT); 103 val |= (((runtime->dma_bytes >> 2) & 104 I2SSIZE_TRNMSK) << I2SSIZE_SHIFT); 105 writel(val, idma.regs + I2SSIZE); 106 107 val = readl(idma.regs + I2SAHB); 108 val |= AHB_INTENLVL0; 109 writel(val, idma.regs + I2SAHB); 110 111 return 0; 112 } 113 114 static void idma_setcallbk(struct snd_pcm_substream *substream, 115 void (*cb)(void *, int)) 116 { 117 struct idma_ctrl *prtd = substream->runtime->private_data; 118 119 spin_lock(&prtd->lock); 120 prtd->cb = cb; 121 spin_unlock(&prtd->lock); 122 } 123 124 static void idma_control(int op) 125 { 126 u32 val = readl(idma.regs + I2SAHB); 127 128 spin_lock(&idma.lock); 129 130 switch (op) { 131 case LPAM_DMA_START: 132 val |= (AHB_INTENLVL0 | AHB_DMAEN); 133 break; 134 case LPAM_DMA_STOP: 135 val &= ~(AHB_INTENLVL0 | AHB_DMAEN); 136 break; 137 default: 138 spin_unlock(&idma.lock); 139 return; 140 } 141 142 writel(val, idma.regs + I2SAHB); 143 spin_unlock(&idma.lock); 144 } 145 146 static void idma_done(void *id, int bytes_xfer) 147 { 148 struct snd_pcm_substream *substream = id; 149 struct idma_ctrl *prtd = substream->runtime->private_data; 150 151 if (prtd && (prtd->state & ST_RUNNING)) 152 snd_pcm_period_elapsed(substream); 153 } 154 155 static int idma_hw_params(struct snd_pcm_substream *substream, 156 struct snd_pcm_hw_params *params) 157 { 158 struct snd_pcm_runtime *runtime = substream->runtime; 159 struct idma_ctrl *prtd = substream->runtime->private_data; 160 u32 mod = readl(idma.regs + I2SMOD); 161 u32 ahb = readl(idma.regs + I2SAHB); 162 163 ahb |= (AHB_DMARLD | AHB_INTMASK); 164 mod |= MOD_TXS_IDMA; 165 writel(ahb, idma.regs + I2SAHB); 166 writel(mod, idma.regs + I2SMOD); 167 168 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); 169 runtime->dma_bytes = params_buffer_bytes(params); 170 171 prtd->start = prtd->pos = runtime->dma_addr; 172 prtd->period = params_periods(params); 173 prtd->periodsz = params_period_bytes(params); 174 prtd->end = runtime->dma_addr + runtime->dma_bytes; 175 176 idma_setcallbk(substream, idma_done); 177 178 return 0; 179 } 180 181 static int idma_hw_free(struct snd_pcm_substream *substream) 182 { 183 snd_pcm_set_runtime_buffer(substream, NULL); 184 185 return 0; 186 } 187 188 static int idma_prepare(struct snd_pcm_substream *substream) 189 { 190 struct idma_ctrl *prtd = substream->runtime->private_data; 191 192 prtd->pos = prtd->start; 193 194 /* flush the DMA channel */ 195 idma_control(LPAM_DMA_STOP); 196 idma_enqueue(substream); 197 198 return 0; 199 } 200 201 static int idma_trigger(struct snd_pcm_substream *substream, int cmd) 202 { 203 struct idma_ctrl *prtd = substream->runtime->private_data; 204 int ret = 0; 205 206 spin_lock(&prtd->lock); 207 208 switch (cmd) { 209 case SNDRV_PCM_TRIGGER_RESUME: 210 case SNDRV_PCM_TRIGGER_START: 211 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 212 prtd->state |= ST_RUNNING; 213 idma_control(LPAM_DMA_START); 214 break; 215 216 case SNDRV_PCM_TRIGGER_SUSPEND: 217 case SNDRV_PCM_TRIGGER_STOP: 218 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 219 prtd->state &= ~ST_RUNNING; 220 idma_control(LPAM_DMA_STOP); 221 break; 222 223 default: 224 ret = -EINVAL; 225 break; 226 } 227 228 spin_unlock(&prtd->lock); 229 230 return ret; 231 } 232 233 static snd_pcm_uframes_t 234 idma_pointer(struct snd_pcm_substream *substream) 235 { 236 struct snd_pcm_runtime *runtime = substream->runtime; 237 struct idma_ctrl *prtd = runtime->private_data; 238 dma_addr_t src; 239 unsigned long res; 240 241 spin_lock(&prtd->lock); 242 243 idma_getpos(&src); 244 res = src - prtd->start; 245 246 spin_unlock(&prtd->lock); 247 248 return bytes_to_frames(substream->runtime, res); 249 } 250 251 static int idma_mmap(struct snd_pcm_substream *substream, 252 struct vm_area_struct *vma) 253 { 254 struct snd_pcm_runtime *runtime = substream->runtime; 255 unsigned long size, offset; 256 int ret; 257 258 /* From snd_pcm_lib_mmap_iomem */ 259 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 260 size = vma->vm_end - vma->vm_start; 261 offset = vma->vm_pgoff << PAGE_SHIFT; 262 ret = io_remap_pfn_range(vma, vma->vm_start, 263 (runtime->dma_addr + offset) >> PAGE_SHIFT, 264 size, vma->vm_page_prot); 265 266 return ret; 267 } 268 269 static irqreturn_t iis_irq(int irqno, void *dev_id) 270 { 271 struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id; 272 u32 iiscon, iisahb, val, addr; 273 274 iisahb = readl(idma.regs + I2SAHB); 275 iiscon = readl(idma.regs + I2SCON); 276 277 val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0; 278 279 if (val) { 280 iisahb |= val; 281 writel(iisahb, idma.regs + I2SAHB); 282 283 addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr; 284 addr += prtd->periodsz; 285 addr %= (prtd->end - prtd->start); 286 addr += idma.lp_tx_addr; 287 288 writel(addr, idma.regs + I2SLVL0ADDR); 289 290 if (prtd->cb) 291 prtd->cb(prtd->token, prtd->period); 292 } 293 294 return IRQ_HANDLED; 295 } 296 297 static int idma_open(struct snd_pcm_substream *substream) 298 { 299 struct snd_pcm_runtime *runtime = substream->runtime; 300 struct idma_ctrl *prtd; 301 int ret; 302 303 snd_soc_set_runtime_hwparams(substream, &idma_hardware); 304 305 prtd = kzalloc(sizeof(struct idma_ctrl), GFP_KERNEL); 306 if (prtd == NULL) 307 return -ENOMEM; 308 309 ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd); 310 if (ret < 0) { 311 pr_err("fail to claim i2s irq , ret = %d\n", ret); 312 kfree(prtd); 313 return ret; 314 } 315 316 spin_lock_init(&prtd->lock); 317 318 runtime->private_data = prtd; 319 320 return 0; 321 } 322 323 static int idma_close(struct snd_pcm_substream *substream) 324 { 325 struct snd_pcm_runtime *runtime = substream->runtime; 326 struct idma_ctrl *prtd = runtime->private_data; 327 328 free_irq(idma_irq, prtd); 329 330 if (!prtd) 331 pr_err("idma_close called with prtd == NULL\n"); 332 333 kfree(prtd); 334 335 return 0; 336 } 337 338 static struct snd_pcm_ops idma_ops = { 339 .open = idma_open, 340 .close = idma_close, 341 .ioctl = snd_pcm_lib_ioctl, 342 .trigger = idma_trigger, 343 .pointer = idma_pointer, 344 .mmap = idma_mmap, 345 .hw_params = idma_hw_params, 346 .hw_free = idma_hw_free, 347 .prepare = idma_prepare, 348 }; 349 350 static void idma_free(struct snd_pcm *pcm) 351 { 352 struct snd_pcm_substream *substream; 353 struct snd_dma_buffer *buf; 354 355 substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 356 if (!substream) 357 return; 358 359 buf = &substream->dma_buffer; 360 if (!buf->area) 361 return; 362 363 iounmap(buf->area); 364 365 buf->area = NULL; 366 buf->addr = 0; 367 } 368 369 static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream) 370 { 371 struct snd_pcm_substream *substream = pcm->streams[stream].substream; 372 struct snd_dma_buffer *buf = &substream->dma_buffer; 373 374 buf->dev.dev = pcm->card->dev; 375 buf->private_data = NULL; 376 377 /* Assign PCM buffer pointers */ 378 buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS; 379 buf->addr = idma.lp_tx_addr; 380 buf->bytes = idma_hardware.buffer_bytes_max; 381 buf->area = (unsigned char *)ioremap(buf->addr, buf->bytes); 382 383 return 0; 384 } 385 386 static int idma_new(struct snd_soc_pcm_runtime *rtd) 387 { 388 struct snd_card *card = rtd->card->snd_card; 389 struct snd_pcm *pcm = rtd->pcm; 390 int ret; 391 392 ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); 393 if (ret) 394 return ret; 395 396 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { 397 ret = preallocate_idma_buffer(pcm, 398 SNDRV_PCM_STREAM_PLAYBACK); 399 } 400 401 return ret; 402 } 403 404 void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr) 405 { 406 spin_lock_init(&idma.lock); 407 idma.regs = regs; 408 idma.lp_tx_addr = addr; 409 } 410 EXPORT_SYMBOL_GPL(idma_reg_addr_init); 411 412 static struct snd_soc_platform_driver asoc_idma_platform = { 413 .ops = &idma_ops, 414 .pcm_new = idma_new, 415 .pcm_free = idma_free, 416 }; 417 418 static int asoc_idma_platform_probe(struct platform_device *pdev) 419 { 420 idma_irq = platform_get_irq(pdev, 0); 421 if (idma_irq < 0) 422 return idma_irq; 423 424 return snd_soc_register_platform(&pdev->dev, &asoc_idma_platform); 425 } 426 427 static int asoc_idma_platform_remove(struct platform_device *pdev) 428 { 429 snd_soc_unregister_platform(&pdev->dev); 430 return 0; 431 } 432 433 static struct platform_driver asoc_idma_driver = { 434 .driver = { 435 .name = "samsung-idma", 436 .owner = THIS_MODULE, 437 }, 438 439 .probe = asoc_idma_platform_probe, 440 .remove = asoc_idma_platform_remove, 441 }; 442 443 module_platform_driver(asoc_idma_driver); 444 445 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 446 MODULE_DESCRIPTION("Samsung ASoC IDMA Driver"); 447 MODULE_LICENSE("GPL"); 448