1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // ALSA SoC Audio Layer - Samsung I2S Controller driver 4 // 5 // Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 // Jaswinder Singh <jassisinghbrar@gmail.com> 7 8 #include <dt-bindings/sound/samsung-i2s.h> 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/clk.h> 12 #include <linux/clk-provider.h> 13 #include <linux/io.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_gpio.h> 18 #include <linux/pm_runtime.h> 19 20 #include <sound/soc.h> 21 #include <sound/pcm_params.h> 22 23 #include <linux/platform_data/asoc-s3c.h> 24 25 #include "dma.h" 26 #include "idma.h" 27 #include "i2s.h" 28 #include "i2s-regs.h" 29 30 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 31 32 #define SAMSUNG_I2S_ID_PRIMARY 1 33 #define SAMSUNG_I2S_ID_SECONDARY 2 34 35 struct samsung_i2s_variant_regs { 36 unsigned int bfs_off; 37 unsigned int rfs_off; 38 unsigned int sdf_off; 39 unsigned int txr_off; 40 unsigned int rclksrc_off; 41 unsigned int mss_off; 42 unsigned int cdclkcon_off; 43 unsigned int lrp_off; 44 unsigned int bfs_mask; 45 unsigned int rfs_mask; 46 unsigned int ftx0cnt_off; 47 }; 48 49 struct samsung_i2s_dai_data { 50 u32 quirks; 51 unsigned int pcm_rates; 52 const struct samsung_i2s_variant_regs *i2s_variant_regs; 53 }; 54 55 struct i2s_dai { 56 /* Platform device for this DAI */ 57 struct platform_device *pdev; 58 59 /* Frame clock */ 60 unsigned frmclk; 61 /* 62 * Specifically requested RCLK, BCLK by machine driver. 63 * 0 indicates CPU driver is free to choose any value. 64 */ 65 unsigned rfs, bfs; 66 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 67 struct i2s_dai *pri_dai; 68 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 69 struct i2s_dai *sec_dai; 70 71 #define DAI_OPENED (1 << 0) /* DAI is opened */ 72 #define DAI_MANAGER (1 << 1) /* DAI is the manager */ 73 unsigned mode; 74 75 /* Driver for this DAI */ 76 struct snd_soc_dai_driver *drv; 77 78 /* DMA parameters */ 79 struct snd_dmaengine_dai_dma_data dma_playback; 80 struct snd_dmaengine_dai_dma_data dma_capture; 81 struct snd_dmaengine_dai_dma_data idma_playback; 82 dma_filter_fn filter; 83 84 struct samsung_i2s_priv *priv; 85 }; 86 87 struct samsung_i2s_priv { 88 struct platform_device *pdev; 89 struct platform_device *pdev_sec; 90 91 /* Lock for cross interface checks */ 92 spinlock_t pcm_lock; 93 94 /* CPU DAIs and their corresponding drivers */ 95 struct i2s_dai *dai; 96 struct snd_soc_dai_driver *dai_drv; 97 int num_dais; 98 99 /* The I2S controller's core clock */ 100 struct clk *clk; 101 102 /* Clock for generating I2S signals */ 103 struct clk *op_clk; 104 105 /* Rate of RCLK source clock */ 106 unsigned long rclk_srcrate; 107 108 /* Cache of selected I2S registers for system suspend */ 109 u32 suspend_i2smod; 110 u32 suspend_i2scon; 111 u32 suspend_i2spsr; 112 113 const struct samsung_i2s_variant_regs *variant_regs; 114 u32 quirks; 115 116 /* The clock provider's data */ 117 struct clk *clk_table[3]; 118 struct clk_onecell_data clk_data; 119 120 /* Spinlock protecting member fields below */ 121 spinlock_t lock; 122 123 /* Memory mapped SFR region */ 124 void __iomem *addr; 125 126 /* A flag indicating the I2S slave mode operation */ 127 bool slave_mode; 128 }; 129 130 /* Returns true if this is the 'overlay' stereo DAI */ 131 static inline bool is_secondary(struct i2s_dai *i2s) 132 { 133 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; 134 } 135 136 /* If this interface of the controller is transmitting data */ 137 static inline bool tx_active(struct i2s_dai *i2s) 138 { 139 u32 active; 140 141 if (!i2s) 142 return false; 143 144 active = readl(i2s->priv->addr + I2SCON); 145 146 if (is_secondary(i2s)) 147 active &= CON_TXSDMA_ACTIVE; 148 else 149 active &= CON_TXDMA_ACTIVE; 150 151 return active ? true : false; 152 } 153 154 /* Return pointer to the other DAI */ 155 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s) 156 { 157 return i2s->pri_dai ? : i2s->sec_dai; 158 } 159 160 /* If the other interface of the controller is transmitting data */ 161 static inline bool other_tx_active(struct i2s_dai *i2s) 162 { 163 struct i2s_dai *other = get_other_dai(i2s); 164 165 return tx_active(other); 166 } 167 168 /* If any interface of the controller is transmitting data */ 169 static inline bool any_tx_active(struct i2s_dai *i2s) 170 { 171 return tx_active(i2s) || other_tx_active(i2s); 172 } 173 174 /* If this interface of the controller is receiving data */ 175 static inline bool rx_active(struct i2s_dai *i2s) 176 { 177 u32 active; 178 179 if (!i2s) 180 return false; 181 182 active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE; 183 184 return active ? true : false; 185 } 186 187 /* If the other interface of the controller is receiving data */ 188 static inline bool other_rx_active(struct i2s_dai *i2s) 189 { 190 struct i2s_dai *other = get_other_dai(i2s); 191 192 return rx_active(other); 193 } 194 195 /* If any interface of the controller is receiving data */ 196 static inline bool any_rx_active(struct i2s_dai *i2s) 197 { 198 return rx_active(i2s) || other_rx_active(i2s); 199 } 200 201 /* If the other DAI is transmitting or receiving data */ 202 static inline bool other_active(struct i2s_dai *i2s) 203 { 204 return other_rx_active(i2s) || other_tx_active(i2s); 205 } 206 207 /* If this DAI is transmitting or receiving data */ 208 static inline bool this_active(struct i2s_dai *i2s) 209 { 210 return tx_active(i2s) || rx_active(i2s); 211 } 212 213 /* If the controller is active anyway */ 214 static inline bool any_active(struct i2s_dai *i2s) 215 { 216 return this_active(i2s) || other_active(i2s); 217 } 218 219 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 220 { 221 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 222 223 return &priv->dai[dai->id - 1]; 224 } 225 226 static inline bool is_opened(struct i2s_dai *i2s) 227 { 228 if (i2s && (i2s->mode & DAI_OPENED)) 229 return true; 230 else 231 return false; 232 } 233 234 static inline bool is_manager(struct i2s_dai *i2s) 235 { 236 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 237 return true; 238 else 239 return false; 240 } 241 242 /* Read RCLK of I2S (in multiples of LRCLK) */ 243 static inline unsigned get_rfs(struct i2s_dai *i2s) 244 { 245 struct samsung_i2s_priv *priv = i2s->priv; 246 u32 rfs; 247 248 rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off; 249 rfs &= priv->variant_regs->rfs_mask; 250 251 switch (rfs) { 252 case 7: return 192; 253 case 6: return 96; 254 case 5: return 128; 255 case 4: return 64; 256 case 3: return 768; 257 case 2: return 384; 258 case 1: return 512; 259 default: return 256; 260 } 261 } 262 263 /* Write RCLK of I2S (in multiples of LRCLK) */ 264 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 265 { 266 struct samsung_i2s_priv *priv = i2s->priv; 267 u32 mod = readl(priv->addr + I2SMOD); 268 int rfs_shift = priv->variant_regs->rfs_off; 269 270 mod &= ~(priv->variant_regs->rfs_mask << rfs_shift); 271 272 switch (rfs) { 273 case 192: 274 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift); 275 break; 276 case 96: 277 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift); 278 break; 279 case 128: 280 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift); 281 break; 282 case 64: 283 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift); 284 break; 285 case 768: 286 mod |= (MOD_RCLK_768FS << rfs_shift); 287 break; 288 case 512: 289 mod |= (MOD_RCLK_512FS << rfs_shift); 290 break; 291 case 384: 292 mod |= (MOD_RCLK_384FS << rfs_shift); 293 break; 294 default: 295 mod |= (MOD_RCLK_256FS << rfs_shift); 296 break; 297 } 298 299 writel(mod, priv->addr + I2SMOD); 300 } 301 302 /* Read bit-clock of I2S (in multiples of LRCLK) */ 303 static inline unsigned get_bfs(struct i2s_dai *i2s) 304 { 305 struct samsung_i2s_priv *priv = i2s->priv; 306 u32 bfs; 307 308 bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off; 309 bfs &= priv->variant_regs->bfs_mask; 310 311 switch (bfs) { 312 case 8: return 256; 313 case 7: return 192; 314 case 6: return 128; 315 case 5: return 96; 316 case 4: return 64; 317 case 3: return 24; 318 case 2: return 16; 319 case 1: return 48; 320 default: return 32; 321 } 322 } 323 324 /* Write bit-clock of I2S (in multiples of LRCLK) */ 325 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 326 { 327 struct samsung_i2s_priv *priv = i2s->priv; 328 u32 mod = readl(priv->addr + I2SMOD); 329 int tdm = priv->quirks & QUIRK_SUPPORTS_TDM; 330 int bfs_shift = priv->variant_regs->bfs_off; 331 332 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ 333 if (!tdm && bfs > 48) { 334 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); 335 return; 336 } 337 338 mod &= ~(priv->variant_regs->bfs_mask << bfs_shift); 339 340 switch (bfs) { 341 case 48: 342 mod |= (MOD_BCLK_48FS << bfs_shift); 343 break; 344 case 32: 345 mod |= (MOD_BCLK_32FS << bfs_shift); 346 break; 347 case 24: 348 mod |= (MOD_BCLK_24FS << bfs_shift); 349 break; 350 case 16: 351 mod |= (MOD_BCLK_16FS << bfs_shift); 352 break; 353 case 64: 354 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); 355 break; 356 case 96: 357 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); 358 break; 359 case 128: 360 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); 361 break; 362 case 192: 363 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); 364 break; 365 case 256: 366 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); 367 break; 368 default: 369 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 370 return; 371 } 372 373 writel(mod, priv->addr + I2SMOD); 374 } 375 376 /* Sample size */ 377 static inline int get_blc(struct i2s_dai *i2s) 378 { 379 int blc = readl(i2s->priv->addr + I2SMOD); 380 381 blc = (blc >> 13) & 0x3; 382 383 switch (blc) { 384 case 2: return 24; 385 case 1: return 8; 386 default: return 16; 387 } 388 } 389 390 /* TX channel control */ 391 static void i2s_txctrl(struct i2s_dai *i2s, int on) 392 { 393 struct samsung_i2s_priv *priv = i2s->priv; 394 void __iomem *addr = priv->addr; 395 int txr_off = priv->variant_regs->txr_off; 396 u32 con = readl(addr + I2SCON); 397 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 398 399 if (on) { 400 con |= CON_ACTIVE; 401 con &= ~CON_TXCH_PAUSE; 402 403 if (is_secondary(i2s)) { 404 con |= CON_TXSDMA_ACTIVE; 405 con &= ~CON_TXSDMA_PAUSE; 406 } else { 407 con |= CON_TXDMA_ACTIVE; 408 con &= ~CON_TXDMA_PAUSE; 409 } 410 411 if (any_rx_active(i2s)) 412 mod |= 2 << txr_off; 413 else 414 mod |= 0 << txr_off; 415 } else { 416 if (is_secondary(i2s)) { 417 con |= CON_TXSDMA_PAUSE; 418 con &= ~CON_TXSDMA_ACTIVE; 419 } else { 420 con |= CON_TXDMA_PAUSE; 421 con &= ~CON_TXDMA_ACTIVE; 422 } 423 424 if (other_tx_active(i2s)) { 425 writel(con, addr + I2SCON); 426 return; 427 } 428 429 con |= CON_TXCH_PAUSE; 430 431 if (any_rx_active(i2s)) 432 mod |= 1 << txr_off; 433 else 434 con &= ~CON_ACTIVE; 435 } 436 437 writel(mod, addr + I2SMOD); 438 writel(con, addr + I2SCON); 439 } 440 441 /* RX Channel Control */ 442 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 443 { 444 struct samsung_i2s_priv *priv = i2s->priv; 445 void __iomem *addr = priv->addr; 446 int txr_off = priv->variant_regs->txr_off; 447 u32 con = readl(addr + I2SCON); 448 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 449 450 if (on) { 451 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 452 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 453 454 if (any_tx_active(i2s)) 455 mod |= 2 << txr_off; 456 else 457 mod |= 1 << txr_off; 458 } else { 459 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 460 con &= ~CON_RXDMA_ACTIVE; 461 462 if (any_tx_active(i2s)) 463 mod |= 0 << txr_off; 464 else 465 con &= ~CON_ACTIVE; 466 } 467 468 writel(mod, addr + I2SMOD); 469 writel(con, addr + I2SCON); 470 } 471 472 /* Flush FIFO of an interface */ 473 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 474 { 475 void __iomem *fic; 476 u32 val; 477 478 if (!i2s) 479 return; 480 481 if (is_secondary(i2s)) 482 fic = i2s->priv->addr + I2SFICS; 483 else 484 fic = i2s->priv->addr + I2SFIC; 485 486 /* Flush the FIFO */ 487 writel(readl(fic) | flush, fic); 488 489 /* Be patient */ 490 val = msecs_to_loops(1) / 1000; /* 1 usec */ 491 while (--val) 492 cpu_relax(); 493 494 writel(readl(fic) & ~flush, fic); 495 } 496 497 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs, 498 int dir) 499 { 500 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 501 struct i2s_dai *i2s = to_info(dai); 502 struct i2s_dai *other = get_other_dai(i2s); 503 const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs; 504 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off; 505 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off; 506 u32 mod, mask, val = 0; 507 unsigned long flags; 508 int ret = 0; 509 510 pm_runtime_get_sync(dai->dev); 511 512 spin_lock_irqsave(&priv->lock, flags); 513 mod = readl(priv->addr + I2SMOD); 514 spin_unlock_irqrestore(&priv->lock, flags); 515 516 switch (clk_id) { 517 case SAMSUNG_I2S_OPCLK: 518 mask = MOD_OPCLK_MASK; 519 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK; 520 break; 521 case SAMSUNG_I2S_CDCLK: 522 mask = 1 << i2s_regs->cdclkcon_off; 523 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 524 if (dir == SND_SOC_CLOCK_IN) 525 rfs = 0; 526 527 if ((rfs && other && other->rfs && (other->rfs != rfs)) || 528 (any_active(i2s) && 529 (((dir == SND_SOC_CLOCK_IN) 530 && !(mod & cdcon_mask)) || 531 ((dir == SND_SOC_CLOCK_OUT) 532 && (mod & cdcon_mask))))) { 533 dev_err(&i2s->pdev->dev, 534 "%s:%d Other DAI busy\n", __func__, __LINE__); 535 ret = -EAGAIN; 536 goto err; 537 } 538 539 if (dir == SND_SOC_CLOCK_IN) 540 val = 1 << i2s_regs->cdclkcon_off; 541 542 i2s->rfs = rfs; 543 break; 544 545 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 546 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 547 mask = 1 << i2s_regs->rclksrc_off; 548 549 if ((priv->quirks & QUIRK_NO_MUXPSR) 550 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 551 clk_id = 0; 552 else 553 clk_id = 1; 554 555 if (!any_active(i2s)) { 556 if (priv->op_clk && !IS_ERR(priv->op_clk)) { 557 if ((clk_id && !(mod & rsrc_mask)) || 558 (!clk_id && (mod & rsrc_mask))) { 559 clk_disable_unprepare(priv->op_clk); 560 clk_put(priv->op_clk); 561 } else { 562 priv->rclk_srcrate = 563 clk_get_rate(priv->op_clk); 564 goto done; 565 } 566 } 567 568 if (clk_id) 569 priv->op_clk = clk_get(&i2s->pdev->dev, 570 "i2s_opclk1"); 571 else 572 priv->op_clk = clk_get(&i2s->pdev->dev, 573 "i2s_opclk0"); 574 575 if (WARN_ON(IS_ERR(priv->op_clk))) { 576 ret = PTR_ERR(priv->op_clk); 577 priv->op_clk = NULL; 578 goto err; 579 } 580 581 ret = clk_prepare_enable(priv->op_clk); 582 if (ret) { 583 clk_put(priv->op_clk); 584 priv->op_clk = NULL; 585 goto err; 586 } 587 priv->rclk_srcrate = clk_get_rate(priv->op_clk); 588 589 } else if ((!clk_id && (mod & rsrc_mask)) 590 || (clk_id && !(mod & rsrc_mask))) { 591 dev_err(&i2s->pdev->dev, 592 "%s:%d Other DAI busy\n", __func__, __LINE__); 593 ret = -EAGAIN; 594 goto err; 595 } else { 596 /* Call can't be on the active DAI */ 597 goto done; 598 } 599 600 if (clk_id == 1) 601 val = 1 << i2s_regs->rclksrc_off; 602 break; 603 default: 604 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 605 ret = -EINVAL; 606 goto err; 607 } 608 609 spin_lock_irqsave(&priv->lock, flags); 610 mod = readl(priv->addr + I2SMOD); 611 mod = (mod & ~mask) | val; 612 writel(mod, priv->addr + I2SMOD); 613 spin_unlock_irqrestore(&priv->lock, flags); 614 done: 615 pm_runtime_put(dai->dev); 616 617 return 0; 618 err: 619 pm_runtime_put(dai->dev); 620 return ret; 621 } 622 623 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 624 { 625 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 626 struct i2s_dai *i2s = to_info(dai); 627 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave; 628 u32 mod, tmp = 0; 629 unsigned long flags; 630 631 lrp_shift = priv->variant_regs->lrp_off; 632 sdf_shift = priv->variant_regs->sdf_off; 633 mod_slave = 1 << priv->variant_regs->mss_off; 634 635 sdf_mask = MOD_SDF_MASK << sdf_shift; 636 lrp_rlow = MOD_LR_RLOW << lrp_shift; 637 638 /* Format is priority */ 639 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 640 case SND_SOC_DAIFMT_RIGHT_J: 641 tmp |= lrp_rlow; 642 tmp |= (MOD_SDF_MSB << sdf_shift); 643 break; 644 case SND_SOC_DAIFMT_LEFT_J: 645 tmp |= lrp_rlow; 646 tmp |= (MOD_SDF_LSB << sdf_shift); 647 break; 648 case SND_SOC_DAIFMT_I2S: 649 tmp |= (MOD_SDF_IIS << sdf_shift); 650 break; 651 default: 652 dev_err(&i2s->pdev->dev, "Format not supported\n"); 653 return -EINVAL; 654 } 655 656 /* 657 * INV flag is relative to the FORMAT flag - if set it simply 658 * flips the polarity specified by the Standard 659 */ 660 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 661 case SND_SOC_DAIFMT_NB_NF: 662 break; 663 case SND_SOC_DAIFMT_NB_IF: 664 if (tmp & lrp_rlow) 665 tmp &= ~lrp_rlow; 666 else 667 tmp |= lrp_rlow; 668 break; 669 default: 670 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 671 return -EINVAL; 672 } 673 674 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 675 case SND_SOC_DAIFMT_CBM_CFM: 676 tmp |= mod_slave; 677 break; 678 case SND_SOC_DAIFMT_CBS_CFS: 679 /* 680 * Set default source clock in Master mode, only when the 681 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any 682 * clock configuration assigned in DT is not overwritten. 683 */ 684 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL) 685 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 686 0, SND_SOC_CLOCK_IN); 687 break; 688 default: 689 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 690 return -EINVAL; 691 } 692 693 pm_runtime_get_sync(dai->dev); 694 spin_lock_irqsave(&priv->lock, flags); 695 mod = readl(priv->addr + I2SMOD); 696 /* 697 * Don't change the I2S mode if any controller is active on this 698 * channel. 699 */ 700 if (any_active(i2s) && 701 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) { 702 spin_unlock_irqrestore(&priv->lock, flags); 703 pm_runtime_put(dai->dev); 704 dev_err(&i2s->pdev->dev, 705 "%s:%d Other DAI busy\n", __func__, __LINE__); 706 return -EAGAIN; 707 } 708 709 mod &= ~(sdf_mask | lrp_rlow | mod_slave); 710 mod |= tmp; 711 writel(mod, priv->addr + I2SMOD); 712 priv->slave_mode = (mod & mod_slave); 713 spin_unlock_irqrestore(&priv->lock, flags); 714 pm_runtime_put(dai->dev); 715 716 return 0; 717 } 718 719 static int i2s_hw_params(struct snd_pcm_substream *substream, 720 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 721 { 722 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 723 struct i2s_dai *i2s = to_info(dai); 724 u32 mod, mask = 0, val = 0; 725 struct clk *rclksrc; 726 unsigned long flags; 727 728 WARN_ON(!pm_runtime_active(dai->dev)); 729 730 if (!is_secondary(i2s)) 731 mask |= (MOD_DC2_EN | MOD_DC1_EN); 732 733 switch (params_channels(params)) { 734 case 6: 735 val |= MOD_DC2_EN; 736 fallthrough; 737 case 4: 738 val |= MOD_DC1_EN; 739 break; 740 case 2: 741 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 742 i2s->dma_playback.addr_width = 4; 743 else 744 i2s->dma_capture.addr_width = 4; 745 break; 746 case 1: 747 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 748 i2s->dma_playback.addr_width = 2; 749 else 750 i2s->dma_capture.addr_width = 2; 751 752 break; 753 default: 754 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 755 params_channels(params)); 756 return -EINVAL; 757 } 758 759 if (is_secondary(i2s)) 760 mask |= MOD_BLCS_MASK; 761 else 762 mask |= MOD_BLCP_MASK; 763 764 if (is_manager(i2s)) 765 mask |= MOD_BLC_MASK; 766 767 switch (params_width(params)) { 768 case 8: 769 if (is_secondary(i2s)) 770 val |= MOD_BLCS_8BIT; 771 else 772 val |= MOD_BLCP_8BIT; 773 if (is_manager(i2s)) 774 val |= MOD_BLC_8BIT; 775 break; 776 case 16: 777 if (is_secondary(i2s)) 778 val |= MOD_BLCS_16BIT; 779 else 780 val |= MOD_BLCP_16BIT; 781 if (is_manager(i2s)) 782 val |= MOD_BLC_16BIT; 783 break; 784 case 24: 785 if (is_secondary(i2s)) 786 val |= MOD_BLCS_24BIT; 787 else 788 val |= MOD_BLCP_24BIT; 789 if (is_manager(i2s)) 790 val |= MOD_BLC_24BIT; 791 break; 792 default: 793 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 794 params_format(params)); 795 return -EINVAL; 796 } 797 798 spin_lock_irqsave(&priv->lock, flags); 799 mod = readl(priv->addr + I2SMOD); 800 mod = (mod & ~mask) | val; 801 writel(mod, priv->addr + I2SMOD); 802 spin_unlock_irqrestore(&priv->lock, flags); 803 804 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 805 806 i2s->frmclk = params_rate(params); 807 808 rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; 809 if (rclksrc && !IS_ERR(rclksrc)) 810 priv->rclk_srcrate = clk_get_rate(rclksrc); 811 812 return 0; 813 } 814 815 /* We set constraints on the substream according to the version of I2S */ 816 static int i2s_startup(struct snd_pcm_substream *substream, 817 struct snd_soc_dai *dai) 818 { 819 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 820 struct i2s_dai *i2s = to_info(dai); 821 struct i2s_dai *other = get_other_dai(i2s); 822 unsigned long flags; 823 824 pm_runtime_get_sync(dai->dev); 825 826 spin_lock_irqsave(&priv->pcm_lock, flags); 827 828 i2s->mode |= DAI_OPENED; 829 830 if (is_manager(other)) 831 i2s->mode &= ~DAI_MANAGER; 832 else 833 i2s->mode |= DAI_MANAGER; 834 835 if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR)) 836 writel(CON_RSTCLR, i2s->priv->addr + I2SCON); 837 838 spin_unlock_irqrestore(&priv->pcm_lock, flags); 839 840 return 0; 841 } 842 843 static void i2s_shutdown(struct snd_pcm_substream *substream, 844 struct snd_soc_dai *dai) 845 { 846 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 847 struct i2s_dai *i2s = to_info(dai); 848 struct i2s_dai *other = get_other_dai(i2s); 849 unsigned long flags; 850 851 spin_lock_irqsave(&priv->pcm_lock, flags); 852 853 i2s->mode &= ~DAI_OPENED; 854 i2s->mode &= ~DAI_MANAGER; 855 856 if (is_opened(other)) 857 other->mode |= DAI_MANAGER; 858 859 /* Reset any constraint on RFS and BFS */ 860 i2s->rfs = 0; 861 i2s->bfs = 0; 862 863 spin_unlock_irqrestore(&priv->pcm_lock, flags); 864 865 pm_runtime_put(dai->dev); 866 } 867 868 static int config_setup(struct i2s_dai *i2s) 869 { 870 struct samsung_i2s_priv *priv = i2s->priv; 871 struct i2s_dai *other = get_other_dai(i2s); 872 unsigned rfs, bfs, blc; 873 u32 psr; 874 875 blc = get_blc(i2s); 876 877 bfs = i2s->bfs; 878 879 if (!bfs && other) 880 bfs = other->bfs; 881 882 /* Select least possible multiple(2) if no constraint set */ 883 if (!bfs) 884 bfs = blc * 2; 885 886 rfs = i2s->rfs; 887 888 if (!rfs && other) 889 rfs = other->rfs; 890 891 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 892 dev_err(&i2s->pdev->dev, 893 "%d-RFS not supported for 24-blc\n", rfs); 894 return -EINVAL; 895 } 896 897 if (!rfs) { 898 if (bfs == 16 || bfs == 32) 899 rfs = 256; 900 else 901 rfs = 384; 902 } 903 904 /* If already setup and running */ 905 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 906 dev_err(&i2s->pdev->dev, 907 "%s:%d Other DAI busy\n", __func__, __LINE__); 908 return -EAGAIN; 909 } 910 911 set_bfs(i2s, bfs); 912 set_rfs(i2s, rfs); 913 914 /* Don't bother with PSR in Slave mode */ 915 if (priv->slave_mode) 916 return 0; 917 918 if (!(priv->quirks & QUIRK_NO_MUXPSR)) { 919 psr = priv->rclk_srcrate / i2s->frmclk / rfs; 920 writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR); 921 dev_dbg(&i2s->pdev->dev, 922 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 923 priv->rclk_srcrate, psr, rfs, bfs); 924 } 925 926 return 0; 927 } 928 929 static int i2s_trigger(struct snd_pcm_substream *substream, 930 int cmd, struct snd_soc_dai *dai) 931 { 932 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 933 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 934 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 935 struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0)); 936 unsigned long flags; 937 938 switch (cmd) { 939 case SNDRV_PCM_TRIGGER_START: 940 case SNDRV_PCM_TRIGGER_RESUME: 941 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 942 pm_runtime_get_sync(dai->dev); 943 spin_lock_irqsave(&priv->lock, flags); 944 945 if (config_setup(i2s)) { 946 spin_unlock_irqrestore(&priv->lock, flags); 947 return -EINVAL; 948 } 949 950 if (capture) 951 i2s_rxctrl(i2s, 1); 952 else 953 i2s_txctrl(i2s, 1); 954 955 spin_unlock_irqrestore(&priv->lock, flags); 956 break; 957 case SNDRV_PCM_TRIGGER_STOP: 958 case SNDRV_PCM_TRIGGER_SUSPEND: 959 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 960 spin_lock_irqsave(&priv->lock, flags); 961 962 if (capture) { 963 i2s_rxctrl(i2s, 0); 964 i2s_fifo(i2s, FIC_RXFLUSH); 965 } else { 966 i2s_txctrl(i2s, 0); 967 i2s_fifo(i2s, FIC_TXFLUSH); 968 } 969 970 spin_unlock_irqrestore(&priv->lock, flags); 971 pm_runtime_put(dai->dev); 972 break; 973 } 974 975 return 0; 976 } 977 978 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 979 int div_id, int div) 980 { 981 struct i2s_dai *i2s = to_info(dai); 982 struct i2s_dai *other = get_other_dai(i2s); 983 984 switch (div_id) { 985 case SAMSUNG_I2S_DIV_BCLK: 986 pm_runtime_get_sync(dai->dev); 987 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 988 || (other && other->bfs && (other->bfs != div))) { 989 pm_runtime_put(dai->dev); 990 dev_err(&i2s->pdev->dev, 991 "%s:%d Other DAI busy\n", __func__, __LINE__); 992 return -EAGAIN; 993 } 994 i2s->bfs = div; 995 pm_runtime_put(dai->dev); 996 break; 997 default: 998 dev_err(&i2s->pdev->dev, 999 "Invalid clock divider(%d)\n", div_id); 1000 return -EINVAL; 1001 } 1002 1003 return 0; 1004 } 1005 1006 static snd_pcm_sframes_t 1007 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 1008 { 1009 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1010 struct i2s_dai *i2s = to_info(dai); 1011 u32 reg = readl(priv->addr + I2SFIC); 1012 snd_pcm_sframes_t delay; 1013 1014 WARN_ON(!pm_runtime_active(dai->dev)); 1015 1016 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 1017 delay = FIC_RXCOUNT(reg); 1018 else if (is_secondary(i2s)) 1019 delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS)); 1020 else 1021 delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f; 1022 1023 return delay; 1024 } 1025 1026 #ifdef CONFIG_PM 1027 static int i2s_suspend(struct snd_soc_component *component) 1028 { 1029 return pm_runtime_force_suspend(component->dev); 1030 } 1031 1032 static int i2s_resume(struct snd_soc_component *component) 1033 { 1034 return pm_runtime_force_resume(component->dev); 1035 } 1036 #else 1037 #define i2s_suspend NULL 1038 #define i2s_resume NULL 1039 #endif 1040 1041 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 1042 { 1043 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1044 struct i2s_dai *i2s = to_info(dai); 1045 struct i2s_dai *other = get_other_dai(i2s); 1046 unsigned long flags; 1047 1048 pm_runtime_get_sync(dai->dev); 1049 1050 if (is_secondary(i2s)) { 1051 /* If this is probe on the secondary DAI */ 1052 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL); 1053 } else { 1054 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, 1055 &i2s->dma_capture); 1056 1057 if (priv->quirks & QUIRK_NEED_RSTCLR) 1058 writel(CON_RSTCLR, priv->addr + I2SCON); 1059 1060 if (priv->quirks & QUIRK_SUPPORTS_IDMA) 1061 idma_reg_addr_init(priv->addr, 1062 other->idma_playback.addr); 1063 } 1064 1065 /* Reset any constraint on RFS and BFS */ 1066 i2s->rfs = 0; 1067 i2s->bfs = 0; 1068 1069 spin_lock_irqsave(&priv->lock, flags); 1070 i2s_txctrl(i2s, 0); 1071 i2s_rxctrl(i2s, 0); 1072 i2s_fifo(i2s, FIC_TXFLUSH); 1073 i2s_fifo(other, FIC_TXFLUSH); 1074 i2s_fifo(i2s, FIC_RXFLUSH); 1075 spin_unlock_irqrestore(&priv->lock, flags); 1076 1077 /* Gate CDCLK by default */ 1078 if (!is_opened(other)) 1079 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 1080 0, SND_SOC_CLOCK_IN); 1081 pm_runtime_put(dai->dev); 1082 1083 return 0; 1084 } 1085 1086 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 1087 { 1088 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1089 struct i2s_dai *i2s = to_info(dai); 1090 unsigned long flags; 1091 1092 pm_runtime_get_sync(dai->dev); 1093 1094 if (!is_secondary(i2s)) { 1095 if (priv->quirks & QUIRK_NEED_RSTCLR) { 1096 spin_lock_irqsave(&priv->lock, flags); 1097 writel(0, priv->addr + I2SCON); 1098 spin_unlock_irqrestore(&priv->lock, flags); 1099 } 1100 } 1101 1102 pm_runtime_put(dai->dev); 1103 1104 return 0; 1105 } 1106 1107 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 1108 .trigger = i2s_trigger, 1109 .hw_params = i2s_hw_params, 1110 .set_fmt = i2s_set_fmt, 1111 .set_clkdiv = i2s_set_clkdiv, 1112 .set_sysclk = i2s_set_sysclk, 1113 .startup = i2s_startup, 1114 .shutdown = i2s_shutdown, 1115 .delay = i2s_delay, 1116 }; 1117 1118 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = { 1119 /* Backend DAI */ 1120 SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0), 1121 SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0), 1122 1123 /* Playback Mixer */ 1124 SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), 1125 }; 1126 1127 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = { 1128 { "Playback Mixer", NULL, "Primary Playback" }, 1129 { "Playback Mixer", NULL, "Secondary Playback" }, 1130 1131 { "Mixer DAI TX", NULL, "Playback Mixer" }, 1132 { "Primary Capture", NULL, "Mixer DAI RX" }, 1133 }; 1134 1135 static const struct snd_soc_component_driver samsung_i2s_component = { 1136 .name = "samsung-i2s", 1137 1138 .dapm_widgets = samsung_i2s_widgets, 1139 .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets), 1140 1141 .dapm_routes = samsung_i2s_dapm_routes, 1142 .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes), 1143 1144 .suspend = i2s_suspend, 1145 .resume = i2s_resume, 1146 }; 1147 1148 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ 1149 SNDRV_PCM_FMTBIT_S24_LE) 1150 1151 static int i2s_alloc_dais(struct samsung_i2s_priv *priv, 1152 const struct samsung_i2s_dai_data *i2s_dai_data, 1153 int num_dais) 1154 { 1155 static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" }; 1156 static const char *stream_names[] = { "Primary Playback", 1157 "Secondary Playback" }; 1158 struct snd_soc_dai_driver *dai_drv; 1159 int i; 1160 1161 priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais, 1162 sizeof(struct i2s_dai), GFP_KERNEL); 1163 if (!priv->dai) 1164 return -ENOMEM; 1165 1166 priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais, 1167 sizeof(*dai_drv), GFP_KERNEL); 1168 if (!priv->dai_drv) 1169 return -ENOMEM; 1170 1171 for (i = 0; i < num_dais; i++) { 1172 dai_drv = &priv->dai_drv[i]; 1173 1174 dai_drv->probe = samsung_i2s_dai_probe; 1175 dai_drv->remove = samsung_i2s_dai_remove; 1176 1177 dai_drv->symmetric_rate = 1; 1178 dai_drv->ops = &samsung_i2s_dai_ops; 1179 1180 dai_drv->playback.channels_min = 1; 1181 dai_drv->playback.channels_max = 2; 1182 dai_drv->playback.rates = i2s_dai_data->pcm_rates; 1183 dai_drv->playback.formats = SAMSUNG_I2S_FMTS; 1184 dai_drv->playback.stream_name = stream_names[i]; 1185 1186 dai_drv->id = i + 1; 1187 dai_drv->name = dai_names[i]; 1188 1189 priv->dai[i].drv = &priv->dai_drv[i]; 1190 priv->dai[i].pdev = priv->pdev; 1191 } 1192 1193 /* Initialize capture only for the primary DAI */ 1194 dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1]; 1195 1196 dai_drv->capture.channels_min = 1; 1197 dai_drv->capture.channels_max = 2; 1198 dai_drv->capture.rates = i2s_dai_data->pcm_rates; 1199 dai_drv->capture.formats = SAMSUNG_I2S_FMTS; 1200 dai_drv->capture.stream_name = "Primary Capture"; 1201 1202 return 0; 1203 } 1204 1205 #ifdef CONFIG_PM 1206 static int i2s_runtime_suspend(struct device *dev) 1207 { 1208 struct samsung_i2s_priv *priv = dev_get_drvdata(dev); 1209 1210 priv->suspend_i2smod = readl(priv->addr + I2SMOD); 1211 priv->suspend_i2scon = readl(priv->addr + I2SCON); 1212 priv->suspend_i2spsr = readl(priv->addr + I2SPSR); 1213 1214 clk_disable_unprepare(priv->op_clk); 1215 clk_disable_unprepare(priv->clk); 1216 1217 return 0; 1218 } 1219 1220 static int i2s_runtime_resume(struct device *dev) 1221 { 1222 struct samsung_i2s_priv *priv = dev_get_drvdata(dev); 1223 int ret; 1224 1225 ret = clk_prepare_enable(priv->clk); 1226 if (ret) 1227 return ret; 1228 1229 if (priv->op_clk) { 1230 ret = clk_prepare_enable(priv->op_clk); 1231 if (ret) { 1232 clk_disable_unprepare(priv->clk); 1233 return ret; 1234 } 1235 } 1236 1237 writel(priv->suspend_i2scon, priv->addr + I2SCON); 1238 writel(priv->suspend_i2smod, priv->addr + I2SMOD); 1239 writel(priv->suspend_i2spsr, priv->addr + I2SPSR); 1240 1241 return 0; 1242 } 1243 #endif /* CONFIG_PM */ 1244 1245 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv) 1246 { 1247 int i; 1248 1249 for (i = 0; i < priv->clk_data.clk_num; i++) { 1250 if (!IS_ERR(priv->clk_table[i])) 1251 clk_unregister(priv->clk_table[i]); 1252 } 1253 } 1254 1255 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv) 1256 { 1257 of_clk_del_provider(priv->pdev->dev.of_node); 1258 i2s_unregister_clocks(priv); 1259 } 1260 1261 1262 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv) 1263 { 1264 1265 const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" }; 1266 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" }; 1267 const char *p_names[2] = { NULL }; 1268 struct device *dev = &priv->pdev->dev; 1269 const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs; 1270 const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)]; 1271 struct clk *rclksrc; 1272 int ret, i; 1273 1274 /* Register the clock provider only if it's expected in the DTB */ 1275 if (!of_find_property(dev->of_node, "#clock-cells", NULL)) 1276 return 0; 1277 1278 /* Get the RCLKSRC mux clock parent clock names */ 1279 for (i = 0; i < ARRAY_SIZE(p_names); i++) { 1280 rclksrc = clk_get(dev, clk_name[i]); 1281 if (IS_ERR(rclksrc)) 1282 continue; 1283 p_names[i] = __clk_get_name(rclksrc); 1284 clk_put(rclksrc); 1285 } 1286 1287 for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) { 1288 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s", 1289 dev_name(dev), i2s_clk_desc[i]); 1290 if (!i2s_clk_name[i]) 1291 return -ENOMEM; 1292 } 1293 1294 if (!(priv->quirks & QUIRK_NO_MUXPSR)) { 1295 /* Activate the prescaler */ 1296 u32 val = readl(priv->addr + I2SPSR); 1297 writel(val | PSR_PSREN, priv->addr + I2SPSR); 1298 1299 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, 1300 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names, 1301 ARRAY_SIZE(p_names), 1302 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, 1303 priv->addr + I2SMOD, reg_info->rclksrc_off, 1304 1, 0, &priv->lock); 1305 1306 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, 1307 i2s_clk_name[CLK_I2S_RCLK_PSR], 1308 i2s_clk_name[CLK_I2S_RCLK_SRC], 1309 CLK_SET_RATE_PARENT, 1310 priv->addr + I2SPSR, 8, 6, 0, &priv->lock); 1311 1312 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR]; 1313 priv->clk_data.clk_num = 2; 1314 } 1315 1316 priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, 1317 i2s_clk_name[CLK_I2S_CDCLK], p_names[0], 1318 CLK_SET_RATE_PARENT, 1319 priv->addr + I2SMOD, reg_info->cdclkcon_off, 1320 CLK_GATE_SET_TO_DISABLE, &priv->lock); 1321 1322 priv->clk_data.clk_num += 1; 1323 priv->clk_data.clks = priv->clk_table; 1324 1325 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, 1326 &priv->clk_data); 1327 if (ret < 0) { 1328 dev_err(dev, "failed to add clock provider: %d\n", ret); 1329 i2s_unregister_clocks(priv); 1330 } 1331 1332 return ret; 1333 } 1334 1335 /* Create platform device for the secondary PCM */ 1336 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv) 1337 { 1338 struct platform_device *pdev_sec; 1339 const char *devname; 1340 int ret; 1341 1342 devname = devm_kasprintf(&priv->pdev->dev, GFP_KERNEL, "%s-sec", 1343 dev_name(&priv->pdev->dev)); 1344 if (!devname) 1345 return -ENOMEM; 1346 1347 pdev_sec = platform_device_alloc(devname, -1); 1348 if (!pdev_sec) 1349 return -ENOMEM; 1350 1351 pdev_sec->driver_override = kstrdup("samsung-i2s", GFP_KERNEL); 1352 1353 ret = platform_device_add(pdev_sec); 1354 if (ret < 0) { 1355 platform_device_put(pdev_sec); 1356 return ret; 1357 } 1358 1359 ret = device_attach(&pdev_sec->dev); 1360 if (ret <= 0) { 1361 platform_device_unregister(priv->pdev_sec); 1362 dev_info(&pdev_sec->dev, "device_attach() failed\n"); 1363 return ret; 1364 } 1365 1366 priv->pdev_sec = pdev_sec; 1367 1368 return 0; 1369 } 1370 1371 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv) 1372 { 1373 platform_device_unregister(priv->pdev_sec); 1374 priv->pdev_sec = NULL; 1375 } 1376 1377 static int samsung_i2s_probe(struct platform_device *pdev) 1378 { 1379 struct i2s_dai *pri_dai, *sec_dai = NULL; 1380 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1381 u32 regs_base, idma_addr = 0; 1382 struct device_node *np = pdev->dev.of_node; 1383 const struct samsung_i2s_dai_data *i2s_dai_data; 1384 const struct platform_device_id *id; 1385 struct samsung_i2s_priv *priv; 1386 struct resource *res; 1387 int num_dais, ret; 1388 1389 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { 1390 i2s_dai_data = of_device_get_match_data(&pdev->dev); 1391 } else { 1392 id = platform_get_device_id(pdev); 1393 1394 /* Nothing to do if it is the secondary device probe */ 1395 if (!id) 1396 return 0; 1397 1398 i2s_dai_data = (struct samsung_i2s_dai_data *)id->driver_data; 1399 } 1400 1401 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 1402 if (!priv) 1403 return -ENOMEM; 1404 1405 if (np) { 1406 priv->quirks = i2s_dai_data->quirks; 1407 } else { 1408 if (!i2s_pdata) { 1409 dev_err(&pdev->dev, "Missing platform data\n"); 1410 return -EINVAL; 1411 } 1412 priv->quirks = i2s_pdata->type.quirks; 1413 } 1414 1415 num_dais = (priv->quirks & QUIRK_SEC_DAI) ? 2 : 1; 1416 priv->pdev = pdev; 1417 priv->variant_regs = i2s_dai_data->i2s_variant_regs; 1418 1419 ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais); 1420 if (ret < 0) 1421 return ret; 1422 1423 pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1]; 1424 1425 spin_lock_init(&priv->lock); 1426 spin_lock_init(&priv->pcm_lock); 1427 1428 if (!np) { 1429 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback; 1430 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture; 1431 pri_dai->filter = i2s_pdata->dma_filter; 1432 1433 idma_addr = i2s_pdata->type.idma_addr; 1434 } else { 1435 if (of_property_read_u32(np, "samsung,idma-addr", 1436 &idma_addr)) { 1437 if (priv->quirks & QUIRK_SUPPORTS_IDMA) { 1438 dev_info(&pdev->dev, "idma address is not"\ 1439 "specified"); 1440 } 1441 } 1442 } 1443 1444 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1445 priv->addr = devm_ioremap_resource(&pdev->dev, res); 1446 if (IS_ERR(priv->addr)) 1447 return PTR_ERR(priv->addr); 1448 1449 regs_base = res->start; 1450 1451 priv->clk = devm_clk_get(&pdev->dev, "iis"); 1452 if (IS_ERR(priv->clk)) { 1453 dev_err(&pdev->dev, "Failed to get iis clock\n"); 1454 return PTR_ERR(priv->clk); 1455 } 1456 1457 ret = clk_prepare_enable(priv->clk); 1458 if (ret != 0) { 1459 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret); 1460 return ret; 1461 } 1462 pri_dai->dma_playback.addr = regs_base + I2STXD; 1463 pri_dai->dma_capture.addr = regs_base + I2SRXD; 1464 pri_dai->dma_playback.chan_name = "tx"; 1465 pri_dai->dma_capture.chan_name = "rx"; 1466 pri_dai->dma_playback.addr_width = 4; 1467 pri_dai->dma_capture.addr_width = 4; 1468 pri_dai->priv = priv; 1469 1470 if (priv->quirks & QUIRK_PRI_6CHAN) 1471 pri_dai->drv->playback.channels_max = 6; 1472 1473 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter, 1474 "tx", "rx", NULL); 1475 if (ret < 0) 1476 goto err_disable_clk; 1477 1478 if (priv->quirks & QUIRK_SEC_DAI) { 1479 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1]; 1480 1481 sec_dai->dma_playback.addr = regs_base + I2STXDS; 1482 sec_dai->dma_playback.chan_name = "tx-sec"; 1483 1484 if (!np) { 1485 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec; 1486 sec_dai->filter = i2s_pdata->dma_filter; 1487 } 1488 1489 sec_dai->dma_playback.addr_width = 4; 1490 sec_dai->idma_playback.addr = idma_addr; 1491 sec_dai->pri_dai = pri_dai; 1492 sec_dai->priv = priv; 1493 pri_dai->sec_dai = sec_dai; 1494 1495 ret = i2s_create_secondary_device(priv); 1496 if (ret < 0) 1497 goto err_disable_clk; 1498 1499 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev, 1500 sec_dai->filter, "tx-sec", NULL, 1501 &pdev->dev); 1502 if (ret < 0) 1503 goto err_del_sec; 1504 1505 } 1506 1507 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1508 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1509 ret = -EINVAL; 1510 goto err_del_sec; 1511 } 1512 1513 dev_set_drvdata(&pdev->dev, priv); 1514 1515 ret = devm_snd_soc_register_component(&pdev->dev, 1516 &samsung_i2s_component, 1517 priv->dai_drv, num_dais); 1518 if (ret < 0) 1519 goto err_del_sec; 1520 1521 pm_runtime_set_active(&pdev->dev); 1522 pm_runtime_enable(&pdev->dev); 1523 1524 ret = i2s_register_clock_provider(priv); 1525 if (ret < 0) 1526 goto err_disable_pm; 1527 1528 priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]); 1529 1530 return 0; 1531 1532 err_disable_pm: 1533 pm_runtime_disable(&pdev->dev); 1534 err_del_sec: 1535 i2s_delete_secondary_device(priv); 1536 err_disable_clk: 1537 clk_disable_unprepare(priv->clk); 1538 return ret; 1539 } 1540 1541 static int samsung_i2s_remove(struct platform_device *pdev) 1542 { 1543 struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev); 1544 1545 /* The secondary device has no driver data assigned */ 1546 if (!priv) 1547 return 0; 1548 1549 pm_runtime_get_sync(&pdev->dev); 1550 pm_runtime_disable(&pdev->dev); 1551 1552 i2s_unregister_clock_provider(priv); 1553 i2s_delete_secondary_device(priv); 1554 clk_disable_unprepare(priv->clk); 1555 1556 pm_runtime_put_noidle(&pdev->dev); 1557 1558 return 0; 1559 } 1560 1561 static const struct samsung_i2s_variant_regs i2sv3_regs = { 1562 .bfs_off = 1, 1563 .rfs_off = 3, 1564 .sdf_off = 5, 1565 .txr_off = 8, 1566 .rclksrc_off = 10, 1567 .mss_off = 11, 1568 .cdclkcon_off = 12, 1569 .lrp_off = 7, 1570 .bfs_mask = 0x3, 1571 .rfs_mask = 0x3, 1572 .ftx0cnt_off = 8, 1573 }; 1574 1575 static const struct samsung_i2s_variant_regs i2sv6_regs = { 1576 .bfs_off = 0, 1577 .rfs_off = 4, 1578 .sdf_off = 6, 1579 .txr_off = 8, 1580 .rclksrc_off = 10, 1581 .mss_off = 11, 1582 .cdclkcon_off = 12, 1583 .lrp_off = 15, 1584 .bfs_mask = 0xf, 1585 .rfs_mask = 0x3, 1586 .ftx0cnt_off = 8, 1587 }; 1588 1589 static const struct samsung_i2s_variant_regs i2sv7_regs = { 1590 .bfs_off = 0, 1591 .rfs_off = 4, 1592 .sdf_off = 7, 1593 .txr_off = 9, 1594 .rclksrc_off = 11, 1595 .mss_off = 12, 1596 .cdclkcon_off = 22, 1597 .lrp_off = 15, 1598 .bfs_mask = 0xf, 1599 .rfs_mask = 0x7, 1600 .ftx0cnt_off = 0, 1601 }; 1602 1603 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = { 1604 .bfs_off = 0, 1605 .rfs_off = 3, 1606 .sdf_off = 6, 1607 .txr_off = 8, 1608 .rclksrc_off = 10, 1609 .mss_off = 11, 1610 .cdclkcon_off = 12, 1611 .lrp_off = 15, 1612 .bfs_mask = 0x7, 1613 .rfs_mask = 0x7, 1614 .ftx0cnt_off = 8, 1615 }; 1616 1617 static const struct samsung_i2s_dai_data i2sv3_dai_type = { 1618 .quirks = QUIRK_NO_MUXPSR, 1619 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1620 .i2s_variant_regs = &i2sv3_regs, 1621 }; 1622 1623 static const struct samsung_i2s_dai_data i2sv5_dai_type __maybe_unused = { 1624 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1625 QUIRK_SUPPORTS_IDMA, 1626 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1627 .i2s_variant_regs = &i2sv3_regs, 1628 }; 1629 1630 static const struct samsung_i2s_dai_data i2sv6_dai_type __maybe_unused = { 1631 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1632 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA, 1633 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1634 .i2s_variant_regs = &i2sv6_regs, 1635 }; 1636 1637 static const struct samsung_i2s_dai_data i2sv7_dai_type __maybe_unused = { 1638 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1639 QUIRK_SUPPORTS_TDM, 1640 .pcm_rates = SNDRV_PCM_RATE_8000_192000, 1641 .i2s_variant_regs = &i2sv7_regs, 1642 }; 1643 1644 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 __maybe_unused = { 1645 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR, 1646 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1647 .i2s_variant_regs = &i2sv5_i2s1_regs, 1648 }; 1649 1650 static const struct platform_device_id samsung_i2s_driver_ids[] = { 1651 { 1652 .name = "samsung-i2s", 1653 .driver_data = (kernel_ulong_t)&i2sv3_dai_type, 1654 }, 1655 {}, 1656 }; 1657 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1658 1659 #ifdef CONFIG_OF 1660 static const struct of_device_id exynos_i2s_match[] = { 1661 { 1662 .compatible = "samsung,s3c6410-i2s", 1663 .data = &i2sv3_dai_type, 1664 }, { 1665 .compatible = "samsung,s5pv210-i2s", 1666 .data = &i2sv5_dai_type, 1667 }, { 1668 .compatible = "samsung,exynos5420-i2s", 1669 .data = &i2sv6_dai_type, 1670 }, { 1671 .compatible = "samsung,exynos7-i2s", 1672 .data = &i2sv7_dai_type, 1673 }, { 1674 .compatible = "samsung,exynos7-i2s1", 1675 .data = &i2sv5_dai_type_i2s1, 1676 }, 1677 {}, 1678 }; 1679 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1680 #endif 1681 1682 static const struct dev_pm_ops samsung_i2s_pm = { 1683 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1684 i2s_runtime_resume, NULL) 1685 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1686 pm_runtime_force_resume) 1687 }; 1688 1689 static struct platform_driver samsung_i2s_driver = { 1690 .probe = samsung_i2s_probe, 1691 .remove = samsung_i2s_remove, 1692 .id_table = samsung_i2s_driver_ids, 1693 .driver = { 1694 .name = "samsung-i2s", 1695 .of_match_table = of_match_ptr(exynos_i2s_match), 1696 .pm = &samsung_i2s_pm, 1697 }, 1698 }; 1699 1700 module_platform_driver(samsung_i2s_driver); 1701 1702 /* Module information */ 1703 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1704 MODULE_DESCRIPTION("Samsung I2S Interface"); 1705 MODULE_ALIAS("platform:samsung-i2s"); 1706 MODULE_LICENSE("GPL"); 1707