1 /* sound/soc/samsung/i2s.c 2 * 3 * ALSA SoC Audio Layer - Samsung I2S Controller driver 4 * 5 * Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 * Jaswinder Singh <jassisinghbrar@gmail.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <dt-bindings/sound/samsung-i2s.h> 14 #include <linux/delay.h> 15 #include <linux/slab.h> 16 #include <linux/clk.h> 17 #include <linux/clk-provider.h> 18 #include <linux/io.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/of_device.h> 22 #include <linux/of_gpio.h> 23 #include <linux/pm_runtime.h> 24 25 #include <sound/soc.h> 26 #include <sound/pcm_params.h> 27 28 #include <linux/platform_data/asoc-s3c.h> 29 30 #include "dma.h" 31 #include "idma.h" 32 #include "i2s.h" 33 #include "i2s-regs.h" 34 35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 36 37 struct samsung_i2s_variant_regs { 38 unsigned int bfs_off; 39 unsigned int rfs_off; 40 unsigned int sdf_off; 41 unsigned int txr_off; 42 unsigned int rclksrc_off; 43 unsigned int mss_off; 44 unsigned int cdclkcon_off; 45 unsigned int lrp_off; 46 unsigned int bfs_mask; 47 unsigned int rfs_mask; 48 unsigned int ftx0cnt_off; 49 }; 50 51 struct samsung_i2s_dai_data { 52 u32 quirks; 53 unsigned int pcm_rates; 54 const struct samsung_i2s_variant_regs *i2s_variant_regs; 55 }; 56 57 struct i2s_dai { 58 /* Platform device for this DAI */ 59 struct platform_device *pdev; 60 /* Memory mapped SFR region */ 61 void __iomem *addr; 62 /* Rate of RCLK source clock */ 63 unsigned long rclk_srcrate; 64 /* Frame Clock */ 65 unsigned frmclk; 66 /* 67 * Specifically requested RCLK,BCLK by MACHINE Driver. 68 * 0 indicates CPU driver is free to choose any value. 69 */ 70 unsigned rfs, bfs; 71 /* I2S Controller's core clock */ 72 struct clk *clk; 73 /* Clock for generating I2S signals */ 74 struct clk *op_clk; 75 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 76 struct i2s_dai *pri_dai; 77 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 78 struct i2s_dai *sec_dai; 79 #define DAI_OPENED (1 << 0) /* Dai is opened */ 80 #define DAI_MANAGER (1 << 1) /* Dai is the manager */ 81 unsigned mode; 82 /* Driver for this DAI */ 83 struct snd_soc_dai_driver i2s_dai_drv; 84 /* DMA parameters */ 85 struct snd_dmaengine_dai_dma_data dma_playback; 86 struct snd_dmaengine_dai_dma_data dma_capture; 87 struct snd_dmaengine_dai_dma_data idma_playback; 88 dma_filter_fn filter; 89 u32 quirks; 90 u32 suspend_i2smod; 91 u32 suspend_i2scon; 92 u32 suspend_i2spsr; 93 const struct samsung_i2s_variant_regs *variant_regs; 94 95 /* Spinlock protecting access to the device's registers */ 96 spinlock_t spinlock; 97 spinlock_t *lock; 98 99 /* Below fields are only valid if this is the primary FIFO */ 100 struct clk *clk_table[3]; 101 struct clk_onecell_data clk_data; 102 }; 103 104 /* Lock for cross i/f checks */ 105 static DEFINE_SPINLOCK(lock); 106 107 /* If this is the 'overlay' stereo DAI */ 108 static inline bool is_secondary(struct i2s_dai *i2s) 109 { 110 return i2s->pri_dai ? true : false; 111 } 112 113 /* If operating in SoC-Slave mode */ 114 static inline bool is_slave(struct i2s_dai *i2s) 115 { 116 u32 mod = readl(i2s->addr + I2SMOD); 117 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false; 118 } 119 120 /* If this interface of the controller is transmitting data */ 121 static inline bool tx_active(struct i2s_dai *i2s) 122 { 123 u32 active; 124 125 if (!i2s) 126 return false; 127 128 active = readl(i2s->addr + I2SCON); 129 130 if (is_secondary(i2s)) 131 active &= CON_TXSDMA_ACTIVE; 132 else 133 active &= CON_TXDMA_ACTIVE; 134 135 return active ? true : false; 136 } 137 138 /* Return pointer to the other DAI */ 139 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s) 140 { 141 return i2s->pri_dai ? : i2s->sec_dai; 142 } 143 144 /* If the other interface of the controller is transmitting data */ 145 static inline bool other_tx_active(struct i2s_dai *i2s) 146 { 147 struct i2s_dai *other = get_other_dai(i2s); 148 149 return tx_active(other); 150 } 151 152 /* If any interface of the controller is transmitting data */ 153 static inline bool any_tx_active(struct i2s_dai *i2s) 154 { 155 return tx_active(i2s) || other_tx_active(i2s); 156 } 157 158 /* If this interface of the controller is receiving data */ 159 static inline bool rx_active(struct i2s_dai *i2s) 160 { 161 u32 active; 162 163 if (!i2s) 164 return false; 165 166 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; 167 168 return active ? true : false; 169 } 170 171 /* If the other interface of the controller is receiving data */ 172 static inline bool other_rx_active(struct i2s_dai *i2s) 173 { 174 struct i2s_dai *other = get_other_dai(i2s); 175 176 return rx_active(other); 177 } 178 179 /* If any interface of the controller is receiving data */ 180 static inline bool any_rx_active(struct i2s_dai *i2s) 181 { 182 return rx_active(i2s) || other_rx_active(i2s); 183 } 184 185 /* If the other DAI is transmitting or receiving data */ 186 static inline bool other_active(struct i2s_dai *i2s) 187 { 188 return other_rx_active(i2s) || other_tx_active(i2s); 189 } 190 191 /* If this DAI is transmitting or receiving data */ 192 static inline bool this_active(struct i2s_dai *i2s) 193 { 194 return tx_active(i2s) || rx_active(i2s); 195 } 196 197 /* If the controller is active anyway */ 198 static inline bool any_active(struct i2s_dai *i2s) 199 { 200 return this_active(i2s) || other_active(i2s); 201 } 202 203 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 204 { 205 return snd_soc_dai_get_drvdata(dai); 206 } 207 208 static inline bool is_opened(struct i2s_dai *i2s) 209 { 210 if (i2s && (i2s->mode & DAI_OPENED)) 211 return true; 212 else 213 return false; 214 } 215 216 static inline bool is_manager(struct i2s_dai *i2s) 217 { 218 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 219 return true; 220 else 221 return false; 222 } 223 224 /* Read RCLK of I2S (in multiples of LRCLK) */ 225 static inline unsigned get_rfs(struct i2s_dai *i2s) 226 { 227 u32 rfs; 228 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off; 229 rfs &= i2s->variant_regs->rfs_mask; 230 231 switch (rfs) { 232 case 7: return 192; 233 case 6: return 96; 234 case 5: return 128; 235 case 4: return 64; 236 case 3: return 768; 237 case 2: return 384; 238 case 1: return 512; 239 default: return 256; 240 } 241 } 242 243 /* Write RCLK of I2S (in multiples of LRCLK) */ 244 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 245 { 246 u32 mod = readl(i2s->addr + I2SMOD); 247 int rfs_shift = i2s->variant_regs->rfs_off; 248 249 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift); 250 251 switch (rfs) { 252 case 192: 253 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift); 254 break; 255 case 96: 256 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift); 257 break; 258 case 128: 259 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift); 260 break; 261 case 64: 262 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift); 263 break; 264 case 768: 265 mod |= (MOD_RCLK_768FS << rfs_shift); 266 break; 267 case 512: 268 mod |= (MOD_RCLK_512FS << rfs_shift); 269 break; 270 case 384: 271 mod |= (MOD_RCLK_384FS << rfs_shift); 272 break; 273 default: 274 mod |= (MOD_RCLK_256FS << rfs_shift); 275 break; 276 } 277 278 writel(mod, i2s->addr + I2SMOD); 279 } 280 281 /* Read Bit-Clock of I2S (in multiples of LRCLK) */ 282 static inline unsigned get_bfs(struct i2s_dai *i2s) 283 { 284 u32 bfs; 285 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off; 286 bfs &= i2s->variant_regs->bfs_mask; 287 288 switch (bfs) { 289 case 8: return 256; 290 case 7: return 192; 291 case 6: return 128; 292 case 5: return 96; 293 case 4: return 64; 294 case 3: return 24; 295 case 2: return 16; 296 case 1: return 48; 297 default: return 32; 298 } 299 } 300 301 /* Write Bit-Clock of I2S (in multiples of LRCLK) */ 302 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 303 { 304 u32 mod = readl(i2s->addr + I2SMOD); 305 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM; 306 int bfs_shift = i2s->variant_regs->bfs_off; 307 308 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ 309 if (!tdm && bfs > 48) { 310 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); 311 return; 312 } 313 314 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift); 315 316 switch (bfs) { 317 case 48: 318 mod |= (MOD_BCLK_48FS << bfs_shift); 319 break; 320 case 32: 321 mod |= (MOD_BCLK_32FS << bfs_shift); 322 break; 323 case 24: 324 mod |= (MOD_BCLK_24FS << bfs_shift); 325 break; 326 case 16: 327 mod |= (MOD_BCLK_16FS << bfs_shift); 328 break; 329 case 64: 330 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); 331 break; 332 case 96: 333 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); 334 break; 335 case 128: 336 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); 337 break; 338 case 192: 339 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); 340 break; 341 case 256: 342 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); 343 break; 344 default: 345 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 346 return; 347 } 348 349 writel(mod, i2s->addr + I2SMOD); 350 } 351 352 /* Sample-Size */ 353 static inline int get_blc(struct i2s_dai *i2s) 354 { 355 int blc = readl(i2s->addr + I2SMOD); 356 357 blc = (blc >> 13) & 0x3; 358 359 switch (blc) { 360 case 2: return 24; 361 case 1: return 8; 362 default: return 16; 363 } 364 } 365 366 /* TX Channel Control */ 367 static void i2s_txctrl(struct i2s_dai *i2s, int on) 368 { 369 void __iomem *addr = i2s->addr; 370 int txr_off = i2s->variant_regs->txr_off; 371 u32 con = readl(addr + I2SCON); 372 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 373 374 if (on) { 375 con |= CON_ACTIVE; 376 con &= ~CON_TXCH_PAUSE; 377 378 if (is_secondary(i2s)) { 379 con |= CON_TXSDMA_ACTIVE; 380 con &= ~CON_TXSDMA_PAUSE; 381 } else { 382 con |= CON_TXDMA_ACTIVE; 383 con &= ~CON_TXDMA_PAUSE; 384 } 385 386 if (any_rx_active(i2s)) 387 mod |= 2 << txr_off; 388 else 389 mod |= 0 << txr_off; 390 } else { 391 if (is_secondary(i2s)) { 392 con |= CON_TXSDMA_PAUSE; 393 con &= ~CON_TXSDMA_ACTIVE; 394 } else { 395 con |= CON_TXDMA_PAUSE; 396 con &= ~CON_TXDMA_ACTIVE; 397 } 398 399 if (other_tx_active(i2s)) { 400 writel(con, addr + I2SCON); 401 return; 402 } 403 404 con |= CON_TXCH_PAUSE; 405 406 if (any_rx_active(i2s)) 407 mod |= 1 << txr_off; 408 else 409 con &= ~CON_ACTIVE; 410 } 411 412 writel(mod, addr + I2SMOD); 413 writel(con, addr + I2SCON); 414 } 415 416 /* RX Channel Control */ 417 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 418 { 419 void __iomem *addr = i2s->addr; 420 int txr_off = i2s->variant_regs->txr_off; 421 u32 con = readl(addr + I2SCON); 422 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 423 424 if (on) { 425 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 426 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 427 428 if (any_tx_active(i2s)) 429 mod |= 2 << txr_off; 430 else 431 mod |= 1 << txr_off; 432 } else { 433 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 434 con &= ~CON_RXDMA_ACTIVE; 435 436 if (any_tx_active(i2s)) 437 mod |= 0 << txr_off; 438 else 439 con &= ~CON_ACTIVE; 440 } 441 442 writel(mod, addr + I2SMOD); 443 writel(con, addr + I2SCON); 444 } 445 446 /* Flush FIFO of an interface */ 447 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 448 { 449 void __iomem *fic; 450 u32 val; 451 452 if (!i2s) 453 return; 454 455 if (is_secondary(i2s)) 456 fic = i2s->addr + I2SFICS; 457 else 458 fic = i2s->addr + I2SFIC; 459 460 /* Flush the FIFO */ 461 writel(readl(fic) | flush, fic); 462 463 /* Be patient */ 464 val = msecs_to_loops(1) / 1000; /* 1 usec */ 465 while (--val) 466 cpu_relax(); 467 468 writel(readl(fic) & ~flush, fic); 469 } 470 471 static int i2s_set_sysclk(struct snd_soc_dai *dai, 472 int clk_id, unsigned int rfs, int dir) 473 { 474 struct i2s_dai *i2s = to_info(dai); 475 struct i2s_dai *other = get_other_dai(i2s); 476 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs; 477 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off; 478 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off; 479 u32 mod, mask, val = 0; 480 unsigned long flags; 481 int ret = 0; 482 483 pm_runtime_get_sync(dai->dev); 484 485 spin_lock_irqsave(i2s->lock, flags); 486 mod = readl(i2s->addr + I2SMOD); 487 spin_unlock_irqrestore(i2s->lock, flags); 488 489 switch (clk_id) { 490 case SAMSUNG_I2S_OPCLK: 491 mask = MOD_OPCLK_MASK; 492 val = dir; 493 break; 494 case SAMSUNG_I2S_CDCLK: 495 mask = 1 << i2s_regs->cdclkcon_off; 496 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 497 if (dir == SND_SOC_CLOCK_IN) 498 rfs = 0; 499 500 if ((rfs && other && other->rfs && (other->rfs != rfs)) || 501 (any_active(i2s) && 502 (((dir == SND_SOC_CLOCK_IN) 503 && !(mod & cdcon_mask)) || 504 ((dir == SND_SOC_CLOCK_OUT) 505 && (mod & cdcon_mask))))) { 506 dev_err(&i2s->pdev->dev, 507 "%s:%d Other DAI busy\n", __func__, __LINE__); 508 ret = -EAGAIN; 509 goto err; 510 } 511 512 if (dir == SND_SOC_CLOCK_IN) 513 val = 1 << i2s_regs->cdclkcon_off; 514 515 i2s->rfs = rfs; 516 break; 517 518 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 519 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 520 mask = 1 << i2s_regs->rclksrc_off; 521 522 if ((i2s->quirks & QUIRK_NO_MUXPSR) 523 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 524 clk_id = 0; 525 else 526 clk_id = 1; 527 528 if (!any_active(i2s)) { 529 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) { 530 if ((clk_id && !(mod & rsrc_mask)) || 531 (!clk_id && (mod & rsrc_mask))) { 532 clk_disable_unprepare(i2s->op_clk); 533 clk_put(i2s->op_clk); 534 } else { 535 i2s->rclk_srcrate = 536 clk_get_rate(i2s->op_clk); 537 goto done; 538 } 539 } 540 541 if (clk_id) 542 i2s->op_clk = clk_get(&i2s->pdev->dev, 543 "i2s_opclk1"); 544 else 545 i2s->op_clk = clk_get(&i2s->pdev->dev, 546 "i2s_opclk0"); 547 548 if (WARN_ON(IS_ERR(i2s->op_clk))) { 549 ret = PTR_ERR(i2s->op_clk); 550 i2s->op_clk = NULL; 551 goto err; 552 } 553 554 ret = clk_prepare_enable(i2s->op_clk); 555 if (ret) 556 goto err; 557 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); 558 559 /* Over-ride the other's */ 560 if (other) { 561 other->op_clk = i2s->op_clk; 562 other->rclk_srcrate = i2s->rclk_srcrate; 563 } 564 } else if ((!clk_id && (mod & rsrc_mask)) 565 || (clk_id && !(mod & rsrc_mask))) { 566 dev_err(&i2s->pdev->dev, 567 "%s:%d Other DAI busy\n", __func__, __LINE__); 568 ret = -EAGAIN; 569 goto err; 570 } else { 571 /* Call can't be on the active DAI */ 572 i2s->op_clk = other->op_clk; 573 i2s->rclk_srcrate = other->rclk_srcrate; 574 goto done; 575 } 576 577 if (clk_id == 1) 578 val = 1 << i2s_regs->rclksrc_off; 579 break; 580 default: 581 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 582 ret = -EINVAL; 583 goto err; 584 } 585 586 spin_lock_irqsave(i2s->lock, flags); 587 mod = readl(i2s->addr + I2SMOD); 588 mod = (mod & ~mask) | val; 589 writel(mod, i2s->addr + I2SMOD); 590 spin_unlock_irqrestore(i2s->lock, flags); 591 done: 592 pm_runtime_put(dai->dev); 593 594 return 0; 595 err: 596 pm_runtime_put(dai->dev); 597 return ret; 598 } 599 600 static int i2s_set_fmt(struct snd_soc_dai *dai, 601 unsigned int fmt) 602 { 603 struct i2s_dai *i2s = to_info(dai); 604 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave; 605 u32 mod, tmp = 0; 606 unsigned long flags; 607 608 lrp_shift = i2s->variant_regs->lrp_off; 609 sdf_shift = i2s->variant_regs->sdf_off; 610 mod_slave = 1 << i2s->variant_regs->mss_off; 611 612 sdf_mask = MOD_SDF_MASK << sdf_shift; 613 lrp_rlow = MOD_LR_RLOW << lrp_shift; 614 615 /* Format is priority */ 616 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 617 case SND_SOC_DAIFMT_RIGHT_J: 618 tmp |= lrp_rlow; 619 tmp |= (MOD_SDF_MSB << sdf_shift); 620 break; 621 case SND_SOC_DAIFMT_LEFT_J: 622 tmp |= lrp_rlow; 623 tmp |= (MOD_SDF_LSB << sdf_shift); 624 break; 625 case SND_SOC_DAIFMT_I2S: 626 tmp |= (MOD_SDF_IIS << sdf_shift); 627 break; 628 default: 629 dev_err(&i2s->pdev->dev, "Format not supported\n"); 630 return -EINVAL; 631 } 632 633 /* 634 * INV flag is relative to the FORMAT flag - if set it simply 635 * flips the polarity specified by the Standard 636 */ 637 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 638 case SND_SOC_DAIFMT_NB_NF: 639 break; 640 case SND_SOC_DAIFMT_NB_IF: 641 if (tmp & lrp_rlow) 642 tmp &= ~lrp_rlow; 643 else 644 tmp |= lrp_rlow; 645 break; 646 default: 647 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 648 return -EINVAL; 649 } 650 651 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 652 case SND_SOC_DAIFMT_CBM_CFM: 653 tmp |= mod_slave; 654 break; 655 case SND_SOC_DAIFMT_CBS_CFS: 656 /* Set default source clock in Master mode */ 657 if (i2s->rclk_srcrate == 0) 658 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 659 0, SND_SOC_CLOCK_IN); 660 break; 661 default: 662 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 663 return -EINVAL; 664 } 665 666 pm_runtime_get_sync(dai->dev); 667 spin_lock_irqsave(i2s->lock, flags); 668 mod = readl(i2s->addr + I2SMOD); 669 /* 670 * Don't change the I2S mode if any controller is active on this 671 * channel. 672 */ 673 if (any_active(i2s) && 674 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) { 675 spin_unlock_irqrestore(i2s->lock, flags); 676 pm_runtime_put(dai->dev); 677 dev_err(&i2s->pdev->dev, 678 "%s:%d Other DAI busy\n", __func__, __LINE__); 679 return -EAGAIN; 680 } 681 682 mod &= ~(sdf_mask | lrp_rlow | mod_slave); 683 mod |= tmp; 684 writel(mod, i2s->addr + I2SMOD); 685 spin_unlock_irqrestore(i2s->lock, flags); 686 pm_runtime_put(dai->dev); 687 688 return 0; 689 } 690 691 static int i2s_hw_params(struct snd_pcm_substream *substream, 692 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 693 { 694 struct i2s_dai *i2s = to_info(dai); 695 u32 mod, mask = 0, val = 0; 696 unsigned long flags; 697 698 WARN_ON(!pm_runtime_active(dai->dev)); 699 700 if (!is_secondary(i2s)) 701 mask |= (MOD_DC2_EN | MOD_DC1_EN); 702 703 switch (params_channels(params)) { 704 case 6: 705 val |= MOD_DC2_EN; 706 case 4: 707 val |= MOD_DC1_EN; 708 break; 709 case 2: 710 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 711 i2s->dma_playback.addr_width = 4; 712 else 713 i2s->dma_capture.addr_width = 4; 714 break; 715 case 1: 716 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 717 i2s->dma_playback.addr_width = 2; 718 else 719 i2s->dma_capture.addr_width = 2; 720 721 break; 722 default: 723 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 724 params_channels(params)); 725 return -EINVAL; 726 } 727 728 if (is_secondary(i2s)) 729 mask |= MOD_BLCS_MASK; 730 else 731 mask |= MOD_BLCP_MASK; 732 733 if (is_manager(i2s)) 734 mask |= MOD_BLC_MASK; 735 736 switch (params_width(params)) { 737 case 8: 738 if (is_secondary(i2s)) 739 val |= MOD_BLCS_8BIT; 740 else 741 val |= MOD_BLCP_8BIT; 742 if (is_manager(i2s)) 743 val |= MOD_BLC_8BIT; 744 break; 745 case 16: 746 if (is_secondary(i2s)) 747 val |= MOD_BLCS_16BIT; 748 else 749 val |= MOD_BLCP_16BIT; 750 if (is_manager(i2s)) 751 val |= MOD_BLC_16BIT; 752 break; 753 case 24: 754 if (is_secondary(i2s)) 755 val |= MOD_BLCS_24BIT; 756 else 757 val |= MOD_BLCP_24BIT; 758 if (is_manager(i2s)) 759 val |= MOD_BLC_24BIT; 760 break; 761 default: 762 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 763 params_format(params)); 764 return -EINVAL; 765 } 766 767 spin_lock_irqsave(i2s->lock, flags); 768 mod = readl(i2s->addr + I2SMOD); 769 mod = (mod & ~mask) | val; 770 writel(mod, i2s->addr + I2SMOD); 771 spin_unlock_irqrestore(i2s->lock, flags); 772 773 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 774 775 i2s->frmclk = params_rate(params); 776 777 return 0; 778 } 779 780 /* We set constraints on the substream acc to the version of I2S */ 781 static int i2s_startup(struct snd_pcm_substream *substream, 782 struct snd_soc_dai *dai) 783 { 784 struct i2s_dai *i2s = to_info(dai); 785 struct i2s_dai *other = get_other_dai(i2s); 786 unsigned long flags; 787 788 pm_runtime_get_sync(dai->dev); 789 790 spin_lock_irqsave(&lock, flags); 791 792 i2s->mode |= DAI_OPENED; 793 794 if (is_manager(other)) 795 i2s->mode &= ~DAI_MANAGER; 796 else 797 i2s->mode |= DAI_MANAGER; 798 799 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR)) 800 writel(CON_RSTCLR, i2s->addr + I2SCON); 801 802 spin_unlock_irqrestore(&lock, flags); 803 804 return 0; 805 } 806 807 static void i2s_shutdown(struct snd_pcm_substream *substream, 808 struct snd_soc_dai *dai) 809 { 810 struct i2s_dai *i2s = to_info(dai); 811 struct i2s_dai *other = get_other_dai(i2s); 812 unsigned long flags; 813 814 spin_lock_irqsave(&lock, flags); 815 816 i2s->mode &= ~DAI_OPENED; 817 i2s->mode &= ~DAI_MANAGER; 818 819 if (is_opened(other)) 820 other->mode |= DAI_MANAGER; 821 822 /* Reset any constraint on RFS and BFS */ 823 i2s->rfs = 0; 824 i2s->bfs = 0; 825 826 spin_unlock_irqrestore(&lock, flags); 827 828 pm_runtime_put(dai->dev); 829 } 830 831 static int config_setup(struct i2s_dai *i2s) 832 { 833 struct i2s_dai *other = get_other_dai(i2s); 834 unsigned rfs, bfs, blc; 835 u32 psr; 836 837 blc = get_blc(i2s); 838 839 bfs = i2s->bfs; 840 841 if (!bfs && other) 842 bfs = other->bfs; 843 844 /* Select least possible multiple(2) if no constraint set */ 845 if (!bfs) 846 bfs = blc * 2; 847 848 rfs = i2s->rfs; 849 850 if (!rfs && other) 851 rfs = other->rfs; 852 853 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 854 dev_err(&i2s->pdev->dev, 855 "%d-RFS not supported for 24-blc\n", rfs); 856 return -EINVAL; 857 } 858 859 if (!rfs) { 860 if (bfs == 16 || bfs == 32) 861 rfs = 256; 862 else 863 rfs = 384; 864 } 865 866 /* If already setup and running */ 867 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 868 dev_err(&i2s->pdev->dev, 869 "%s:%d Other DAI busy\n", __func__, __LINE__); 870 return -EAGAIN; 871 } 872 873 set_bfs(i2s, bfs); 874 set_rfs(i2s, rfs); 875 876 /* Don't bother with PSR in Slave mode */ 877 if (is_slave(i2s)) 878 return 0; 879 880 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { 881 psr = i2s->rclk_srcrate / i2s->frmclk / rfs; 882 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); 883 dev_dbg(&i2s->pdev->dev, 884 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 885 i2s->rclk_srcrate, psr, rfs, bfs); 886 } 887 888 return 0; 889 } 890 891 static int i2s_trigger(struct snd_pcm_substream *substream, 892 int cmd, struct snd_soc_dai *dai) 893 { 894 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 895 struct snd_soc_pcm_runtime *rtd = substream->private_data; 896 struct i2s_dai *i2s = to_info(rtd->cpu_dai); 897 unsigned long flags; 898 899 switch (cmd) { 900 case SNDRV_PCM_TRIGGER_START: 901 case SNDRV_PCM_TRIGGER_RESUME: 902 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 903 pm_runtime_get_sync(dai->dev); 904 spin_lock_irqsave(i2s->lock, flags); 905 906 if (config_setup(i2s)) { 907 spin_unlock_irqrestore(i2s->lock, flags); 908 return -EINVAL; 909 } 910 911 if (capture) 912 i2s_rxctrl(i2s, 1); 913 else 914 i2s_txctrl(i2s, 1); 915 916 spin_unlock_irqrestore(i2s->lock, flags); 917 break; 918 case SNDRV_PCM_TRIGGER_STOP: 919 case SNDRV_PCM_TRIGGER_SUSPEND: 920 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 921 spin_lock_irqsave(i2s->lock, flags); 922 923 if (capture) { 924 i2s_rxctrl(i2s, 0); 925 i2s_fifo(i2s, FIC_RXFLUSH); 926 } else { 927 i2s_txctrl(i2s, 0); 928 i2s_fifo(i2s, FIC_TXFLUSH); 929 } 930 931 spin_unlock_irqrestore(i2s->lock, flags); 932 pm_runtime_put(dai->dev); 933 break; 934 } 935 936 return 0; 937 } 938 939 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 940 int div_id, int div) 941 { 942 struct i2s_dai *i2s = to_info(dai); 943 struct i2s_dai *other = get_other_dai(i2s); 944 945 switch (div_id) { 946 case SAMSUNG_I2S_DIV_BCLK: 947 pm_runtime_get_sync(dai->dev); 948 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 949 || (other && other->bfs && (other->bfs != div))) { 950 pm_runtime_put(dai->dev); 951 dev_err(&i2s->pdev->dev, 952 "%s:%d Other DAI busy\n", __func__, __LINE__); 953 return -EAGAIN; 954 } 955 i2s->bfs = div; 956 pm_runtime_put(dai->dev); 957 break; 958 default: 959 dev_err(&i2s->pdev->dev, 960 "Invalid clock divider(%d)\n", div_id); 961 return -EINVAL; 962 } 963 964 return 0; 965 } 966 967 static snd_pcm_sframes_t 968 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 969 { 970 struct i2s_dai *i2s = to_info(dai); 971 u32 reg = readl(i2s->addr + I2SFIC); 972 snd_pcm_sframes_t delay; 973 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs; 974 975 WARN_ON(!pm_runtime_active(dai->dev)); 976 977 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 978 delay = FIC_RXCOUNT(reg); 979 else if (is_secondary(i2s)) 980 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); 981 else 982 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f; 983 984 return delay; 985 } 986 987 #ifdef CONFIG_PM 988 static int i2s_suspend(struct snd_soc_dai *dai) 989 { 990 return pm_runtime_force_suspend(dai->dev); 991 } 992 993 static int i2s_resume(struct snd_soc_dai *dai) 994 { 995 return pm_runtime_force_resume(dai->dev); 996 } 997 #else 998 #define i2s_suspend NULL 999 #define i2s_resume NULL 1000 #endif 1001 1002 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 1003 { 1004 struct i2s_dai *i2s = to_info(dai); 1005 struct i2s_dai *other = get_other_dai(i2s); 1006 unsigned long flags; 1007 1008 pm_runtime_get_sync(dai->dev); 1009 1010 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */ 1011 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback, 1012 NULL); 1013 } else { 1014 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, 1015 &i2s->dma_capture); 1016 1017 if (i2s->quirks & QUIRK_NEED_RSTCLR) 1018 writel(CON_RSTCLR, i2s->addr + I2SCON); 1019 1020 if (i2s->quirks & QUIRK_SUPPORTS_IDMA) 1021 idma_reg_addr_init(i2s->addr, 1022 i2s->sec_dai->idma_playback.addr); 1023 } 1024 1025 /* Reset any constraint on RFS and BFS */ 1026 i2s->rfs = 0; 1027 i2s->bfs = 0; 1028 i2s->rclk_srcrate = 0; 1029 1030 spin_lock_irqsave(i2s->lock, flags); 1031 i2s_txctrl(i2s, 0); 1032 i2s_rxctrl(i2s, 0); 1033 i2s_fifo(i2s, FIC_TXFLUSH); 1034 i2s_fifo(other, FIC_TXFLUSH); 1035 i2s_fifo(i2s, FIC_RXFLUSH); 1036 spin_unlock_irqrestore(i2s->lock, flags); 1037 1038 /* Gate CDCLK by default */ 1039 if (!is_opened(other)) 1040 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 1041 0, SND_SOC_CLOCK_IN); 1042 pm_runtime_put(dai->dev); 1043 1044 return 0; 1045 } 1046 1047 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 1048 { 1049 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); 1050 unsigned long flags; 1051 1052 pm_runtime_get_sync(dai->dev); 1053 1054 if (!is_secondary(i2s)) { 1055 if (i2s->quirks & QUIRK_NEED_RSTCLR) { 1056 spin_lock_irqsave(i2s->lock, flags); 1057 writel(0, i2s->addr + I2SCON); 1058 spin_unlock_irqrestore(i2s->lock, flags); 1059 } 1060 } 1061 1062 pm_runtime_put(dai->dev); 1063 1064 return 0; 1065 } 1066 1067 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 1068 .trigger = i2s_trigger, 1069 .hw_params = i2s_hw_params, 1070 .set_fmt = i2s_set_fmt, 1071 .set_clkdiv = i2s_set_clkdiv, 1072 .set_sysclk = i2s_set_sysclk, 1073 .startup = i2s_startup, 1074 .shutdown = i2s_shutdown, 1075 .delay = i2s_delay, 1076 }; 1077 1078 static const struct snd_soc_component_driver samsung_i2s_component = { 1079 .name = "samsung-i2s", 1080 }; 1081 1082 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ 1083 SNDRV_PCM_FMTBIT_S16_LE | \ 1084 SNDRV_PCM_FMTBIT_S24_LE) 1085 1086 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, 1087 const struct samsung_i2s_dai_data *i2s_dai_data, 1088 bool sec) 1089 { 1090 struct i2s_dai *i2s; 1091 1092 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); 1093 if (i2s == NULL) 1094 return NULL; 1095 1096 i2s->pdev = pdev; 1097 i2s->pri_dai = NULL; 1098 i2s->sec_dai = NULL; 1099 i2s->i2s_dai_drv.symmetric_rates = 1; 1100 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; 1101 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; 1102 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; 1103 i2s->i2s_dai_drv.suspend = i2s_suspend; 1104 i2s->i2s_dai_drv.resume = i2s_resume; 1105 i2s->i2s_dai_drv.playback.channels_min = 1; 1106 i2s->i2s_dai_drv.playback.channels_max = 2; 1107 i2s->i2s_dai_drv.playback.rates = i2s_dai_data->pcm_rates; 1108 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; 1109 1110 if (!sec) { 1111 i2s->i2s_dai_drv.capture.channels_min = 1; 1112 i2s->i2s_dai_drv.capture.channels_max = 2; 1113 i2s->i2s_dai_drv.capture.rates = i2s_dai_data->pcm_rates; 1114 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; 1115 } 1116 return i2s; 1117 } 1118 1119 #ifdef CONFIG_PM 1120 static int i2s_runtime_suspend(struct device *dev) 1121 { 1122 struct i2s_dai *i2s = dev_get_drvdata(dev); 1123 1124 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); 1125 i2s->suspend_i2scon = readl(i2s->addr + I2SCON); 1126 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); 1127 1128 if (i2s->op_clk) 1129 clk_disable_unprepare(i2s->op_clk); 1130 clk_disable_unprepare(i2s->clk); 1131 1132 return 0; 1133 } 1134 1135 static int i2s_runtime_resume(struct device *dev) 1136 { 1137 struct i2s_dai *i2s = dev_get_drvdata(dev); 1138 int ret; 1139 1140 ret = clk_prepare_enable(i2s->clk); 1141 if (ret) 1142 return ret; 1143 1144 if (i2s->op_clk) { 1145 ret = clk_prepare_enable(i2s->op_clk); 1146 if (ret) { 1147 clk_disable_unprepare(i2s->clk); 1148 return ret; 1149 } 1150 } 1151 1152 writel(i2s->suspend_i2scon, i2s->addr + I2SCON); 1153 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); 1154 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); 1155 1156 return 0; 1157 } 1158 #endif /* CONFIG_PM */ 1159 1160 static void i2s_unregister_clocks(struct i2s_dai *i2s) 1161 { 1162 int i; 1163 1164 for (i = 0; i < i2s->clk_data.clk_num; i++) { 1165 if (!IS_ERR(i2s->clk_table[i])) 1166 clk_unregister(i2s->clk_table[i]); 1167 } 1168 } 1169 1170 static void i2s_unregister_clock_provider(struct platform_device *pdev) 1171 { 1172 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev); 1173 1174 of_clk_del_provider(pdev->dev.of_node); 1175 i2s_unregister_clocks(i2s); 1176 } 1177 1178 static int i2s_register_clock_provider(struct platform_device *pdev) 1179 { 1180 struct device *dev = &pdev->dev; 1181 struct i2s_dai *i2s = dev_get_drvdata(dev); 1182 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" }; 1183 const char *p_names[2] = { NULL }; 1184 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs; 1185 struct clk *rclksrc; 1186 int ret, i; 1187 1188 /* Register the clock provider only if it's expected in the DTB */ 1189 if (!of_find_property(dev->of_node, "#clock-cells", NULL)) 1190 return 0; 1191 1192 /* Get the RCLKSRC mux clock parent clock names */ 1193 for (i = 0; i < ARRAY_SIZE(p_names); i++) { 1194 rclksrc = clk_get(dev, clk_name[i]); 1195 if (IS_ERR(rclksrc)) 1196 continue; 1197 p_names[i] = __clk_get_name(rclksrc); 1198 clk_put(rclksrc); 1199 } 1200 1201 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { 1202 /* Activate the prescaler */ 1203 u32 val = readl(i2s->addr + I2SPSR); 1204 writel(val | PSR_PSREN, i2s->addr + I2SPSR); 1205 1206 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, 1207 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names), 1208 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, 1209 i2s->addr + I2SMOD, reg_info->rclksrc_off, 1210 1, 0, i2s->lock); 1211 1212 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, 1213 "i2s_presc", "i2s_rclksrc", 1214 CLK_SET_RATE_PARENT, 1215 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock); 1216 1217 p_names[0] = "i2s_presc"; 1218 i2s->clk_data.clk_num = 2; 1219 } 1220 of_property_read_string_index(dev->of_node, 1221 "clock-output-names", 0, &clk_name[0]); 1222 1223 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, clk_name[0], 1224 p_names[0], CLK_SET_RATE_PARENT, 1225 i2s->addr + I2SMOD, reg_info->cdclkcon_off, 1226 CLK_GATE_SET_TO_DISABLE, i2s->lock); 1227 1228 i2s->clk_data.clk_num += 1; 1229 i2s->clk_data.clks = i2s->clk_table; 1230 1231 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, 1232 &i2s->clk_data); 1233 if (ret < 0) { 1234 dev_err(dev, "failed to add clock provider: %d\n", ret); 1235 i2s_unregister_clocks(i2s); 1236 } 1237 1238 return ret; 1239 } 1240 1241 static int samsung_i2s_probe(struct platform_device *pdev) 1242 { 1243 struct i2s_dai *pri_dai, *sec_dai = NULL; 1244 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1245 struct resource *res; 1246 u32 regs_base, quirks = 0, idma_addr = 0; 1247 struct device_node *np = pdev->dev.of_node; 1248 const struct samsung_i2s_dai_data *i2s_dai_data; 1249 int ret; 1250 1251 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) 1252 i2s_dai_data = of_device_get_match_data(&pdev->dev); 1253 else 1254 i2s_dai_data = (struct samsung_i2s_dai_data *) 1255 platform_get_device_id(pdev)->driver_data; 1256 1257 pri_dai = i2s_alloc_dai(pdev, i2s_dai_data, false); 1258 if (!pri_dai) { 1259 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); 1260 return -ENOMEM; 1261 } 1262 1263 spin_lock_init(&pri_dai->spinlock); 1264 pri_dai->lock = &pri_dai->spinlock; 1265 1266 if (!np) { 1267 if (i2s_pdata == NULL) { 1268 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); 1269 return -EINVAL; 1270 } 1271 1272 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback; 1273 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture; 1274 pri_dai->filter = i2s_pdata->dma_filter; 1275 1276 quirks = i2s_pdata->type.quirks; 1277 idma_addr = i2s_pdata->type.idma_addr; 1278 } else { 1279 quirks = i2s_dai_data->quirks; 1280 if (of_property_read_u32(np, "samsung,idma-addr", 1281 &idma_addr)) { 1282 if (quirks & QUIRK_SUPPORTS_IDMA) { 1283 dev_info(&pdev->dev, "idma address is not"\ 1284 "specified"); 1285 } 1286 } 1287 } 1288 1289 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1290 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res); 1291 if (IS_ERR(pri_dai->addr)) 1292 return PTR_ERR(pri_dai->addr); 1293 1294 regs_base = res->start; 1295 1296 pri_dai->clk = devm_clk_get(&pdev->dev, "iis"); 1297 if (IS_ERR(pri_dai->clk)) { 1298 dev_err(&pdev->dev, "Failed to get iis clock\n"); 1299 return PTR_ERR(pri_dai->clk); 1300 } 1301 1302 ret = clk_prepare_enable(pri_dai->clk); 1303 if (ret != 0) { 1304 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret); 1305 return ret; 1306 } 1307 pri_dai->dma_playback.addr = regs_base + I2STXD; 1308 pri_dai->dma_capture.addr = regs_base + I2SRXD; 1309 pri_dai->dma_playback.chan_name = "tx"; 1310 pri_dai->dma_capture.chan_name = "rx"; 1311 pri_dai->dma_playback.addr_width = 4; 1312 pri_dai->dma_capture.addr_width = 4; 1313 pri_dai->quirks = quirks; 1314 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs; 1315 1316 if (quirks & QUIRK_PRI_6CHAN) 1317 pri_dai->i2s_dai_drv.playback.channels_max = 6; 1318 1319 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter, 1320 NULL, NULL); 1321 if (ret < 0) 1322 goto err_disable_clk; 1323 1324 ret = devm_snd_soc_register_component(&pdev->dev, 1325 &samsung_i2s_component, 1326 &pri_dai->i2s_dai_drv, 1); 1327 if (ret < 0) 1328 goto err_disable_clk; 1329 1330 if (quirks & QUIRK_SEC_DAI) { 1331 sec_dai = i2s_alloc_dai(pdev, i2s_dai_data, true); 1332 if (!sec_dai) { 1333 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); 1334 ret = -ENOMEM; 1335 goto err_disable_clk; 1336 } 1337 1338 sec_dai->lock = &pri_dai->spinlock; 1339 sec_dai->variant_regs = pri_dai->variant_regs; 1340 sec_dai->dma_playback.addr = regs_base + I2STXDS; 1341 sec_dai->dma_playback.chan_name = "tx-sec"; 1342 1343 if (!np) { 1344 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec; 1345 sec_dai->filter = i2s_pdata->dma_filter; 1346 } 1347 1348 sec_dai->dma_playback.addr_width = 4; 1349 sec_dai->addr = pri_dai->addr; 1350 sec_dai->clk = pri_dai->clk; 1351 sec_dai->quirks = quirks; 1352 sec_dai->idma_playback.addr = idma_addr; 1353 sec_dai->pri_dai = pri_dai; 1354 pri_dai->sec_dai = sec_dai; 1355 1356 ret = samsung_asoc_dma_platform_register(&pdev->dev, 1357 sec_dai->filter, "tx-sec", NULL); 1358 if (ret < 0) 1359 goto err_disable_clk; 1360 1361 ret = devm_snd_soc_register_component(&pdev->dev, 1362 &samsung_i2s_component, 1363 &sec_dai->i2s_dai_drv, 1); 1364 if (ret < 0) 1365 goto err_disable_clk; 1366 } 1367 1368 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1369 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1370 ret = -EINVAL; 1371 goto err_disable_clk; 1372 } 1373 1374 dev_set_drvdata(&pdev->dev, pri_dai); 1375 1376 pm_runtime_set_active(&pdev->dev); 1377 pm_runtime_enable(&pdev->dev); 1378 1379 ret = i2s_register_clock_provider(pdev); 1380 if (!ret) 1381 return 0; 1382 1383 pm_runtime_disable(&pdev->dev); 1384 err_disable_clk: 1385 clk_disable_unprepare(pri_dai->clk); 1386 return ret; 1387 } 1388 1389 static int samsung_i2s_remove(struct platform_device *pdev) 1390 { 1391 struct i2s_dai *pri_dai; 1392 1393 pri_dai = dev_get_drvdata(&pdev->dev); 1394 1395 pm_runtime_get_sync(&pdev->dev); 1396 pm_runtime_disable(&pdev->dev); 1397 1398 i2s_unregister_clock_provider(pdev); 1399 clk_disable_unprepare(pri_dai->clk); 1400 pm_runtime_put_noidle(&pdev->dev); 1401 1402 return 0; 1403 } 1404 1405 static const struct samsung_i2s_variant_regs i2sv3_regs = { 1406 .bfs_off = 1, 1407 .rfs_off = 3, 1408 .sdf_off = 5, 1409 .txr_off = 8, 1410 .rclksrc_off = 10, 1411 .mss_off = 11, 1412 .cdclkcon_off = 12, 1413 .lrp_off = 7, 1414 .bfs_mask = 0x3, 1415 .rfs_mask = 0x3, 1416 .ftx0cnt_off = 8, 1417 }; 1418 1419 static const struct samsung_i2s_variant_regs i2sv6_regs = { 1420 .bfs_off = 0, 1421 .rfs_off = 4, 1422 .sdf_off = 6, 1423 .txr_off = 8, 1424 .rclksrc_off = 10, 1425 .mss_off = 11, 1426 .cdclkcon_off = 12, 1427 .lrp_off = 15, 1428 .bfs_mask = 0xf, 1429 .rfs_mask = 0x3, 1430 .ftx0cnt_off = 8, 1431 }; 1432 1433 static const struct samsung_i2s_variant_regs i2sv7_regs = { 1434 .bfs_off = 0, 1435 .rfs_off = 4, 1436 .sdf_off = 7, 1437 .txr_off = 9, 1438 .rclksrc_off = 11, 1439 .mss_off = 12, 1440 .cdclkcon_off = 22, 1441 .lrp_off = 15, 1442 .bfs_mask = 0xf, 1443 .rfs_mask = 0x7, 1444 .ftx0cnt_off = 0, 1445 }; 1446 1447 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = { 1448 .bfs_off = 0, 1449 .rfs_off = 3, 1450 .sdf_off = 6, 1451 .txr_off = 8, 1452 .rclksrc_off = 10, 1453 .mss_off = 11, 1454 .cdclkcon_off = 12, 1455 .lrp_off = 15, 1456 .bfs_mask = 0x7, 1457 .rfs_mask = 0x7, 1458 .ftx0cnt_off = 8, 1459 }; 1460 1461 static const struct samsung_i2s_dai_data i2sv3_dai_type = { 1462 .quirks = QUIRK_NO_MUXPSR, 1463 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1464 .i2s_variant_regs = &i2sv3_regs, 1465 }; 1466 1467 static const struct samsung_i2s_dai_data i2sv5_dai_type = { 1468 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1469 QUIRK_SUPPORTS_IDMA, 1470 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1471 .i2s_variant_regs = &i2sv3_regs, 1472 }; 1473 1474 static const struct samsung_i2s_dai_data i2sv6_dai_type = { 1475 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1476 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA, 1477 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1478 .i2s_variant_regs = &i2sv6_regs, 1479 }; 1480 1481 static const struct samsung_i2s_dai_data i2sv7_dai_type = { 1482 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1483 QUIRK_SUPPORTS_TDM, 1484 .pcm_rates = SNDRV_PCM_RATE_8000_192000, 1485 .i2s_variant_regs = &i2sv7_regs, 1486 }; 1487 1488 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = { 1489 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR, 1490 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1491 .i2s_variant_regs = &i2sv5_i2s1_regs, 1492 }; 1493 1494 static const struct platform_device_id samsung_i2s_driver_ids[] = { 1495 { 1496 .name = "samsung-i2s", 1497 .driver_data = (kernel_ulong_t)&i2sv3_dai_type, 1498 }, 1499 {}, 1500 }; 1501 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1502 1503 #ifdef CONFIG_OF 1504 static const struct of_device_id exynos_i2s_match[] = { 1505 { 1506 .compatible = "samsung,s3c6410-i2s", 1507 .data = &i2sv3_dai_type, 1508 }, { 1509 .compatible = "samsung,s5pv210-i2s", 1510 .data = &i2sv5_dai_type, 1511 }, { 1512 .compatible = "samsung,exynos5420-i2s", 1513 .data = &i2sv6_dai_type, 1514 }, { 1515 .compatible = "samsung,exynos7-i2s", 1516 .data = &i2sv7_dai_type, 1517 }, { 1518 .compatible = "samsung,exynos7-i2s1", 1519 .data = &i2sv5_dai_type_i2s1, 1520 }, 1521 {}, 1522 }; 1523 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1524 #endif 1525 1526 static const struct dev_pm_ops samsung_i2s_pm = { 1527 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1528 i2s_runtime_resume, NULL) 1529 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1530 pm_runtime_force_resume) 1531 }; 1532 1533 static struct platform_driver samsung_i2s_driver = { 1534 .probe = samsung_i2s_probe, 1535 .remove = samsung_i2s_remove, 1536 .id_table = samsung_i2s_driver_ids, 1537 .driver = { 1538 .name = "samsung-i2s", 1539 .of_match_table = of_match_ptr(exynos_i2s_match), 1540 .pm = &samsung_i2s_pm, 1541 }, 1542 }; 1543 1544 module_platform_driver(samsung_i2s_driver); 1545 1546 /* Module information */ 1547 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1548 MODULE_DESCRIPTION("Samsung I2S Interface"); 1549 MODULE_ALIAS("platform:samsung-i2s"); 1550 MODULE_LICENSE("GPL"); 1551