1 /* sound/soc/samsung/i2s.c 2 * 3 * ALSA SoC Audio Layer - Samsung I2S Controller driver 4 * 5 * Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 * Jaswinder Singh <jassisinghbrar@gmail.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/slab.h> 15 #include <linux/clk.h> 16 #include <linux/io.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/of_gpio.h> 20 #include <linux/pm_runtime.h> 21 22 #include <sound/soc.h> 23 #include <sound/pcm_params.h> 24 25 #include <linux/platform_data/asoc-s3c.h> 26 27 #include "dma.h" 28 #include "idma.h" 29 #include "i2s.h" 30 #include "i2s-regs.h" 31 32 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 33 34 enum samsung_dai_type { 35 TYPE_PRI, 36 TYPE_SEC, 37 }; 38 39 struct samsung_i2s_dai_data { 40 int dai_type; 41 u32 quirks; 42 }; 43 44 struct i2s_dai { 45 /* Platform device for this DAI */ 46 struct platform_device *pdev; 47 /* IOREMAP'd SFRs */ 48 void __iomem *addr; 49 /* Physical base address of SFRs */ 50 u32 base; 51 /* Rate of RCLK source clock */ 52 unsigned long rclk_srcrate; 53 /* Frame Clock */ 54 unsigned frmclk; 55 /* 56 * Specifically requested RCLK,BCLK by MACHINE Driver. 57 * 0 indicates CPU driver is free to choose any value. 58 */ 59 unsigned rfs, bfs; 60 /* I2S Controller's core clock */ 61 struct clk *clk; 62 /* Clock for generating I2S signals */ 63 struct clk *op_clk; 64 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 65 struct i2s_dai *pri_dai; 66 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 67 struct i2s_dai *sec_dai; 68 #define DAI_OPENED (1 << 0) /* Dai is opened */ 69 #define DAI_MANAGER (1 << 1) /* Dai is the manager */ 70 unsigned mode; 71 /* Driver for this DAI */ 72 struct snd_soc_dai_driver i2s_dai_drv; 73 /* DMA parameters */ 74 struct s3c_dma_params dma_playback; 75 struct s3c_dma_params dma_capture; 76 struct s3c_dma_params idma_playback; 77 u32 quirks; 78 u32 suspend_i2smod; 79 u32 suspend_i2scon; 80 u32 suspend_i2spsr; 81 unsigned long gpios[7]; /* i2s gpio line numbers */ 82 }; 83 84 /* Lock for cross i/f checks */ 85 static DEFINE_SPINLOCK(lock); 86 87 /* If this is the 'overlay' stereo DAI */ 88 static inline bool is_secondary(struct i2s_dai *i2s) 89 { 90 return i2s->pri_dai ? true : false; 91 } 92 93 /* If operating in SoC-Slave mode */ 94 static inline bool is_slave(struct i2s_dai *i2s) 95 { 96 return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; 97 } 98 99 /* If this interface of the controller is transmitting data */ 100 static inline bool tx_active(struct i2s_dai *i2s) 101 { 102 u32 active; 103 104 if (!i2s) 105 return false; 106 107 active = readl(i2s->addr + I2SCON); 108 109 if (is_secondary(i2s)) 110 active &= CON_TXSDMA_ACTIVE; 111 else 112 active &= CON_TXDMA_ACTIVE; 113 114 return active ? true : false; 115 } 116 117 /* If the other interface of the controller is transmitting data */ 118 static inline bool other_tx_active(struct i2s_dai *i2s) 119 { 120 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 121 122 return tx_active(other); 123 } 124 125 /* If any interface of the controller is transmitting data */ 126 static inline bool any_tx_active(struct i2s_dai *i2s) 127 { 128 return tx_active(i2s) || other_tx_active(i2s); 129 } 130 131 /* If this interface of the controller is receiving data */ 132 static inline bool rx_active(struct i2s_dai *i2s) 133 { 134 u32 active; 135 136 if (!i2s) 137 return false; 138 139 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; 140 141 return active ? true : false; 142 } 143 144 /* If the other interface of the controller is receiving data */ 145 static inline bool other_rx_active(struct i2s_dai *i2s) 146 { 147 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 148 149 return rx_active(other); 150 } 151 152 /* If any interface of the controller is receiving data */ 153 static inline bool any_rx_active(struct i2s_dai *i2s) 154 { 155 return rx_active(i2s) || other_rx_active(i2s); 156 } 157 158 /* If the other DAI is transmitting or receiving data */ 159 static inline bool other_active(struct i2s_dai *i2s) 160 { 161 return other_rx_active(i2s) || other_tx_active(i2s); 162 } 163 164 /* If this DAI is transmitting or receiving data */ 165 static inline bool this_active(struct i2s_dai *i2s) 166 { 167 return tx_active(i2s) || rx_active(i2s); 168 } 169 170 /* If the controller is active anyway */ 171 static inline bool any_active(struct i2s_dai *i2s) 172 { 173 return this_active(i2s) || other_active(i2s); 174 } 175 176 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 177 { 178 return snd_soc_dai_get_drvdata(dai); 179 } 180 181 static inline bool is_opened(struct i2s_dai *i2s) 182 { 183 if (i2s && (i2s->mode & DAI_OPENED)) 184 return true; 185 else 186 return false; 187 } 188 189 static inline bool is_manager(struct i2s_dai *i2s) 190 { 191 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 192 return true; 193 else 194 return false; 195 } 196 197 /* Read RCLK of I2S (in multiples of LRCLK) */ 198 static inline unsigned get_rfs(struct i2s_dai *i2s) 199 { 200 u32 rfs; 201 202 if (i2s->quirks & QUIRK_SUPPORTS_TDM) 203 rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT; 204 else 205 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT); 206 rfs &= MOD_RCLK_MASK; 207 208 switch (rfs) { 209 case 3: return 768; 210 case 2: return 384; 211 case 1: return 512; 212 default: return 256; 213 } 214 } 215 216 /* Write RCLK of I2S (in multiples of LRCLK) */ 217 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 218 { 219 u32 mod = readl(i2s->addr + I2SMOD); 220 int rfs_shift; 221 222 if (i2s->quirks & QUIRK_SUPPORTS_TDM) 223 rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT; 224 else 225 rfs_shift = MOD_RCLK_SHIFT; 226 mod &= ~(MOD_RCLK_MASK << rfs_shift); 227 228 switch (rfs) { 229 case 768: 230 mod |= (MOD_RCLK_768FS << rfs_shift); 231 break; 232 case 512: 233 mod |= (MOD_RCLK_512FS << rfs_shift); 234 break; 235 case 384: 236 mod |= (MOD_RCLK_384FS << rfs_shift); 237 break; 238 default: 239 mod |= (MOD_RCLK_256FS << rfs_shift); 240 break; 241 } 242 243 writel(mod, i2s->addr + I2SMOD); 244 } 245 246 /* Read Bit-Clock of I2S (in multiples of LRCLK) */ 247 static inline unsigned get_bfs(struct i2s_dai *i2s) 248 { 249 u32 bfs; 250 251 if (i2s->quirks & QUIRK_SUPPORTS_TDM) { 252 bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT; 253 bfs &= EXYNOS5420_MOD_BCLK_MASK; 254 } else { 255 bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT; 256 bfs &= MOD_BCLK_MASK; 257 } 258 259 switch (bfs) { 260 case 8: return 256; 261 case 7: return 192; 262 case 6: return 128; 263 case 5: return 96; 264 case 4: return 64; 265 case 3: return 24; 266 case 2: return 16; 267 case 1: return 48; 268 default: return 32; 269 } 270 } 271 272 /* Write Bit-Clock of I2S (in multiples of LRCLK) */ 273 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 274 { 275 u32 mod = readl(i2s->addr + I2SMOD); 276 int bfs_shift; 277 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM; 278 279 if (i2s->quirks & QUIRK_SUPPORTS_TDM) { 280 bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT; 281 mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift); 282 } else { 283 bfs_shift = MOD_BCLK_SHIFT; 284 mod &= ~(MOD_BCLK_MASK << bfs_shift); 285 } 286 287 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ 288 if (!tdm && bfs > 48) { 289 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); 290 return; 291 } 292 293 switch (bfs) { 294 case 48: 295 mod |= (MOD_BCLK_48FS << bfs_shift); 296 break; 297 case 32: 298 mod |= (MOD_BCLK_32FS << bfs_shift); 299 break; 300 case 24: 301 mod |= (MOD_BCLK_24FS << bfs_shift); 302 break; 303 case 16: 304 mod |= (MOD_BCLK_16FS << bfs_shift); 305 break; 306 case 64: 307 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); 308 break; 309 case 96: 310 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); 311 break; 312 case 128: 313 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); 314 break; 315 case 192: 316 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); 317 break; 318 case 256: 319 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); 320 break; 321 default: 322 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 323 return; 324 } 325 326 writel(mod, i2s->addr + I2SMOD); 327 } 328 329 /* Sample-Size */ 330 static inline int get_blc(struct i2s_dai *i2s) 331 { 332 int blc = readl(i2s->addr + I2SMOD); 333 334 blc = (blc >> 13) & 0x3; 335 336 switch (blc) { 337 case 2: return 24; 338 case 1: return 8; 339 default: return 16; 340 } 341 } 342 343 /* TX Channel Control */ 344 static void i2s_txctrl(struct i2s_dai *i2s, int on) 345 { 346 void __iomem *addr = i2s->addr; 347 u32 con = readl(addr + I2SCON); 348 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; 349 350 if (on) { 351 con |= CON_ACTIVE; 352 con &= ~CON_TXCH_PAUSE; 353 354 if (is_secondary(i2s)) { 355 con |= CON_TXSDMA_ACTIVE; 356 con &= ~CON_TXSDMA_PAUSE; 357 } else { 358 con |= CON_TXDMA_ACTIVE; 359 con &= ~CON_TXDMA_PAUSE; 360 } 361 362 if (any_rx_active(i2s)) 363 mod |= MOD_TXRX; 364 else 365 mod |= MOD_TXONLY; 366 } else { 367 if (is_secondary(i2s)) { 368 con |= CON_TXSDMA_PAUSE; 369 con &= ~CON_TXSDMA_ACTIVE; 370 } else { 371 con |= CON_TXDMA_PAUSE; 372 con &= ~CON_TXDMA_ACTIVE; 373 } 374 375 if (other_tx_active(i2s)) { 376 writel(con, addr + I2SCON); 377 return; 378 } 379 380 con |= CON_TXCH_PAUSE; 381 382 if (any_rx_active(i2s)) 383 mod |= MOD_RXONLY; 384 else 385 con &= ~CON_ACTIVE; 386 } 387 388 writel(mod, addr + I2SMOD); 389 writel(con, addr + I2SCON); 390 } 391 392 /* RX Channel Control */ 393 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 394 { 395 void __iomem *addr = i2s->addr; 396 u32 con = readl(addr + I2SCON); 397 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; 398 399 if (on) { 400 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 401 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 402 403 if (any_tx_active(i2s)) 404 mod |= MOD_TXRX; 405 else 406 mod |= MOD_RXONLY; 407 } else { 408 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 409 con &= ~CON_RXDMA_ACTIVE; 410 411 if (any_tx_active(i2s)) 412 mod |= MOD_TXONLY; 413 else 414 con &= ~CON_ACTIVE; 415 } 416 417 writel(mod, addr + I2SMOD); 418 writel(con, addr + I2SCON); 419 } 420 421 /* Flush FIFO of an interface */ 422 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 423 { 424 void __iomem *fic; 425 u32 val; 426 427 if (!i2s) 428 return; 429 430 if (is_secondary(i2s)) 431 fic = i2s->addr + I2SFICS; 432 else 433 fic = i2s->addr + I2SFIC; 434 435 /* Flush the FIFO */ 436 writel(readl(fic) | flush, fic); 437 438 /* Be patient */ 439 val = msecs_to_loops(1) / 1000; /* 1 usec */ 440 while (--val) 441 cpu_relax(); 442 443 writel(readl(fic) & ~flush, fic); 444 } 445 446 static int i2s_set_sysclk(struct snd_soc_dai *dai, 447 int clk_id, unsigned int rfs, int dir) 448 { 449 struct i2s_dai *i2s = to_info(dai); 450 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 451 u32 mod = readl(i2s->addr + I2SMOD); 452 453 switch (clk_id) { 454 case SAMSUNG_I2S_CDCLK: 455 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 456 if (dir == SND_SOC_CLOCK_IN) 457 rfs = 0; 458 459 if ((rfs && other->rfs && (other->rfs != rfs)) || 460 (any_active(i2s) && 461 (((dir == SND_SOC_CLOCK_IN) 462 && !(mod & MOD_CDCLKCON)) || 463 ((dir == SND_SOC_CLOCK_OUT) 464 && (mod & MOD_CDCLKCON))))) { 465 dev_err(&i2s->pdev->dev, 466 "%s:%d Other DAI busy\n", __func__, __LINE__); 467 return -EAGAIN; 468 } 469 470 if (dir == SND_SOC_CLOCK_IN) 471 mod |= MOD_CDCLKCON; 472 else 473 mod &= ~MOD_CDCLKCON; 474 475 i2s->rfs = rfs; 476 break; 477 478 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 479 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 480 if ((i2s->quirks & QUIRK_NO_MUXPSR) 481 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 482 clk_id = 0; 483 else 484 clk_id = 1; 485 486 if (!any_active(i2s)) { 487 if (i2s->op_clk) { 488 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || 489 (!clk_id && (mod & MOD_IMS_SYSMUX))) { 490 clk_disable_unprepare(i2s->op_clk); 491 clk_put(i2s->op_clk); 492 } else { 493 i2s->rclk_srcrate = 494 clk_get_rate(i2s->op_clk); 495 return 0; 496 } 497 } 498 499 if (clk_id) 500 i2s->op_clk = clk_get(&i2s->pdev->dev, 501 "i2s_opclk1"); 502 else 503 i2s->op_clk = clk_get(&i2s->pdev->dev, 504 "i2s_opclk0"); 505 clk_prepare_enable(i2s->op_clk); 506 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); 507 508 /* Over-ride the other's */ 509 if (other) { 510 other->op_clk = i2s->op_clk; 511 other->rclk_srcrate = i2s->rclk_srcrate; 512 } 513 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) 514 || (clk_id && !(mod & MOD_IMS_SYSMUX))) { 515 dev_err(&i2s->pdev->dev, 516 "%s:%d Other DAI busy\n", __func__, __LINE__); 517 return -EAGAIN; 518 } else { 519 /* Call can't be on the active DAI */ 520 i2s->op_clk = other->op_clk; 521 i2s->rclk_srcrate = other->rclk_srcrate; 522 return 0; 523 } 524 525 if (clk_id == 0) 526 mod &= ~MOD_IMS_SYSMUX; 527 else 528 mod |= MOD_IMS_SYSMUX; 529 break; 530 531 default: 532 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 533 return -EINVAL; 534 } 535 536 writel(mod, i2s->addr + I2SMOD); 537 538 return 0; 539 } 540 541 static int i2s_set_fmt(struct snd_soc_dai *dai, 542 unsigned int fmt) 543 { 544 struct i2s_dai *i2s = to_info(dai); 545 u32 mod = readl(i2s->addr + I2SMOD); 546 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow; 547 u32 tmp = 0; 548 549 if (i2s->quirks & QUIRK_SUPPORTS_TDM) { 550 lrp_shift = EXYNOS5420_MOD_LRP_SHIFT; 551 sdf_shift = EXYNOS5420_MOD_SDF_SHIFT; 552 } else { 553 lrp_shift = MOD_LRP_SHIFT; 554 sdf_shift = MOD_SDF_SHIFT; 555 } 556 557 sdf_mask = MOD_SDF_MASK << sdf_shift; 558 lrp_rlow = MOD_LR_RLOW << lrp_shift; 559 560 /* Format is priority */ 561 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 562 case SND_SOC_DAIFMT_RIGHT_J: 563 tmp |= lrp_rlow; 564 tmp |= (MOD_SDF_MSB << sdf_shift); 565 break; 566 case SND_SOC_DAIFMT_LEFT_J: 567 tmp |= lrp_rlow; 568 tmp |= (MOD_SDF_LSB << sdf_shift); 569 break; 570 case SND_SOC_DAIFMT_I2S: 571 tmp |= (MOD_SDF_IIS << sdf_shift); 572 break; 573 default: 574 dev_err(&i2s->pdev->dev, "Format not supported\n"); 575 return -EINVAL; 576 } 577 578 /* 579 * INV flag is relative to the FORMAT flag - if set it simply 580 * flips the polarity specified by the Standard 581 */ 582 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 583 case SND_SOC_DAIFMT_NB_NF: 584 break; 585 case SND_SOC_DAIFMT_NB_IF: 586 if (tmp & lrp_rlow) 587 tmp &= ~lrp_rlow; 588 else 589 tmp |= lrp_rlow; 590 break; 591 default: 592 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 593 return -EINVAL; 594 } 595 596 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 597 case SND_SOC_DAIFMT_CBM_CFM: 598 tmp |= MOD_SLAVE; 599 break; 600 case SND_SOC_DAIFMT_CBS_CFS: 601 /* Set default source clock in Master mode */ 602 if (i2s->rclk_srcrate == 0) 603 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 604 0, SND_SOC_CLOCK_IN); 605 break; 606 default: 607 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 608 return -EINVAL; 609 } 610 611 /* 612 * Don't change the I2S mode if any controller is active on this 613 * channel. 614 */ 615 if (any_active(i2s) && 616 ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) { 617 dev_err(&i2s->pdev->dev, 618 "%s:%d Other DAI busy\n", __func__, __LINE__); 619 return -EAGAIN; 620 } 621 622 mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE); 623 mod |= tmp; 624 writel(mod, i2s->addr + I2SMOD); 625 626 return 0; 627 } 628 629 static int i2s_hw_params(struct snd_pcm_substream *substream, 630 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 631 { 632 struct i2s_dai *i2s = to_info(dai); 633 u32 mod = readl(i2s->addr + I2SMOD); 634 635 if (!is_secondary(i2s)) 636 mod &= ~(MOD_DC2_EN | MOD_DC1_EN); 637 638 switch (params_channels(params)) { 639 case 6: 640 mod |= MOD_DC2_EN; 641 case 4: 642 mod |= MOD_DC1_EN; 643 break; 644 case 2: 645 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 646 i2s->dma_playback.dma_size = 4; 647 else 648 i2s->dma_capture.dma_size = 4; 649 break; 650 case 1: 651 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 652 i2s->dma_playback.dma_size = 2; 653 else 654 i2s->dma_capture.dma_size = 2; 655 656 break; 657 default: 658 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 659 params_channels(params)); 660 return -EINVAL; 661 } 662 663 if (is_secondary(i2s)) 664 mod &= ~MOD_BLCS_MASK; 665 else 666 mod &= ~MOD_BLCP_MASK; 667 668 if (is_manager(i2s)) 669 mod &= ~MOD_BLC_MASK; 670 671 switch (params_format(params)) { 672 case SNDRV_PCM_FORMAT_S8: 673 if (is_secondary(i2s)) 674 mod |= MOD_BLCS_8BIT; 675 else 676 mod |= MOD_BLCP_8BIT; 677 if (is_manager(i2s)) 678 mod |= MOD_BLC_8BIT; 679 break; 680 case SNDRV_PCM_FORMAT_S16_LE: 681 if (is_secondary(i2s)) 682 mod |= MOD_BLCS_16BIT; 683 else 684 mod |= MOD_BLCP_16BIT; 685 if (is_manager(i2s)) 686 mod |= MOD_BLC_16BIT; 687 break; 688 case SNDRV_PCM_FORMAT_S24_LE: 689 if (is_secondary(i2s)) 690 mod |= MOD_BLCS_24BIT; 691 else 692 mod |= MOD_BLCP_24BIT; 693 if (is_manager(i2s)) 694 mod |= MOD_BLC_24BIT; 695 break; 696 default: 697 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 698 params_format(params)); 699 return -EINVAL; 700 } 701 writel(mod, i2s->addr + I2SMOD); 702 703 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 704 705 i2s->frmclk = params_rate(params); 706 707 return 0; 708 } 709 710 /* We set constraints on the substream acc to the version of I2S */ 711 static int i2s_startup(struct snd_pcm_substream *substream, 712 struct snd_soc_dai *dai) 713 { 714 struct i2s_dai *i2s = to_info(dai); 715 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 716 unsigned long flags; 717 718 spin_lock_irqsave(&lock, flags); 719 720 i2s->mode |= DAI_OPENED; 721 722 if (is_manager(other)) 723 i2s->mode &= ~DAI_MANAGER; 724 else 725 i2s->mode |= DAI_MANAGER; 726 727 /* Enforce set_sysclk in Master mode */ 728 i2s->rclk_srcrate = 0; 729 730 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR)) 731 writel(CON_RSTCLR, i2s->addr + I2SCON); 732 733 spin_unlock_irqrestore(&lock, flags); 734 735 return 0; 736 } 737 738 static void i2s_shutdown(struct snd_pcm_substream *substream, 739 struct snd_soc_dai *dai) 740 { 741 struct i2s_dai *i2s = to_info(dai); 742 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 743 unsigned long flags; 744 745 spin_lock_irqsave(&lock, flags); 746 747 i2s->mode &= ~DAI_OPENED; 748 i2s->mode &= ~DAI_MANAGER; 749 750 if (is_opened(other)) 751 other->mode |= DAI_MANAGER; 752 753 /* Reset any constraint on RFS and BFS */ 754 i2s->rfs = 0; 755 i2s->bfs = 0; 756 757 spin_unlock_irqrestore(&lock, flags); 758 759 /* Gate CDCLK by default */ 760 if (!is_opened(other)) 761 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 762 0, SND_SOC_CLOCK_IN); 763 } 764 765 static int config_setup(struct i2s_dai *i2s) 766 { 767 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 768 unsigned rfs, bfs, blc; 769 u32 psr; 770 771 blc = get_blc(i2s); 772 773 bfs = i2s->bfs; 774 775 if (!bfs && other) 776 bfs = other->bfs; 777 778 /* Select least possible multiple(2) if no constraint set */ 779 if (!bfs) 780 bfs = blc * 2; 781 782 rfs = i2s->rfs; 783 784 if (!rfs && other) 785 rfs = other->rfs; 786 787 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 788 dev_err(&i2s->pdev->dev, 789 "%d-RFS not supported for 24-blc\n", rfs); 790 return -EINVAL; 791 } 792 793 if (!rfs) { 794 if (bfs == 16 || bfs == 32) 795 rfs = 256; 796 else 797 rfs = 384; 798 } 799 800 /* If already setup and running */ 801 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 802 dev_err(&i2s->pdev->dev, 803 "%s:%d Other DAI busy\n", __func__, __LINE__); 804 return -EAGAIN; 805 } 806 807 set_bfs(i2s, bfs); 808 set_rfs(i2s, rfs); 809 810 /* Don't bother with PSR in Slave mode */ 811 if (is_slave(i2s)) 812 return 0; 813 814 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { 815 psr = i2s->rclk_srcrate / i2s->frmclk / rfs; 816 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); 817 dev_dbg(&i2s->pdev->dev, 818 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 819 i2s->rclk_srcrate, psr, rfs, bfs); 820 } 821 822 return 0; 823 } 824 825 static int i2s_trigger(struct snd_pcm_substream *substream, 826 int cmd, struct snd_soc_dai *dai) 827 { 828 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 829 struct snd_soc_pcm_runtime *rtd = substream->private_data; 830 struct i2s_dai *i2s = to_info(rtd->cpu_dai); 831 unsigned long flags; 832 833 switch (cmd) { 834 case SNDRV_PCM_TRIGGER_START: 835 case SNDRV_PCM_TRIGGER_RESUME: 836 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 837 local_irq_save(flags); 838 839 if (config_setup(i2s)) { 840 local_irq_restore(flags); 841 return -EINVAL; 842 } 843 844 if (capture) 845 i2s_rxctrl(i2s, 1); 846 else 847 i2s_txctrl(i2s, 1); 848 849 local_irq_restore(flags); 850 break; 851 case SNDRV_PCM_TRIGGER_STOP: 852 case SNDRV_PCM_TRIGGER_SUSPEND: 853 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 854 local_irq_save(flags); 855 856 if (capture) { 857 i2s_rxctrl(i2s, 0); 858 i2s_fifo(i2s, FIC_RXFLUSH); 859 } else { 860 i2s_txctrl(i2s, 0); 861 i2s_fifo(i2s, FIC_TXFLUSH); 862 } 863 864 local_irq_restore(flags); 865 break; 866 } 867 868 return 0; 869 } 870 871 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 872 int div_id, int div) 873 { 874 struct i2s_dai *i2s = to_info(dai); 875 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 876 877 switch (div_id) { 878 case SAMSUNG_I2S_DIV_BCLK: 879 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 880 || (other && other->bfs && (other->bfs != div))) { 881 dev_err(&i2s->pdev->dev, 882 "%s:%d Other DAI busy\n", __func__, __LINE__); 883 return -EAGAIN; 884 } 885 i2s->bfs = div; 886 break; 887 default: 888 dev_err(&i2s->pdev->dev, 889 "Invalid clock divider(%d)\n", div_id); 890 return -EINVAL; 891 } 892 893 return 0; 894 } 895 896 static snd_pcm_sframes_t 897 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 898 { 899 struct i2s_dai *i2s = to_info(dai); 900 u32 reg = readl(i2s->addr + I2SFIC); 901 snd_pcm_sframes_t delay; 902 903 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 904 delay = FIC_RXCOUNT(reg); 905 else if (is_secondary(i2s)) 906 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); 907 else 908 delay = FIC_TXCOUNT(reg); 909 910 return delay; 911 } 912 913 #ifdef CONFIG_PM 914 static int i2s_suspend(struct snd_soc_dai *dai) 915 { 916 struct i2s_dai *i2s = to_info(dai); 917 918 if (dai->active) { 919 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); 920 i2s->suspend_i2scon = readl(i2s->addr + I2SCON); 921 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); 922 } 923 924 return 0; 925 } 926 927 static int i2s_resume(struct snd_soc_dai *dai) 928 { 929 struct i2s_dai *i2s = to_info(dai); 930 931 if (dai->active) { 932 writel(i2s->suspend_i2scon, i2s->addr + I2SCON); 933 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); 934 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); 935 } 936 937 return 0; 938 } 939 #else 940 #define i2s_suspend NULL 941 #define i2s_resume NULL 942 #endif 943 944 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 945 { 946 struct i2s_dai *i2s = to_info(dai); 947 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 948 949 if (other && other->clk) { /* If this is probe on secondary */ 950 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback, 951 NULL); 952 goto probe_exit; 953 } 954 955 i2s->addr = ioremap(i2s->base, 0x100); 956 if (i2s->addr == NULL) { 957 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); 958 return -ENXIO; 959 } 960 961 i2s->clk = clk_get(&i2s->pdev->dev, "iis"); 962 if (IS_ERR(i2s->clk)) { 963 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); 964 iounmap(i2s->addr); 965 return -ENOENT; 966 } 967 clk_prepare_enable(i2s->clk); 968 969 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 970 971 if (other) { 972 other->addr = i2s->addr; 973 other->clk = i2s->clk; 974 } 975 976 if (i2s->quirks & QUIRK_NEED_RSTCLR) 977 writel(CON_RSTCLR, i2s->addr + I2SCON); 978 979 if (i2s->quirks & QUIRK_SEC_DAI) 980 idma_reg_addr_init(i2s->addr, 981 i2s->sec_dai->idma_playback.dma_addr); 982 983 probe_exit: 984 /* Reset any constraint on RFS and BFS */ 985 i2s->rfs = 0; 986 i2s->bfs = 0; 987 i2s_txctrl(i2s, 0); 988 i2s_rxctrl(i2s, 0); 989 i2s_fifo(i2s, FIC_TXFLUSH); 990 i2s_fifo(other, FIC_TXFLUSH); 991 i2s_fifo(i2s, FIC_RXFLUSH); 992 993 /* Gate CDCLK by default */ 994 if (!is_opened(other)) 995 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 996 0, SND_SOC_CLOCK_IN); 997 998 return 0; 999 } 1000 1001 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 1002 { 1003 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); 1004 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 1005 1006 if (!other || !other->clk) { 1007 1008 if (i2s->quirks & QUIRK_NEED_RSTCLR) 1009 writel(0, i2s->addr + I2SCON); 1010 1011 clk_disable_unprepare(i2s->clk); 1012 clk_put(i2s->clk); 1013 1014 iounmap(i2s->addr); 1015 } 1016 1017 i2s->clk = NULL; 1018 1019 return 0; 1020 } 1021 1022 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 1023 .trigger = i2s_trigger, 1024 .hw_params = i2s_hw_params, 1025 .set_fmt = i2s_set_fmt, 1026 .set_clkdiv = i2s_set_clkdiv, 1027 .set_sysclk = i2s_set_sysclk, 1028 .startup = i2s_startup, 1029 .shutdown = i2s_shutdown, 1030 .delay = i2s_delay, 1031 }; 1032 1033 static const struct snd_soc_component_driver samsung_i2s_component = { 1034 .name = "samsung-i2s", 1035 }; 1036 1037 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 1038 1039 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ 1040 SNDRV_PCM_FMTBIT_S16_LE | \ 1041 SNDRV_PCM_FMTBIT_S24_LE) 1042 1043 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) 1044 { 1045 struct i2s_dai *i2s; 1046 int ret; 1047 1048 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); 1049 if (i2s == NULL) 1050 return NULL; 1051 1052 i2s->pdev = pdev; 1053 i2s->pri_dai = NULL; 1054 i2s->sec_dai = NULL; 1055 i2s->i2s_dai_drv.symmetric_rates = 1; 1056 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; 1057 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; 1058 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; 1059 i2s->i2s_dai_drv.suspend = i2s_suspend; 1060 i2s->i2s_dai_drv.resume = i2s_resume; 1061 i2s->i2s_dai_drv.playback.channels_min = 1; 1062 i2s->i2s_dai_drv.playback.channels_max = 2; 1063 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; 1064 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; 1065 1066 if (!sec) { 1067 i2s->i2s_dai_drv.capture.channels_min = 1; 1068 i2s->i2s_dai_drv.capture.channels_max = 2; 1069 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; 1070 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; 1071 dev_set_drvdata(&i2s->pdev->dev, i2s); 1072 } else { /* Create a new platform_device for Secondary */ 1073 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1); 1074 if (!i2s->pdev) 1075 return NULL; 1076 1077 i2s->pdev->dev.parent = &pdev->dev; 1078 1079 platform_set_drvdata(i2s->pdev, i2s); 1080 ret = platform_device_add(i2s->pdev); 1081 if (ret < 0) 1082 return NULL; 1083 } 1084 1085 return i2s; 1086 } 1087 1088 static const struct of_device_id exynos_i2s_match[]; 1089 1090 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data( 1091 struct platform_device *pdev) 1092 { 1093 #ifdef CONFIG_OF 1094 if (pdev->dev.of_node) { 1095 const struct of_device_id *match; 1096 match = of_match_node(exynos_i2s_match, pdev->dev.of_node); 1097 return match->data; 1098 } else 1099 #endif 1100 return (struct samsung_i2s_dai_data *) 1101 platform_get_device_id(pdev)->driver_data; 1102 } 1103 1104 #ifdef CONFIG_PM_RUNTIME 1105 static int i2s_runtime_suspend(struct device *dev) 1106 { 1107 struct i2s_dai *i2s = dev_get_drvdata(dev); 1108 1109 clk_disable_unprepare(i2s->clk); 1110 1111 return 0; 1112 } 1113 1114 static int i2s_runtime_resume(struct device *dev) 1115 { 1116 struct i2s_dai *i2s = dev_get_drvdata(dev); 1117 1118 clk_prepare_enable(i2s->clk); 1119 1120 return 0; 1121 } 1122 #endif /* CONFIG_PM_RUNTIME */ 1123 1124 static int samsung_i2s_probe(struct platform_device *pdev) 1125 { 1126 struct i2s_dai *pri_dai, *sec_dai = NULL; 1127 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1128 struct samsung_i2s *i2s_cfg = NULL; 1129 struct resource *res; 1130 u32 regs_base, quirks = 0, idma_addr = 0; 1131 struct device_node *np = pdev->dev.of_node; 1132 const struct samsung_i2s_dai_data *i2s_dai_data; 1133 int ret = 0; 1134 1135 /* Call during Seconday interface registration */ 1136 i2s_dai_data = samsung_i2s_get_driver_data(pdev); 1137 1138 if (i2s_dai_data->dai_type == TYPE_SEC) { 1139 sec_dai = dev_get_drvdata(&pdev->dev); 1140 if (!sec_dai) { 1141 dev_err(&pdev->dev, "Unable to get drvdata\n"); 1142 return -EFAULT; 1143 } 1144 devm_snd_soc_register_component(&sec_dai->pdev->dev, 1145 &samsung_i2s_component, 1146 &sec_dai->i2s_dai_drv, 1); 1147 samsung_asoc_dma_platform_register(&pdev->dev); 1148 return 0; 1149 } 1150 1151 pri_dai = i2s_alloc_dai(pdev, false); 1152 if (!pri_dai) { 1153 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); 1154 return -ENOMEM; 1155 } 1156 1157 if (!np) { 1158 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1159 if (!res) { 1160 dev_err(&pdev->dev, 1161 "Unable to get I2S-TX dma resource\n"); 1162 return -ENXIO; 1163 } 1164 pri_dai->dma_playback.channel = res->start; 1165 1166 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 1167 if (!res) { 1168 dev_err(&pdev->dev, 1169 "Unable to get I2S-RX dma resource\n"); 1170 return -ENXIO; 1171 } 1172 pri_dai->dma_capture.channel = res->start; 1173 1174 if (i2s_pdata == NULL) { 1175 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); 1176 return -EINVAL; 1177 } 1178 1179 if (&i2s_pdata->type) 1180 i2s_cfg = &i2s_pdata->type.i2s; 1181 1182 if (i2s_cfg) { 1183 quirks = i2s_cfg->quirks; 1184 idma_addr = i2s_cfg->idma_addr; 1185 } 1186 } else { 1187 quirks = i2s_dai_data->quirks; 1188 if (of_property_read_u32(np, "samsung,idma-addr", 1189 &idma_addr)) { 1190 if (quirks & QUIRK_SEC_DAI) { 1191 dev_err(&pdev->dev, "idma address is not"\ 1192 "specified"); 1193 return -EINVAL; 1194 } 1195 } 1196 } 1197 1198 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1199 if (!res) { 1200 dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); 1201 return -ENXIO; 1202 } 1203 1204 if (!request_mem_region(res->start, resource_size(res), 1205 "samsung-i2s")) { 1206 dev_err(&pdev->dev, "Unable to request SFR region\n"); 1207 return -EBUSY; 1208 } 1209 regs_base = res->start; 1210 1211 pri_dai->dma_playback.dma_addr = regs_base + I2STXD; 1212 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; 1213 pri_dai->dma_playback.client = 1214 (struct s3c2410_dma_client *)&pri_dai->dma_playback; 1215 pri_dai->dma_playback.ch_name = "tx"; 1216 pri_dai->dma_capture.client = 1217 (struct s3c2410_dma_client *)&pri_dai->dma_capture; 1218 pri_dai->dma_capture.ch_name = "rx"; 1219 pri_dai->dma_playback.dma_size = 4; 1220 pri_dai->dma_capture.dma_size = 4; 1221 pri_dai->base = regs_base; 1222 pri_dai->quirks = quirks; 1223 1224 if (quirks & QUIRK_PRI_6CHAN) 1225 pri_dai->i2s_dai_drv.playback.channels_max = 6; 1226 1227 if (quirks & QUIRK_SEC_DAI) { 1228 sec_dai = i2s_alloc_dai(pdev, true); 1229 if (!sec_dai) { 1230 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); 1231 ret = -ENOMEM; 1232 goto err; 1233 } 1234 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; 1235 sec_dai->dma_playback.client = 1236 (struct s3c2410_dma_client *)&sec_dai->dma_playback; 1237 sec_dai->dma_playback.ch_name = "tx-sec"; 1238 1239 if (!np) { 1240 res = platform_get_resource(pdev, IORESOURCE_DMA, 2); 1241 if (res) 1242 sec_dai->dma_playback.channel = res->start; 1243 } 1244 1245 sec_dai->dma_playback.dma_size = 4; 1246 sec_dai->base = regs_base; 1247 sec_dai->quirks = quirks; 1248 sec_dai->idma_playback.dma_addr = idma_addr; 1249 sec_dai->pri_dai = pri_dai; 1250 pri_dai->sec_dai = sec_dai; 1251 } 1252 1253 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1254 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1255 ret = -EINVAL; 1256 goto err; 1257 } 1258 1259 devm_snd_soc_register_component(&pri_dai->pdev->dev, 1260 &samsung_i2s_component, 1261 &pri_dai->i2s_dai_drv, 1); 1262 1263 pm_runtime_enable(&pdev->dev); 1264 1265 samsung_asoc_dma_platform_register(&pdev->dev); 1266 1267 return 0; 1268 err: 1269 if (res) 1270 release_mem_region(regs_base, resource_size(res)); 1271 1272 return ret; 1273 } 1274 1275 static int samsung_i2s_remove(struct platform_device *pdev) 1276 { 1277 struct i2s_dai *i2s, *other; 1278 struct resource *res; 1279 1280 i2s = dev_get_drvdata(&pdev->dev); 1281 other = i2s->pri_dai ? : i2s->sec_dai; 1282 1283 if (other) { 1284 other->pri_dai = NULL; 1285 other->sec_dai = NULL; 1286 } else { 1287 pm_runtime_disable(&pdev->dev); 1288 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1289 if (res) 1290 release_mem_region(res->start, resource_size(res)); 1291 } 1292 1293 i2s->pri_dai = NULL; 1294 i2s->sec_dai = NULL; 1295 1296 samsung_asoc_dma_platform_unregister(&pdev->dev); 1297 1298 return 0; 1299 } 1300 1301 static const struct samsung_i2s_dai_data i2sv3_dai_type = { 1302 .dai_type = TYPE_PRI, 1303 .quirks = QUIRK_NO_MUXPSR, 1304 }; 1305 1306 static const struct samsung_i2s_dai_data i2sv5_dai_type = { 1307 .dai_type = TYPE_PRI, 1308 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR, 1309 }; 1310 1311 static const struct samsung_i2s_dai_data i2sv6_dai_type = { 1312 .dai_type = TYPE_PRI, 1313 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1314 QUIRK_SUPPORTS_TDM, 1315 }; 1316 1317 static const struct samsung_i2s_dai_data samsung_dai_type_pri = { 1318 .dai_type = TYPE_PRI, 1319 }; 1320 1321 static const struct samsung_i2s_dai_data samsung_dai_type_sec = { 1322 .dai_type = TYPE_SEC, 1323 }; 1324 1325 static struct platform_device_id samsung_i2s_driver_ids[] = { 1326 { 1327 .name = "samsung-i2s", 1328 .driver_data = (kernel_ulong_t)&samsung_dai_type_pri, 1329 }, { 1330 .name = "samsung-i2s-sec", 1331 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec, 1332 }, 1333 {}, 1334 }; 1335 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1336 1337 #ifdef CONFIG_OF 1338 static const struct of_device_id exynos_i2s_match[] = { 1339 { 1340 .compatible = "samsung,s3c6410-i2s", 1341 .data = &i2sv3_dai_type, 1342 }, { 1343 .compatible = "samsung,s5pv210-i2s", 1344 .data = &i2sv5_dai_type, 1345 }, { 1346 .compatible = "samsung,exynos5420-i2s", 1347 .data = &i2sv6_dai_type, 1348 }, 1349 {}, 1350 }; 1351 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1352 #endif 1353 1354 static const struct dev_pm_ops samsung_i2s_pm = { 1355 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1356 i2s_runtime_resume, NULL) 1357 }; 1358 1359 static struct platform_driver samsung_i2s_driver = { 1360 .probe = samsung_i2s_probe, 1361 .remove = samsung_i2s_remove, 1362 .id_table = samsung_i2s_driver_ids, 1363 .driver = { 1364 .name = "samsung-i2s", 1365 .owner = THIS_MODULE, 1366 .of_match_table = of_match_ptr(exynos_i2s_match), 1367 .pm = &samsung_i2s_pm, 1368 }, 1369 }; 1370 1371 module_platform_driver(samsung_i2s_driver); 1372 1373 /* Module information */ 1374 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1375 MODULE_DESCRIPTION("Samsung I2S Interface"); 1376 MODULE_ALIAS("platform:samsung-i2s"); 1377 MODULE_LICENSE("GPL"); 1378