1 /* sound/soc/samsung/i2s.c 2 * 3 * ALSA SoC Audio Layer - Samsung I2S Controller driver 4 * 5 * Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 * Jaswinder Singh <jassisinghbrar@gmail.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/delay.h> 14 #include <linux/slab.h> 15 #include <linux/clk.h> 16 #include <linux/io.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/of_gpio.h> 20 #include <linux/pm_runtime.h> 21 22 #include <sound/soc.h> 23 #include <sound/pcm_params.h> 24 25 #include <mach/dma.h> 26 27 #include <linux/platform_data/asoc-s3c.h> 28 29 #include "dma.h" 30 #include "idma.h" 31 #include "i2s.h" 32 #include "i2s-regs.h" 33 34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 35 36 enum samsung_dai_type { 37 TYPE_PRI, 38 TYPE_SEC, 39 }; 40 41 struct samsung_i2s_dai_data { 42 int dai_type; 43 }; 44 45 struct i2s_dai { 46 /* Platform device for this DAI */ 47 struct platform_device *pdev; 48 /* IOREMAP'd SFRs */ 49 void __iomem *addr; 50 /* Physical base address of SFRs */ 51 u32 base; 52 /* Rate of RCLK source clock */ 53 unsigned long rclk_srcrate; 54 /* Frame Clock */ 55 unsigned frmclk; 56 /* 57 * Specifically requested RCLK,BCLK by MACHINE Driver. 58 * 0 indicates CPU driver is free to choose any value. 59 */ 60 unsigned rfs, bfs; 61 /* I2S Controller's core clock */ 62 struct clk *clk; 63 /* Clock for generating I2S signals */ 64 struct clk *op_clk; 65 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 66 struct i2s_dai *pri_dai; 67 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 68 struct i2s_dai *sec_dai; 69 #define DAI_OPENED (1 << 0) /* Dai is opened */ 70 #define DAI_MANAGER (1 << 1) /* Dai is the manager */ 71 unsigned mode; 72 /* Driver for this DAI */ 73 struct snd_soc_dai_driver i2s_dai_drv; 74 /* DMA parameters */ 75 struct s3c_dma_params dma_playback; 76 struct s3c_dma_params dma_capture; 77 struct s3c_dma_params idma_playback; 78 u32 quirks; 79 u32 suspend_i2smod; 80 u32 suspend_i2scon; 81 u32 suspend_i2spsr; 82 unsigned long gpios[7]; /* i2s gpio line numbers */ 83 }; 84 85 /* Lock for cross i/f checks */ 86 static DEFINE_SPINLOCK(lock); 87 88 /* If this is the 'overlay' stereo DAI */ 89 static inline bool is_secondary(struct i2s_dai *i2s) 90 { 91 return i2s->pri_dai ? true : false; 92 } 93 94 /* If operating in SoC-Slave mode */ 95 static inline bool is_slave(struct i2s_dai *i2s) 96 { 97 return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false; 98 } 99 100 /* If this interface of the controller is transmitting data */ 101 static inline bool tx_active(struct i2s_dai *i2s) 102 { 103 u32 active; 104 105 if (!i2s) 106 return false; 107 108 active = readl(i2s->addr + I2SCON); 109 110 if (is_secondary(i2s)) 111 active &= CON_TXSDMA_ACTIVE; 112 else 113 active &= CON_TXDMA_ACTIVE; 114 115 return active ? true : false; 116 } 117 118 /* If the other interface of the controller is transmitting data */ 119 static inline bool other_tx_active(struct i2s_dai *i2s) 120 { 121 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 122 123 return tx_active(other); 124 } 125 126 /* If any interface of the controller is transmitting data */ 127 static inline bool any_tx_active(struct i2s_dai *i2s) 128 { 129 return tx_active(i2s) || other_tx_active(i2s); 130 } 131 132 /* If this interface of the controller is receiving data */ 133 static inline bool rx_active(struct i2s_dai *i2s) 134 { 135 u32 active; 136 137 if (!i2s) 138 return false; 139 140 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE; 141 142 return active ? true : false; 143 } 144 145 /* If the other interface of the controller is receiving data */ 146 static inline bool other_rx_active(struct i2s_dai *i2s) 147 { 148 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 149 150 return rx_active(other); 151 } 152 153 /* If any interface of the controller is receiving data */ 154 static inline bool any_rx_active(struct i2s_dai *i2s) 155 { 156 return rx_active(i2s) || other_rx_active(i2s); 157 } 158 159 /* If the other DAI is transmitting or receiving data */ 160 static inline bool other_active(struct i2s_dai *i2s) 161 { 162 return other_rx_active(i2s) || other_tx_active(i2s); 163 } 164 165 /* If this DAI is transmitting or receiving data */ 166 static inline bool this_active(struct i2s_dai *i2s) 167 { 168 return tx_active(i2s) || rx_active(i2s); 169 } 170 171 /* If the controller is active anyway */ 172 static inline bool any_active(struct i2s_dai *i2s) 173 { 174 return this_active(i2s) || other_active(i2s); 175 } 176 177 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 178 { 179 return snd_soc_dai_get_drvdata(dai); 180 } 181 182 static inline bool is_opened(struct i2s_dai *i2s) 183 { 184 if (i2s && (i2s->mode & DAI_OPENED)) 185 return true; 186 else 187 return false; 188 } 189 190 static inline bool is_manager(struct i2s_dai *i2s) 191 { 192 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 193 return true; 194 else 195 return false; 196 } 197 198 /* Read RCLK of I2S (in multiples of LRCLK) */ 199 static inline unsigned get_rfs(struct i2s_dai *i2s) 200 { 201 u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3; 202 203 switch (rfs) { 204 case 3: return 768; 205 case 2: return 384; 206 case 1: return 512; 207 default: return 256; 208 } 209 } 210 211 /* Write RCLK of I2S (in multiples of LRCLK) */ 212 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 213 { 214 u32 mod = readl(i2s->addr + I2SMOD); 215 216 mod &= ~MOD_RCLK_MASK; 217 218 switch (rfs) { 219 case 768: 220 mod |= MOD_RCLK_768FS; 221 break; 222 case 512: 223 mod |= MOD_RCLK_512FS; 224 break; 225 case 384: 226 mod |= MOD_RCLK_384FS; 227 break; 228 default: 229 mod |= MOD_RCLK_256FS; 230 break; 231 } 232 233 writel(mod, i2s->addr + I2SMOD); 234 } 235 236 /* Read Bit-Clock of I2S (in multiples of LRCLK) */ 237 static inline unsigned get_bfs(struct i2s_dai *i2s) 238 { 239 u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3; 240 241 switch (bfs) { 242 case 3: return 24; 243 case 2: return 16; 244 case 1: return 48; 245 default: return 32; 246 } 247 } 248 249 /* Write Bit-Clock of I2S (in multiples of LRCLK) */ 250 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 251 { 252 u32 mod = readl(i2s->addr + I2SMOD); 253 254 mod &= ~MOD_BCLK_MASK; 255 256 switch (bfs) { 257 case 48: 258 mod |= MOD_BCLK_48FS; 259 break; 260 case 32: 261 mod |= MOD_BCLK_32FS; 262 break; 263 case 24: 264 mod |= MOD_BCLK_24FS; 265 break; 266 case 16: 267 mod |= MOD_BCLK_16FS; 268 break; 269 default: 270 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 271 return; 272 } 273 274 writel(mod, i2s->addr + I2SMOD); 275 } 276 277 /* Sample-Size */ 278 static inline int get_blc(struct i2s_dai *i2s) 279 { 280 int blc = readl(i2s->addr + I2SMOD); 281 282 blc = (blc >> 13) & 0x3; 283 284 switch (blc) { 285 case 2: return 24; 286 case 1: return 8; 287 default: return 16; 288 } 289 } 290 291 /* TX Channel Control */ 292 static void i2s_txctrl(struct i2s_dai *i2s, int on) 293 { 294 void __iomem *addr = i2s->addr; 295 u32 con = readl(addr + I2SCON); 296 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; 297 298 if (on) { 299 con |= CON_ACTIVE; 300 con &= ~CON_TXCH_PAUSE; 301 302 if (is_secondary(i2s)) { 303 con |= CON_TXSDMA_ACTIVE; 304 con &= ~CON_TXSDMA_PAUSE; 305 } else { 306 con |= CON_TXDMA_ACTIVE; 307 con &= ~CON_TXDMA_PAUSE; 308 } 309 310 if (any_rx_active(i2s)) 311 mod |= MOD_TXRX; 312 else 313 mod |= MOD_TXONLY; 314 } else { 315 if (is_secondary(i2s)) { 316 con |= CON_TXSDMA_PAUSE; 317 con &= ~CON_TXSDMA_ACTIVE; 318 } else { 319 con |= CON_TXDMA_PAUSE; 320 con &= ~CON_TXDMA_ACTIVE; 321 } 322 323 if (other_tx_active(i2s)) { 324 writel(con, addr + I2SCON); 325 return; 326 } 327 328 con |= CON_TXCH_PAUSE; 329 330 if (any_rx_active(i2s)) 331 mod |= MOD_RXONLY; 332 else 333 con &= ~CON_ACTIVE; 334 } 335 336 writel(mod, addr + I2SMOD); 337 writel(con, addr + I2SCON); 338 } 339 340 /* RX Channel Control */ 341 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 342 { 343 void __iomem *addr = i2s->addr; 344 u32 con = readl(addr + I2SCON); 345 u32 mod = readl(addr + I2SMOD) & ~MOD_MASK; 346 347 if (on) { 348 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 349 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 350 351 if (any_tx_active(i2s)) 352 mod |= MOD_TXRX; 353 else 354 mod |= MOD_RXONLY; 355 } else { 356 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 357 con &= ~CON_RXDMA_ACTIVE; 358 359 if (any_tx_active(i2s)) 360 mod |= MOD_TXONLY; 361 else 362 con &= ~CON_ACTIVE; 363 } 364 365 writel(mod, addr + I2SMOD); 366 writel(con, addr + I2SCON); 367 } 368 369 /* Flush FIFO of an interface */ 370 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 371 { 372 void __iomem *fic; 373 u32 val; 374 375 if (!i2s) 376 return; 377 378 if (is_secondary(i2s)) 379 fic = i2s->addr + I2SFICS; 380 else 381 fic = i2s->addr + I2SFIC; 382 383 /* Flush the FIFO */ 384 writel(readl(fic) | flush, fic); 385 386 /* Be patient */ 387 val = msecs_to_loops(1) / 1000; /* 1 usec */ 388 while (--val) 389 cpu_relax(); 390 391 writel(readl(fic) & ~flush, fic); 392 } 393 394 static int i2s_set_sysclk(struct snd_soc_dai *dai, 395 int clk_id, unsigned int rfs, int dir) 396 { 397 struct i2s_dai *i2s = to_info(dai); 398 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 399 u32 mod = readl(i2s->addr + I2SMOD); 400 401 switch (clk_id) { 402 case SAMSUNG_I2S_CDCLK: 403 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 404 if (dir == SND_SOC_CLOCK_IN) 405 rfs = 0; 406 407 if ((rfs && other->rfs && (other->rfs != rfs)) || 408 (any_active(i2s) && 409 (((dir == SND_SOC_CLOCK_IN) 410 && !(mod & MOD_CDCLKCON)) || 411 ((dir == SND_SOC_CLOCK_OUT) 412 && (mod & MOD_CDCLKCON))))) { 413 dev_err(&i2s->pdev->dev, 414 "%s:%d Other DAI busy\n", __func__, __LINE__); 415 return -EAGAIN; 416 } 417 418 if (dir == SND_SOC_CLOCK_IN) 419 mod |= MOD_CDCLKCON; 420 else 421 mod &= ~MOD_CDCLKCON; 422 423 i2s->rfs = rfs; 424 break; 425 426 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 427 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 428 if ((i2s->quirks & QUIRK_NO_MUXPSR) 429 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 430 clk_id = 0; 431 else 432 clk_id = 1; 433 434 if (!any_active(i2s)) { 435 if (i2s->op_clk) { 436 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) || 437 (!clk_id && (mod & MOD_IMS_SYSMUX))) { 438 clk_disable_unprepare(i2s->op_clk); 439 clk_put(i2s->op_clk); 440 } else { 441 i2s->rclk_srcrate = 442 clk_get_rate(i2s->op_clk); 443 return 0; 444 } 445 } 446 447 if (clk_id) 448 i2s->op_clk = clk_get(&i2s->pdev->dev, 449 "i2s_opclk1"); 450 else 451 i2s->op_clk = clk_get(&i2s->pdev->dev, 452 "i2s_opclk0"); 453 clk_prepare_enable(i2s->op_clk); 454 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk); 455 456 /* Over-ride the other's */ 457 if (other) { 458 other->op_clk = i2s->op_clk; 459 other->rclk_srcrate = i2s->rclk_srcrate; 460 } 461 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX)) 462 || (clk_id && !(mod & MOD_IMS_SYSMUX))) { 463 dev_err(&i2s->pdev->dev, 464 "%s:%d Other DAI busy\n", __func__, __LINE__); 465 return -EAGAIN; 466 } else { 467 /* Call can't be on the active DAI */ 468 i2s->op_clk = other->op_clk; 469 i2s->rclk_srcrate = other->rclk_srcrate; 470 return 0; 471 } 472 473 if (clk_id == 0) 474 mod &= ~MOD_IMS_SYSMUX; 475 else 476 mod |= MOD_IMS_SYSMUX; 477 break; 478 479 default: 480 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 481 return -EINVAL; 482 } 483 484 writel(mod, i2s->addr + I2SMOD); 485 486 return 0; 487 } 488 489 static int i2s_set_fmt(struct snd_soc_dai *dai, 490 unsigned int fmt) 491 { 492 struct i2s_dai *i2s = to_info(dai); 493 u32 mod = readl(i2s->addr + I2SMOD); 494 u32 tmp = 0; 495 496 /* Format is priority */ 497 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 498 case SND_SOC_DAIFMT_RIGHT_J: 499 tmp |= MOD_LR_RLOW; 500 tmp |= MOD_SDF_MSB; 501 break; 502 case SND_SOC_DAIFMT_LEFT_J: 503 tmp |= MOD_LR_RLOW; 504 tmp |= MOD_SDF_LSB; 505 break; 506 case SND_SOC_DAIFMT_I2S: 507 tmp |= MOD_SDF_IIS; 508 break; 509 default: 510 dev_err(&i2s->pdev->dev, "Format not supported\n"); 511 return -EINVAL; 512 } 513 514 /* 515 * INV flag is relative to the FORMAT flag - if set it simply 516 * flips the polarity specified by the Standard 517 */ 518 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 519 case SND_SOC_DAIFMT_NB_NF: 520 break; 521 case SND_SOC_DAIFMT_NB_IF: 522 if (tmp & MOD_LR_RLOW) 523 tmp &= ~MOD_LR_RLOW; 524 else 525 tmp |= MOD_LR_RLOW; 526 break; 527 default: 528 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 529 return -EINVAL; 530 } 531 532 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 533 case SND_SOC_DAIFMT_CBM_CFM: 534 tmp |= MOD_SLAVE; 535 break; 536 case SND_SOC_DAIFMT_CBS_CFS: 537 /* Set default source clock in Master mode */ 538 if (i2s->rclk_srcrate == 0) 539 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 540 0, SND_SOC_CLOCK_IN); 541 break; 542 default: 543 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 544 return -EINVAL; 545 } 546 547 if (any_active(i2s) && 548 ((mod & (MOD_SDF_MASK | MOD_LR_RLOW 549 | MOD_SLAVE)) != tmp)) { 550 dev_err(&i2s->pdev->dev, 551 "%s:%d Other DAI busy\n", __func__, __LINE__); 552 return -EAGAIN; 553 } 554 555 mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE); 556 mod |= tmp; 557 writel(mod, i2s->addr + I2SMOD); 558 559 return 0; 560 } 561 562 static int i2s_hw_params(struct snd_pcm_substream *substream, 563 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 564 { 565 struct i2s_dai *i2s = to_info(dai); 566 u32 mod = readl(i2s->addr + I2SMOD); 567 568 if (!is_secondary(i2s)) 569 mod &= ~(MOD_DC2_EN | MOD_DC1_EN); 570 571 switch (params_channels(params)) { 572 case 6: 573 mod |= MOD_DC2_EN; 574 case 4: 575 mod |= MOD_DC1_EN; 576 break; 577 case 2: 578 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 579 i2s->dma_playback.dma_size = 4; 580 else 581 i2s->dma_capture.dma_size = 4; 582 break; 583 case 1: 584 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 585 i2s->dma_playback.dma_size = 2; 586 else 587 i2s->dma_capture.dma_size = 2; 588 589 break; 590 default: 591 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 592 params_channels(params)); 593 return -EINVAL; 594 } 595 596 if (is_secondary(i2s)) 597 mod &= ~MOD_BLCS_MASK; 598 else 599 mod &= ~MOD_BLCP_MASK; 600 601 if (is_manager(i2s)) 602 mod &= ~MOD_BLC_MASK; 603 604 switch (params_format(params)) { 605 case SNDRV_PCM_FORMAT_S8: 606 if (is_secondary(i2s)) 607 mod |= MOD_BLCS_8BIT; 608 else 609 mod |= MOD_BLCP_8BIT; 610 if (is_manager(i2s)) 611 mod |= MOD_BLC_8BIT; 612 break; 613 case SNDRV_PCM_FORMAT_S16_LE: 614 if (is_secondary(i2s)) 615 mod |= MOD_BLCS_16BIT; 616 else 617 mod |= MOD_BLCP_16BIT; 618 if (is_manager(i2s)) 619 mod |= MOD_BLC_16BIT; 620 break; 621 case SNDRV_PCM_FORMAT_S24_LE: 622 if (is_secondary(i2s)) 623 mod |= MOD_BLCS_24BIT; 624 else 625 mod |= MOD_BLCP_24BIT; 626 if (is_manager(i2s)) 627 mod |= MOD_BLC_24BIT; 628 break; 629 default: 630 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 631 params_format(params)); 632 return -EINVAL; 633 } 634 writel(mod, i2s->addr + I2SMOD); 635 636 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 637 snd_soc_dai_set_dma_data(dai, substream, 638 (void *)&i2s->dma_playback); 639 else 640 snd_soc_dai_set_dma_data(dai, substream, 641 (void *)&i2s->dma_capture); 642 643 i2s->frmclk = params_rate(params); 644 645 return 0; 646 } 647 648 /* We set constraints on the substream acc to the version of I2S */ 649 static int i2s_startup(struct snd_pcm_substream *substream, 650 struct snd_soc_dai *dai) 651 { 652 struct i2s_dai *i2s = to_info(dai); 653 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 654 unsigned long flags; 655 656 spin_lock_irqsave(&lock, flags); 657 658 i2s->mode |= DAI_OPENED; 659 660 if (is_manager(other)) 661 i2s->mode &= ~DAI_MANAGER; 662 else 663 i2s->mode |= DAI_MANAGER; 664 665 /* Enforce set_sysclk in Master mode */ 666 i2s->rclk_srcrate = 0; 667 668 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR)) 669 writel(CON_RSTCLR, i2s->addr + I2SCON); 670 671 spin_unlock_irqrestore(&lock, flags); 672 673 return 0; 674 } 675 676 static void i2s_shutdown(struct snd_pcm_substream *substream, 677 struct snd_soc_dai *dai) 678 { 679 struct i2s_dai *i2s = to_info(dai); 680 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 681 unsigned long flags; 682 683 spin_lock_irqsave(&lock, flags); 684 685 i2s->mode &= ~DAI_OPENED; 686 i2s->mode &= ~DAI_MANAGER; 687 688 if (is_opened(other)) 689 other->mode |= DAI_MANAGER; 690 691 /* Reset any constraint on RFS and BFS */ 692 i2s->rfs = 0; 693 i2s->bfs = 0; 694 695 spin_unlock_irqrestore(&lock, flags); 696 697 /* Gate CDCLK by default */ 698 if (!is_opened(other)) 699 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 700 0, SND_SOC_CLOCK_IN); 701 } 702 703 static int config_setup(struct i2s_dai *i2s) 704 { 705 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 706 unsigned rfs, bfs, blc; 707 u32 psr; 708 709 blc = get_blc(i2s); 710 711 bfs = i2s->bfs; 712 713 if (!bfs && other) 714 bfs = other->bfs; 715 716 /* Select least possible multiple(2) if no constraint set */ 717 if (!bfs) 718 bfs = blc * 2; 719 720 rfs = i2s->rfs; 721 722 if (!rfs && other) 723 rfs = other->rfs; 724 725 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 726 dev_err(&i2s->pdev->dev, 727 "%d-RFS not supported for 24-blc\n", rfs); 728 return -EINVAL; 729 } 730 731 if (!rfs) { 732 if (bfs == 16 || bfs == 32) 733 rfs = 256; 734 else 735 rfs = 384; 736 } 737 738 /* If already setup and running */ 739 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 740 dev_err(&i2s->pdev->dev, 741 "%s:%d Other DAI busy\n", __func__, __LINE__); 742 return -EAGAIN; 743 } 744 745 set_bfs(i2s, bfs); 746 set_rfs(i2s, rfs); 747 748 /* Don't bother with PSR in Slave mode */ 749 if (is_slave(i2s)) 750 return 0; 751 752 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { 753 psr = i2s->rclk_srcrate / i2s->frmclk / rfs; 754 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); 755 dev_dbg(&i2s->pdev->dev, 756 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 757 i2s->rclk_srcrate, psr, rfs, bfs); 758 } 759 760 return 0; 761 } 762 763 static int i2s_trigger(struct snd_pcm_substream *substream, 764 int cmd, struct snd_soc_dai *dai) 765 { 766 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 767 struct snd_soc_pcm_runtime *rtd = substream->private_data; 768 struct i2s_dai *i2s = to_info(rtd->cpu_dai); 769 unsigned long flags; 770 771 switch (cmd) { 772 case SNDRV_PCM_TRIGGER_START: 773 case SNDRV_PCM_TRIGGER_RESUME: 774 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 775 local_irq_save(flags); 776 777 if (config_setup(i2s)) { 778 local_irq_restore(flags); 779 return -EINVAL; 780 } 781 782 if (capture) 783 i2s_rxctrl(i2s, 1); 784 else 785 i2s_txctrl(i2s, 1); 786 787 local_irq_restore(flags); 788 break; 789 case SNDRV_PCM_TRIGGER_STOP: 790 case SNDRV_PCM_TRIGGER_SUSPEND: 791 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 792 local_irq_save(flags); 793 794 if (capture) { 795 i2s_rxctrl(i2s, 0); 796 i2s_fifo(i2s, FIC_RXFLUSH); 797 } else { 798 i2s_txctrl(i2s, 0); 799 i2s_fifo(i2s, FIC_TXFLUSH); 800 } 801 802 local_irq_restore(flags); 803 break; 804 } 805 806 return 0; 807 } 808 809 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 810 int div_id, int div) 811 { 812 struct i2s_dai *i2s = to_info(dai); 813 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 814 815 switch (div_id) { 816 case SAMSUNG_I2S_DIV_BCLK: 817 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 818 || (other && other->bfs && (other->bfs != div))) { 819 dev_err(&i2s->pdev->dev, 820 "%s:%d Other DAI busy\n", __func__, __LINE__); 821 return -EAGAIN; 822 } 823 i2s->bfs = div; 824 break; 825 default: 826 dev_err(&i2s->pdev->dev, 827 "Invalid clock divider(%d)\n", div_id); 828 return -EINVAL; 829 } 830 831 return 0; 832 } 833 834 static snd_pcm_sframes_t 835 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 836 { 837 struct i2s_dai *i2s = to_info(dai); 838 u32 reg = readl(i2s->addr + I2SFIC); 839 snd_pcm_sframes_t delay; 840 841 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 842 delay = FIC_RXCOUNT(reg); 843 else if (is_secondary(i2s)) 844 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS)); 845 else 846 delay = FIC_TXCOUNT(reg); 847 848 return delay; 849 } 850 851 #ifdef CONFIG_PM 852 static int i2s_suspend(struct snd_soc_dai *dai) 853 { 854 struct i2s_dai *i2s = to_info(dai); 855 856 if (dai->active) { 857 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD); 858 i2s->suspend_i2scon = readl(i2s->addr + I2SCON); 859 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR); 860 } 861 862 return 0; 863 } 864 865 static int i2s_resume(struct snd_soc_dai *dai) 866 { 867 struct i2s_dai *i2s = to_info(dai); 868 869 if (dai->active) { 870 writel(i2s->suspend_i2scon, i2s->addr + I2SCON); 871 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD); 872 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR); 873 } 874 875 return 0; 876 } 877 #else 878 #define i2s_suspend NULL 879 #define i2s_resume NULL 880 #endif 881 882 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 883 { 884 struct i2s_dai *i2s = to_info(dai); 885 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 886 887 if (other && other->clk) /* If this is probe on secondary */ 888 goto probe_exit; 889 890 i2s->addr = ioremap(i2s->base, 0x100); 891 if (i2s->addr == NULL) { 892 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n"); 893 return -ENXIO; 894 } 895 896 i2s->clk = clk_get(&i2s->pdev->dev, "iis"); 897 if (IS_ERR(i2s->clk)) { 898 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n"); 899 iounmap(i2s->addr); 900 return -ENOENT; 901 } 902 clk_prepare_enable(i2s->clk); 903 904 if (other) { 905 other->addr = i2s->addr; 906 other->clk = i2s->clk; 907 } 908 909 if (i2s->quirks & QUIRK_NEED_RSTCLR) 910 writel(CON_RSTCLR, i2s->addr + I2SCON); 911 912 if (i2s->quirks & QUIRK_SEC_DAI) 913 idma_reg_addr_init(i2s->addr, 914 i2s->sec_dai->idma_playback.dma_addr); 915 916 probe_exit: 917 /* Reset any constraint on RFS and BFS */ 918 i2s->rfs = 0; 919 i2s->bfs = 0; 920 i2s_txctrl(i2s, 0); 921 i2s_rxctrl(i2s, 0); 922 i2s_fifo(i2s, FIC_TXFLUSH); 923 i2s_fifo(other, FIC_TXFLUSH); 924 i2s_fifo(i2s, FIC_RXFLUSH); 925 926 /* Gate CDCLK by default */ 927 if (!is_opened(other)) 928 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 929 0, SND_SOC_CLOCK_IN); 930 931 return 0; 932 } 933 934 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 935 { 936 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai); 937 struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai; 938 939 if (!other || !other->clk) { 940 941 if (i2s->quirks & QUIRK_NEED_RSTCLR) 942 writel(0, i2s->addr + I2SCON); 943 944 clk_disable_unprepare(i2s->clk); 945 clk_put(i2s->clk); 946 947 iounmap(i2s->addr); 948 } 949 950 i2s->clk = NULL; 951 952 return 0; 953 } 954 955 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 956 .trigger = i2s_trigger, 957 .hw_params = i2s_hw_params, 958 .set_fmt = i2s_set_fmt, 959 .set_clkdiv = i2s_set_clkdiv, 960 .set_sysclk = i2s_set_sysclk, 961 .startup = i2s_startup, 962 .shutdown = i2s_shutdown, 963 .delay = i2s_delay, 964 }; 965 966 static const struct snd_soc_component_driver samsung_i2s_component = { 967 .name = "samsung-i2s", 968 }; 969 970 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000 971 972 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \ 973 SNDRV_PCM_FMTBIT_S16_LE | \ 974 SNDRV_PCM_FMTBIT_S24_LE) 975 976 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) 977 { 978 struct i2s_dai *i2s; 979 int ret; 980 981 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL); 982 if (i2s == NULL) 983 return NULL; 984 985 i2s->pdev = pdev; 986 i2s->pri_dai = NULL; 987 i2s->sec_dai = NULL; 988 i2s->i2s_dai_drv.symmetric_rates = 1; 989 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe; 990 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove; 991 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; 992 i2s->i2s_dai_drv.suspend = i2s_suspend; 993 i2s->i2s_dai_drv.resume = i2s_resume; 994 i2s->i2s_dai_drv.playback.channels_min = 2; 995 i2s->i2s_dai_drv.playback.channels_max = 2; 996 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; 997 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; 998 999 if (!sec) { 1000 i2s->i2s_dai_drv.capture.channels_min = 1; 1001 i2s->i2s_dai_drv.capture.channels_max = 2; 1002 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES; 1003 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS; 1004 dev_set_drvdata(&i2s->pdev->dev, i2s); 1005 } else { /* Create a new platform_device for Secondary */ 1006 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1); 1007 if (IS_ERR(i2s->pdev)) 1008 return NULL; 1009 1010 platform_set_drvdata(i2s->pdev, i2s); 1011 ret = platform_device_add(i2s->pdev); 1012 if (ret < 0) 1013 return NULL; 1014 } 1015 1016 return i2s; 1017 } 1018 1019 static const struct of_device_id exynos_i2s_match[]; 1020 1021 static inline int samsung_i2s_get_driver_data(struct platform_device *pdev) 1022 { 1023 #ifdef CONFIG_OF 1024 struct samsung_i2s_dai_data *data; 1025 if (pdev->dev.of_node) { 1026 const struct of_device_id *match; 1027 match = of_match_node(exynos_i2s_match, pdev->dev.of_node); 1028 data = (struct samsung_i2s_dai_data *) match->data; 1029 return data->dai_type; 1030 } else 1031 #endif 1032 return platform_get_device_id(pdev)->driver_data; 1033 } 1034 1035 #ifdef CONFIG_PM_RUNTIME 1036 static int i2s_runtime_suspend(struct device *dev) 1037 { 1038 struct i2s_dai *i2s = dev_get_drvdata(dev); 1039 1040 clk_disable_unprepare(i2s->clk); 1041 1042 return 0; 1043 } 1044 1045 static int i2s_runtime_resume(struct device *dev) 1046 { 1047 struct i2s_dai *i2s = dev_get_drvdata(dev); 1048 1049 clk_prepare_enable(i2s->clk); 1050 1051 return 0; 1052 } 1053 #endif /* CONFIG_PM_RUNTIME */ 1054 1055 static int samsung_i2s_probe(struct platform_device *pdev) 1056 { 1057 struct i2s_dai *pri_dai, *sec_dai = NULL; 1058 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1059 struct samsung_i2s *i2s_cfg = NULL; 1060 struct resource *res; 1061 u32 regs_base, quirks = 0, idma_addr = 0; 1062 struct device_node *np = pdev->dev.of_node; 1063 enum samsung_dai_type samsung_dai_type; 1064 int ret = 0; 1065 1066 /* Call during Seconday interface registration */ 1067 samsung_dai_type = samsung_i2s_get_driver_data(pdev); 1068 1069 if (samsung_dai_type == TYPE_SEC) { 1070 sec_dai = dev_get_drvdata(&pdev->dev); 1071 if (!sec_dai) { 1072 dev_err(&pdev->dev, "Unable to get drvdata\n"); 1073 return -EFAULT; 1074 } 1075 snd_soc_register_component(&sec_dai->pdev->dev, 1076 &samsung_i2s_component, 1077 &sec_dai->i2s_dai_drv, 1); 1078 asoc_dma_platform_register(&pdev->dev); 1079 return 0; 1080 } 1081 1082 pri_dai = i2s_alloc_dai(pdev, false); 1083 if (!pri_dai) { 1084 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n"); 1085 return -ENOMEM; 1086 } 1087 1088 if (!np) { 1089 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1090 if (!res) { 1091 dev_err(&pdev->dev, 1092 "Unable to get I2S-TX dma resource\n"); 1093 return -ENXIO; 1094 } 1095 pri_dai->dma_playback.channel = res->start; 1096 1097 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 1098 if (!res) { 1099 dev_err(&pdev->dev, 1100 "Unable to get I2S-RX dma resource\n"); 1101 return -ENXIO; 1102 } 1103 pri_dai->dma_capture.channel = res->start; 1104 1105 if (i2s_pdata == NULL) { 1106 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n"); 1107 return -EINVAL; 1108 } 1109 1110 if (&i2s_pdata->type) 1111 i2s_cfg = &i2s_pdata->type.i2s; 1112 1113 if (i2s_cfg) { 1114 quirks = i2s_cfg->quirks; 1115 idma_addr = i2s_cfg->idma_addr; 1116 } 1117 } else { 1118 if (of_find_property(np, "samsung,supports-6ch", NULL)) 1119 quirks |= QUIRK_PRI_6CHAN; 1120 1121 if (of_find_property(np, "samsung,supports-secdai", NULL)) 1122 quirks |= QUIRK_SEC_DAI; 1123 1124 if (of_find_property(np, "samsung,supports-rstclr", NULL)) 1125 quirks |= QUIRK_NEED_RSTCLR; 1126 1127 if (of_property_read_u32(np, "samsung,idma-addr", 1128 &idma_addr)) { 1129 if (quirks & QUIRK_SEC_DAI) { 1130 dev_err(&pdev->dev, "idma address is not"\ 1131 "specified"); 1132 return -EINVAL; 1133 } 1134 } 1135 } 1136 1137 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1138 if (!res) { 1139 dev_err(&pdev->dev, "Unable to get I2S SFR address\n"); 1140 return -ENXIO; 1141 } 1142 1143 if (!request_mem_region(res->start, resource_size(res), 1144 "samsung-i2s")) { 1145 dev_err(&pdev->dev, "Unable to request SFR region\n"); 1146 return -EBUSY; 1147 } 1148 regs_base = res->start; 1149 1150 pri_dai->dma_playback.dma_addr = regs_base + I2STXD; 1151 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD; 1152 pri_dai->dma_playback.client = 1153 (struct s3c2410_dma_client *)&pri_dai->dma_playback; 1154 pri_dai->dma_playback.ch_name = "tx"; 1155 pri_dai->dma_capture.client = 1156 (struct s3c2410_dma_client *)&pri_dai->dma_capture; 1157 pri_dai->dma_capture.ch_name = "rx"; 1158 pri_dai->dma_playback.dma_size = 4; 1159 pri_dai->dma_capture.dma_size = 4; 1160 pri_dai->base = regs_base; 1161 pri_dai->quirks = quirks; 1162 1163 if (quirks & QUIRK_PRI_6CHAN) 1164 pri_dai->i2s_dai_drv.playback.channels_max = 6; 1165 1166 if (quirks & QUIRK_SEC_DAI) { 1167 sec_dai = i2s_alloc_dai(pdev, true); 1168 if (!sec_dai) { 1169 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n"); 1170 ret = -ENOMEM; 1171 goto err; 1172 } 1173 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS; 1174 sec_dai->dma_playback.client = 1175 (struct s3c2410_dma_client *)&sec_dai->dma_playback; 1176 sec_dai->dma_playback.ch_name = "tx-sec"; 1177 1178 if (!np) { 1179 res = platform_get_resource(pdev, IORESOURCE_DMA, 2); 1180 if (res) 1181 sec_dai->dma_playback.channel = res->start; 1182 } 1183 1184 sec_dai->dma_playback.dma_size = 4; 1185 sec_dai->base = regs_base; 1186 sec_dai->quirks = quirks; 1187 sec_dai->idma_playback.dma_addr = idma_addr; 1188 sec_dai->pri_dai = pri_dai; 1189 pri_dai->sec_dai = sec_dai; 1190 } 1191 1192 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1193 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1194 ret = -EINVAL; 1195 goto err; 1196 } 1197 1198 snd_soc_register_component(&pri_dai->pdev->dev, &samsung_i2s_component, 1199 &pri_dai->i2s_dai_drv, 1); 1200 1201 pm_runtime_enable(&pdev->dev); 1202 1203 asoc_dma_platform_register(&pdev->dev); 1204 1205 return 0; 1206 err: 1207 release_mem_region(regs_base, resource_size(res)); 1208 1209 return ret; 1210 } 1211 1212 static int samsung_i2s_remove(struct platform_device *pdev) 1213 { 1214 struct i2s_dai *i2s, *other; 1215 struct resource *res; 1216 1217 i2s = dev_get_drvdata(&pdev->dev); 1218 other = i2s->pri_dai ? : i2s->sec_dai; 1219 1220 if (other) { 1221 other->pri_dai = NULL; 1222 other->sec_dai = NULL; 1223 } else { 1224 pm_runtime_disable(&pdev->dev); 1225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1226 if (res) 1227 release_mem_region(res->start, resource_size(res)); 1228 } 1229 1230 i2s->pri_dai = NULL; 1231 i2s->sec_dai = NULL; 1232 1233 asoc_dma_platform_unregister(&pdev->dev); 1234 snd_soc_unregister_component(&pdev->dev); 1235 1236 return 0; 1237 } 1238 1239 static struct platform_device_id samsung_i2s_driver_ids[] = { 1240 { 1241 .name = "samsung-i2s", 1242 .driver_data = TYPE_PRI, 1243 }, { 1244 .name = "samsung-i2s-sec", 1245 .driver_data = TYPE_SEC, 1246 }, 1247 {}, 1248 }; 1249 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1250 1251 #ifdef CONFIG_OF 1252 static struct samsung_i2s_dai_data samsung_i2s_dai_data_array[] = { 1253 [TYPE_PRI] = { TYPE_PRI }, 1254 [TYPE_SEC] = { TYPE_SEC }, 1255 }; 1256 1257 static const struct of_device_id exynos_i2s_match[] = { 1258 { .compatible = "samsung,i2s-v5", 1259 .data = &samsung_i2s_dai_data_array[TYPE_PRI], 1260 }, 1261 {}, 1262 }; 1263 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1264 #endif 1265 1266 static const struct dev_pm_ops samsung_i2s_pm = { 1267 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1268 i2s_runtime_resume, NULL) 1269 }; 1270 1271 static struct platform_driver samsung_i2s_driver = { 1272 .probe = samsung_i2s_probe, 1273 .remove = samsung_i2s_remove, 1274 .id_table = samsung_i2s_driver_ids, 1275 .driver = { 1276 .name = "samsung-i2s", 1277 .owner = THIS_MODULE, 1278 .of_match_table = of_match_ptr(exynos_i2s_match), 1279 .pm = &samsung_i2s_pm, 1280 }, 1281 }; 1282 1283 module_platform_driver(samsung_i2s_driver); 1284 1285 /* Module information */ 1286 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1287 MODULE_DESCRIPTION("Samsung I2S Interface"); 1288 MODULE_ALIAS("platform:samsung-i2s"); 1289 MODULE_LICENSE("GPL"); 1290