1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // ALSA SoC Audio Layer - Samsung I2S Controller driver 4 // 5 // Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 // Jaswinder Singh <jassisinghbrar@gmail.com> 7 8 #include <dt-bindings/sound/samsung-i2s.h> 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/clk.h> 12 #include <linux/clk-provider.h> 13 #include <linux/io.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_gpio.h> 18 #include <linux/pm_runtime.h> 19 20 #include <sound/soc.h> 21 #include <sound/pcm_params.h> 22 23 #include <linux/platform_data/asoc-s3c.h> 24 25 #include "dma.h" 26 #include "idma.h" 27 #include "i2s.h" 28 #include "i2s-regs.h" 29 30 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 31 32 #define SAMSUNG_I2S_ID_PRIMARY 1 33 #define SAMSUNG_I2S_ID_SECONDARY 2 34 35 struct samsung_i2s_variant_regs { 36 unsigned int bfs_off; 37 unsigned int rfs_off; 38 unsigned int sdf_off; 39 unsigned int txr_off; 40 unsigned int rclksrc_off; 41 unsigned int mss_off; 42 unsigned int cdclkcon_off; 43 unsigned int lrp_off; 44 unsigned int bfs_mask; 45 unsigned int rfs_mask; 46 unsigned int ftx0cnt_off; 47 }; 48 49 struct samsung_i2s_dai_data { 50 u32 quirks; 51 unsigned int pcm_rates; 52 const struct samsung_i2s_variant_regs *i2s_variant_regs; 53 }; 54 55 struct i2s_dai { 56 /* Platform device for this DAI */ 57 struct platform_device *pdev; 58 59 /* Frame clock */ 60 unsigned frmclk; 61 /* 62 * Specifically requested RCLK, BCLK by machine driver. 63 * 0 indicates CPU driver is free to choose any value. 64 */ 65 unsigned rfs, bfs; 66 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 67 struct i2s_dai *pri_dai; 68 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 69 struct i2s_dai *sec_dai; 70 71 #define DAI_OPENED (1 << 0) /* DAI is opened */ 72 #define DAI_MANAGER (1 << 1) /* DAI is the manager */ 73 unsigned mode; 74 75 /* Driver for this DAI */ 76 struct snd_soc_dai_driver *drv; 77 78 /* DMA parameters */ 79 struct snd_dmaengine_dai_dma_data dma_playback; 80 struct snd_dmaengine_dai_dma_data dma_capture; 81 struct snd_dmaengine_dai_dma_data idma_playback; 82 dma_filter_fn filter; 83 84 struct samsung_i2s_priv *priv; 85 }; 86 87 struct samsung_i2s_priv { 88 struct platform_device *pdev; 89 struct platform_device *pdev_sec; 90 91 /* Memory mapped SFR region */ 92 void __iomem *addr; 93 94 /* Spinlock protecting access to the device's registers */ 95 spinlock_t lock; 96 97 /* Lock for cross interface checks */ 98 spinlock_t pcm_lock; 99 100 /* CPU DAIs and their corresponding drivers */ 101 struct i2s_dai *dai; 102 struct snd_soc_dai_driver *dai_drv; 103 int num_dais; 104 105 /* The I2S controller's core clock */ 106 struct clk *clk; 107 108 /* Clock for generating I2S signals */ 109 struct clk *op_clk; 110 111 /* Rate of RCLK source clock */ 112 unsigned long rclk_srcrate; 113 114 /* Cache of selected I2S registers for system suspend */ 115 u32 suspend_i2smod; 116 u32 suspend_i2scon; 117 u32 suspend_i2spsr; 118 119 const struct samsung_i2s_variant_regs *variant_regs; 120 u32 quirks; 121 122 /* The clock provider's data */ 123 struct clk *clk_table[3]; 124 struct clk_onecell_data clk_data; 125 }; 126 127 /* Returns true if this is the 'overlay' stereo DAI */ 128 static inline bool is_secondary(struct i2s_dai *i2s) 129 { 130 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; 131 } 132 133 /* If operating in SoC-Slave mode */ 134 static inline bool is_slave(struct i2s_dai *i2s) 135 { 136 struct samsung_i2s_priv *priv = i2s->priv; 137 138 u32 mod = readl(priv->addr + I2SMOD); 139 return (mod & (1 << priv->variant_regs->mss_off)) ? true : false; 140 } 141 142 /* If this interface of the controller is transmitting data */ 143 static inline bool tx_active(struct i2s_dai *i2s) 144 { 145 u32 active; 146 147 if (!i2s) 148 return false; 149 150 active = readl(i2s->priv->addr + I2SCON); 151 152 if (is_secondary(i2s)) 153 active &= CON_TXSDMA_ACTIVE; 154 else 155 active &= CON_TXDMA_ACTIVE; 156 157 return active ? true : false; 158 } 159 160 /* Return pointer to the other DAI */ 161 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s) 162 { 163 return i2s->pri_dai ? : i2s->sec_dai; 164 } 165 166 /* If the other interface of the controller is transmitting data */ 167 static inline bool other_tx_active(struct i2s_dai *i2s) 168 { 169 struct i2s_dai *other = get_other_dai(i2s); 170 171 return tx_active(other); 172 } 173 174 /* If any interface of the controller is transmitting data */ 175 static inline bool any_tx_active(struct i2s_dai *i2s) 176 { 177 return tx_active(i2s) || other_tx_active(i2s); 178 } 179 180 /* If this interface of the controller is receiving data */ 181 static inline bool rx_active(struct i2s_dai *i2s) 182 { 183 u32 active; 184 185 if (!i2s) 186 return false; 187 188 active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE; 189 190 return active ? true : false; 191 } 192 193 /* If the other interface of the controller is receiving data */ 194 static inline bool other_rx_active(struct i2s_dai *i2s) 195 { 196 struct i2s_dai *other = get_other_dai(i2s); 197 198 return rx_active(other); 199 } 200 201 /* If any interface of the controller is receiving data */ 202 static inline bool any_rx_active(struct i2s_dai *i2s) 203 { 204 return rx_active(i2s) || other_rx_active(i2s); 205 } 206 207 /* If the other DAI is transmitting or receiving data */ 208 static inline bool other_active(struct i2s_dai *i2s) 209 { 210 return other_rx_active(i2s) || other_tx_active(i2s); 211 } 212 213 /* If this DAI is transmitting or receiving data */ 214 static inline bool this_active(struct i2s_dai *i2s) 215 { 216 return tx_active(i2s) || rx_active(i2s); 217 } 218 219 /* If the controller is active anyway */ 220 static inline bool any_active(struct i2s_dai *i2s) 221 { 222 return this_active(i2s) || other_active(i2s); 223 } 224 225 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 226 { 227 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 228 229 return &priv->dai[dai->id - 1]; 230 } 231 232 static inline bool is_opened(struct i2s_dai *i2s) 233 { 234 if (i2s && (i2s->mode & DAI_OPENED)) 235 return true; 236 else 237 return false; 238 } 239 240 static inline bool is_manager(struct i2s_dai *i2s) 241 { 242 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 243 return true; 244 else 245 return false; 246 } 247 248 /* Read RCLK of I2S (in multiples of LRCLK) */ 249 static inline unsigned get_rfs(struct i2s_dai *i2s) 250 { 251 struct samsung_i2s_priv *priv = i2s->priv; 252 u32 rfs; 253 254 rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off; 255 rfs &= priv->variant_regs->rfs_mask; 256 257 switch (rfs) { 258 case 7: return 192; 259 case 6: return 96; 260 case 5: return 128; 261 case 4: return 64; 262 case 3: return 768; 263 case 2: return 384; 264 case 1: return 512; 265 default: return 256; 266 } 267 } 268 269 /* Write RCLK of I2S (in multiples of LRCLK) */ 270 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 271 { 272 struct samsung_i2s_priv *priv = i2s->priv; 273 u32 mod = readl(priv->addr + I2SMOD); 274 int rfs_shift = priv->variant_regs->rfs_off; 275 276 mod &= ~(priv->variant_regs->rfs_mask << rfs_shift); 277 278 switch (rfs) { 279 case 192: 280 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift); 281 break; 282 case 96: 283 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift); 284 break; 285 case 128: 286 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift); 287 break; 288 case 64: 289 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift); 290 break; 291 case 768: 292 mod |= (MOD_RCLK_768FS << rfs_shift); 293 break; 294 case 512: 295 mod |= (MOD_RCLK_512FS << rfs_shift); 296 break; 297 case 384: 298 mod |= (MOD_RCLK_384FS << rfs_shift); 299 break; 300 default: 301 mod |= (MOD_RCLK_256FS << rfs_shift); 302 break; 303 } 304 305 writel(mod, priv->addr + I2SMOD); 306 } 307 308 /* Read bit-clock of I2S (in multiples of LRCLK) */ 309 static inline unsigned get_bfs(struct i2s_dai *i2s) 310 { 311 struct samsung_i2s_priv *priv = i2s->priv; 312 u32 bfs; 313 314 bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off; 315 bfs &= priv->variant_regs->bfs_mask; 316 317 switch (bfs) { 318 case 8: return 256; 319 case 7: return 192; 320 case 6: return 128; 321 case 5: return 96; 322 case 4: return 64; 323 case 3: return 24; 324 case 2: return 16; 325 case 1: return 48; 326 default: return 32; 327 } 328 } 329 330 /* Write bit-clock of I2S (in multiples of LRCLK) */ 331 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 332 { 333 struct samsung_i2s_priv *priv = i2s->priv; 334 u32 mod = readl(priv->addr + I2SMOD); 335 int tdm = priv->quirks & QUIRK_SUPPORTS_TDM; 336 int bfs_shift = priv->variant_regs->bfs_off; 337 338 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ 339 if (!tdm && bfs > 48) { 340 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); 341 return; 342 } 343 344 mod &= ~(priv->variant_regs->bfs_mask << bfs_shift); 345 346 switch (bfs) { 347 case 48: 348 mod |= (MOD_BCLK_48FS << bfs_shift); 349 break; 350 case 32: 351 mod |= (MOD_BCLK_32FS << bfs_shift); 352 break; 353 case 24: 354 mod |= (MOD_BCLK_24FS << bfs_shift); 355 break; 356 case 16: 357 mod |= (MOD_BCLK_16FS << bfs_shift); 358 break; 359 case 64: 360 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); 361 break; 362 case 96: 363 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); 364 break; 365 case 128: 366 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); 367 break; 368 case 192: 369 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); 370 break; 371 case 256: 372 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); 373 break; 374 default: 375 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 376 return; 377 } 378 379 writel(mod, priv->addr + I2SMOD); 380 } 381 382 /* Sample size */ 383 static inline int get_blc(struct i2s_dai *i2s) 384 { 385 int blc = readl(i2s->priv->addr + I2SMOD); 386 387 blc = (blc >> 13) & 0x3; 388 389 switch (blc) { 390 case 2: return 24; 391 case 1: return 8; 392 default: return 16; 393 } 394 } 395 396 /* TX channel control */ 397 static void i2s_txctrl(struct i2s_dai *i2s, int on) 398 { 399 struct samsung_i2s_priv *priv = i2s->priv; 400 void __iomem *addr = priv->addr; 401 int txr_off = priv->variant_regs->txr_off; 402 u32 con = readl(addr + I2SCON); 403 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 404 405 if (on) { 406 con |= CON_ACTIVE; 407 con &= ~CON_TXCH_PAUSE; 408 409 if (is_secondary(i2s)) { 410 con |= CON_TXSDMA_ACTIVE; 411 con &= ~CON_TXSDMA_PAUSE; 412 } else { 413 con |= CON_TXDMA_ACTIVE; 414 con &= ~CON_TXDMA_PAUSE; 415 } 416 417 if (any_rx_active(i2s)) 418 mod |= 2 << txr_off; 419 else 420 mod |= 0 << txr_off; 421 } else { 422 if (is_secondary(i2s)) { 423 con |= CON_TXSDMA_PAUSE; 424 con &= ~CON_TXSDMA_ACTIVE; 425 } else { 426 con |= CON_TXDMA_PAUSE; 427 con &= ~CON_TXDMA_ACTIVE; 428 } 429 430 if (other_tx_active(i2s)) { 431 writel(con, addr + I2SCON); 432 return; 433 } 434 435 con |= CON_TXCH_PAUSE; 436 437 if (any_rx_active(i2s)) 438 mod |= 1 << txr_off; 439 else 440 con &= ~CON_ACTIVE; 441 } 442 443 writel(mod, addr + I2SMOD); 444 writel(con, addr + I2SCON); 445 } 446 447 /* RX Channel Control */ 448 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 449 { 450 struct samsung_i2s_priv *priv = i2s->priv; 451 void __iomem *addr = priv->addr; 452 int txr_off = priv->variant_regs->txr_off; 453 u32 con = readl(addr + I2SCON); 454 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 455 456 if (on) { 457 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 458 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 459 460 if (any_tx_active(i2s)) 461 mod |= 2 << txr_off; 462 else 463 mod |= 1 << txr_off; 464 } else { 465 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 466 con &= ~CON_RXDMA_ACTIVE; 467 468 if (any_tx_active(i2s)) 469 mod |= 0 << txr_off; 470 else 471 con &= ~CON_ACTIVE; 472 } 473 474 writel(mod, addr + I2SMOD); 475 writel(con, addr + I2SCON); 476 } 477 478 /* Flush FIFO of an interface */ 479 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 480 { 481 void __iomem *fic; 482 u32 val; 483 484 if (!i2s) 485 return; 486 487 if (is_secondary(i2s)) 488 fic = i2s->priv->addr + I2SFICS; 489 else 490 fic = i2s->priv->addr + I2SFIC; 491 492 /* Flush the FIFO */ 493 writel(readl(fic) | flush, fic); 494 495 /* Be patient */ 496 val = msecs_to_loops(1) / 1000; /* 1 usec */ 497 while (--val) 498 cpu_relax(); 499 500 writel(readl(fic) & ~flush, fic); 501 } 502 503 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs, 504 int dir) 505 { 506 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 507 struct i2s_dai *i2s = to_info(dai); 508 struct i2s_dai *other = get_other_dai(i2s); 509 const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs; 510 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off; 511 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off; 512 u32 mod, mask, val = 0; 513 unsigned long flags; 514 int ret = 0; 515 516 pm_runtime_get_sync(dai->dev); 517 518 spin_lock_irqsave(&priv->lock, flags); 519 mod = readl(priv->addr + I2SMOD); 520 spin_unlock_irqrestore(&priv->lock, flags); 521 522 switch (clk_id) { 523 case SAMSUNG_I2S_OPCLK: 524 mask = MOD_OPCLK_MASK; 525 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK; 526 break; 527 case SAMSUNG_I2S_CDCLK: 528 mask = 1 << i2s_regs->cdclkcon_off; 529 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 530 if (dir == SND_SOC_CLOCK_IN) 531 rfs = 0; 532 533 if ((rfs && other && other->rfs && (other->rfs != rfs)) || 534 (any_active(i2s) && 535 (((dir == SND_SOC_CLOCK_IN) 536 && !(mod & cdcon_mask)) || 537 ((dir == SND_SOC_CLOCK_OUT) 538 && (mod & cdcon_mask))))) { 539 dev_err(&i2s->pdev->dev, 540 "%s:%d Other DAI busy\n", __func__, __LINE__); 541 ret = -EAGAIN; 542 goto err; 543 } 544 545 if (dir == SND_SOC_CLOCK_IN) 546 val = 1 << i2s_regs->cdclkcon_off; 547 548 i2s->rfs = rfs; 549 break; 550 551 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 552 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 553 mask = 1 << i2s_regs->rclksrc_off; 554 555 if ((priv->quirks & QUIRK_NO_MUXPSR) 556 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 557 clk_id = 0; 558 else 559 clk_id = 1; 560 561 if (!any_active(i2s)) { 562 if (priv->op_clk && !IS_ERR(priv->op_clk)) { 563 if ((clk_id && !(mod & rsrc_mask)) || 564 (!clk_id && (mod & rsrc_mask))) { 565 clk_disable_unprepare(priv->op_clk); 566 clk_put(priv->op_clk); 567 } else { 568 priv->rclk_srcrate = 569 clk_get_rate(priv->op_clk); 570 goto done; 571 } 572 } 573 574 if (clk_id) 575 priv->op_clk = clk_get(&i2s->pdev->dev, 576 "i2s_opclk1"); 577 else 578 priv->op_clk = clk_get(&i2s->pdev->dev, 579 "i2s_opclk0"); 580 581 if (WARN_ON(IS_ERR(priv->op_clk))) { 582 ret = PTR_ERR(priv->op_clk); 583 priv->op_clk = NULL; 584 goto err; 585 } 586 587 ret = clk_prepare_enable(priv->op_clk); 588 if (ret) { 589 clk_put(priv->op_clk); 590 priv->op_clk = NULL; 591 goto err; 592 } 593 priv->rclk_srcrate = clk_get_rate(priv->op_clk); 594 595 } else if ((!clk_id && (mod & rsrc_mask)) 596 || (clk_id && !(mod & rsrc_mask))) { 597 dev_err(&i2s->pdev->dev, 598 "%s:%d Other DAI busy\n", __func__, __LINE__); 599 ret = -EAGAIN; 600 goto err; 601 } else { 602 /* Call can't be on the active DAI */ 603 goto done; 604 } 605 606 if (clk_id == 1) 607 val = 1 << i2s_regs->rclksrc_off; 608 break; 609 default: 610 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 611 ret = -EINVAL; 612 goto err; 613 } 614 615 spin_lock_irqsave(&priv->lock, flags); 616 mod = readl(priv->addr + I2SMOD); 617 mod = (mod & ~mask) | val; 618 writel(mod, priv->addr + I2SMOD); 619 spin_unlock_irqrestore(&priv->lock, flags); 620 done: 621 pm_runtime_put(dai->dev); 622 623 return 0; 624 err: 625 pm_runtime_put(dai->dev); 626 return ret; 627 } 628 629 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 630 { 631 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 632 struct i2s_dai *i2s = to_info(dai); 633 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave; 634 u32 mod, tmp = 0; 635 unsigned long flags; 636 637 lrp_shift = priv->variant_regs->lrp_off; 638 sdf_shift = priv->variant_regs->sdf_off; 639 mod_slave = 1 << priv->variant_regs->mss_off; 640 641 sdf_mask = MOD_SDF_MASK << sdf_shift; 642 lrp_rlow = MOD_LR_RLOW << lrp_shift; 643 644 /* Format is priority */ 645 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 646 case SND_SOC_DAIFMT_RIGHT_J: 647 tmp |= lrp_rlow; 648 tmp |= (MOD_SDF_MSB << sdf_shift); 649 break; 650 case SND_SOC_DAIFMT_LEFT_J: 651 tmp |= lrp_rlow; 652 tmp |= (MOD_SDF_LSB << sdf_shift); 653 break; 654 case SND_SOC_DAIFMT_I2S: 655 tmp |= (MOD_SDF_IIS << sdf_shift); 656 break; 657 default: 658 dev_err(&i2s->pdev->dev, "Format not supported\n"); 659 return -EINVAL; 660 } 661 662 /* 663 * INV flag is relative to the FORMAT flag - if set it simply 664 * flips the polarity specified by the Standard 665 */ 666 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 667 case SND_SOC_DAIFMT_NB_NF: 668 break; 669 case SND_SOC_DAIFMT_NB_IF: 670 if (tmp & lrp_rlow) 671 tmp &= ~lrp_rlow; 672 else 673 tmp |= lrp_rlow; 674 break; 675 default: 676 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 677 return -EINVAL; 678 } 679 680 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 681 case SND_SOC_DAIFMT_CBM_CFM: 682 tmp |= mod_slave; 683 break; 684 case SND_SOC_DAIFMT_CBS_CFS: 685 /* 686 * Set default source clock in Master mode, only when the 687 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any 688 * clock configuration assigned in DT is not overwritten. 689 */ 690 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL) 691 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 692 0, SND_SOC_CLOCK_IN); 693 break; 694 default: 695 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 696 return -EINVAL; 697 } 698 699 pm_runtime_get_sync(dai->dev); 700 spin_lock_irqsave(&priv->lock, flags); 701 mod = readl(priv->addr + I2SMOD); 702 /* 703 * Don't change the I2S mode if any controller is active on this 704 * channel. 705 */ 706 if (any_active(i2s) && 707 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) { 708 spin_unlock_irqrestore(&priv->lock, flags); 709 pm_runtime_put(dai->dev); 710 dev_err(&i2s->pdev->dev, 711 "%s:%d Other DAI busy\n", __func__, __LINE__); 712 return -EAGAIN; 713 } 714 715 mod &= ~(sdf_mask | lrp_rlow | mod_slave); 716 mod |= tmp; 717 writel(mod, priv->addr + I2SMOD); 718 spin_unlock_irqrestore(&priv->lock, flags); 719 pm_runtime_put(dai->dev); 720 721 return 0; 722 } 723 724 static int i2s_hw_params(struct snd_pcm_substream *substream, 725 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 726 { 727 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 728 struct i2s_dai *i2s = to_info(dai); 729 u32 mod, mask = 0, val = 0; 730 struct clk *rclksrc; 731 unsigned long flags; 732 733 WARN_ON(!pm_runtime_active(dai->dev)); 734 735 if (!is_secondary(i2s)) 736 mask |= (MOD_DC2_EN | MOD_DC1_EN); 737 738 switch (params_channels(params)) { 739 case 6: 740 val |= MOD_DC2_EN; 741 /* Fall through */ 742 case 4: 743 val |= MOD_DC1_EN; 744 break; 745 case 2: 746 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 747 i2s->dma_playback.addr_width = 4; 748 else 749 i2s->dma_capture.addr_width = 4; 750 break; 751 case 1: 752 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 753 i2s->dma_playback.addr_width = 2; 754 else 755 i2s->dma_capture.addr_width = 2; 756 757 break; 758 default: 759 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 760 params_channels(params)); 761 return -EINVAL; 762 } 763 764 if (is_secondary(i2s)) 765 mask |= MOD_BLCS_MASK; 766 else 767 mask |= MOD_BLCP_MASK; 768 769 if (is_manager(i2s)) 770 mask |= MOD_BLC_MASK; 771 772 switch (params_width(params)) { 773 case 8: 774 if (is_secondary(i2s)) 775 val |= MOD_BLCS_8BIT; 776 else 777 val |= MOD_BLCP_8BIT; 778 if (is_manager(i2s)) 779 val |= MOD_BLC_8BIT; 780 break; 781 case 16: 782 if (is_secondary(i2s)) 783 val |= MOD_BLCS_16BIT; 784 else 785 val |= MOD_BLCP_16BIT; 786 if (is_manager(i2s)) 787 val |= MOD_BLC_16BIT; 788 break; 789 case 24: 790 if (is_secondary(i2s)) 791 val |= MOD_BLCS_24BIT; 792 else 793 val |= MOD_BLCP_24BIT; 794 if (is_manager(i2s)) 795 val |= MOD_BLC_24BIT; 796 break; 797 default: 798 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 799 params_format(params)); 800 return -EINVAL; 801 } 802 803 spin_lock_irqsave(&priv->lock, flags); 804 mod = readl(priv->addr + I2SMOD); 805 mod = (mod & ~mask) | val; 806 writel(mod, priv->addr + I2SMOD); 807 spin_unlock_irqrestore(&priv->lock, flags); 808 809 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 810 811 i2s->frmclk = params_rate(params); 812 813 rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; 814 if (rclksrc && !IS_ERR(rclksrc)) 815 priv->rclk_srcrate = clk_get_rate(rclksrc); 816 817 return 0; 818 } 819 820 /* We set constraints on the substream according to the version of I2S */ 821 static int i2s_startup(struct snd_pcm_substream *substream, 822 struct snd_soc_dai *dai) 823 { 824 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 825 struct i2s_dai *i2s = to_info(dai); 826 struct i2s_dai *other = get_other_dai(i2s); 827 unsigned long flags; 828 829 pm_runtime_get_sync(dai->dev); 830 831 spin_lock_irqsave(&priv->pcm_lock, flags); 832 833 i2s->mode |= DAI_OPENED; 834 835 if (is_manager(other)) 836 i2s->mode &= ~DAI_MANAGER; 837 else 838 i2s->mode |= DAI_MANAGER; 839 840 if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR)) 841 writel(CON_RSTCLR, i2s->priv->addr + I2SCON); 842 843 spin_unlock_irqrestore(&priv->pcm_lock, flags); 844 845 return 0; 846 } 847 848 static void i2s_shutdown(struct snd_pcm_substream *substream, 849 struct snd_soc_dai *dai) 850 { 851 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 852 struct i2s_dai *i2s = to_info(dai); 853 struct i2s_dai *other = get_other_dai(i2s); 854 unsigned long flags; 855 856 spin_lock_irqsave(&priv->pcm_lock, flags); 857 858 i2s->mode &= ~DAI_OPENED; 859 i2s->mode &= ~DAI_MANAGER; 860 861 if (is_opened(other)) 862 other->mode |= DAI_MANAGER; 863 864 /* Reset any constraint on RFS and BFS */ 865 i2s->rfs = 0; 866 i2s->bfs = 0; 867 868 spin_unlock_irqrestore(&priv->pcm_lock, flags); 869 870 pm_runtime_put(dai->dev); 871 } 872 873 static int config_setup(struct i2s_dai *i2s) 874 { 875 struct samsung_i2s_priv *priv = i2s->priv; 876 struct i2s_dai *other = get_other_dai(i2s); 877 unsigned rfs, bfs, blc; 878 u32 psr; 879 880 blc = get_blc(i2s); 881 882 bfs = i2s->bfs; 883 884 if (!bfs && other) 885 bfs = other->bfs; 886 887 /* Select least possible multiple(2) if no constraint set */ 888 if (!bfs) 889 bfs = blc * 2; 890 891 rfs = i2s->rfs; 892 893 if (!rfs && other) 894 rfs = other->rfs; 895 896 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 897 dev_err(&i2s->pdev->dev, 898 "%d-RFS not supported for 24-blc\n", rfs); 899 return -EINVAL; 900 } 901 902 if (!rfs) { 903 if (bfs == 16 || bfs == 32) 904 rfs = 256; 905 else 906 rfs = 384; 907 } 908 909 /* If already setup and running */ 910 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 911 dev_err(&i2s->pdev->dev, 912 "%s:%d Other DAI busy\n", __func__, __LINE__); 913 return -EAGAIN; 914 } 915 916 set_bfs(i2s, bfs); 917 set_rfs(i2s, rfs); 918 919 /* Don't bother with PSR in Slave mode */ 920 if (is_slave(i2s)) 921 return 0; 922 923 if (!(priv->quirks & QUIRK_NO_MUXPSR)) { 924 psr = priv->rclk_srcrate / i2s->frmclk / rfs; 925 writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR); 926 dev_dbg(&i2s->pdev->dev, 927 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 928 priv->rclk_srcrate, psr, rfs, bfs); 929 } 930 931 return 0; 932 } 933 934 static int i2s_trigger(struct snd_pcm_substream *substream, 935 int cmd, struct snd_soc_dai *dai) 936 { 937 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 938 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 939 struct snd_soc_pcm_runtime *rtd = substream->private_data; 940 struct i2s_dai *i2s = to_info(rtd->cpu_dai); 941 unsigned long flags; 942 943 switch (cmd) { 944 case SNDRV_PCM_TRIGGER_START: 945 case SNDRV_PCM_TRIGGER_RESUME: 946 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 947 pm_runtime_get_sync(dai->dev); 948 spin_lock_irqsave(&priv->lock, flags); 949 950 if (config_setup(i2s)) { 951 spin_unlock_irqrestore(&priv->lock, flags); 952 return -EINVAL; 953 } 954 955 if (capture) 956 i2s_rxctrl(i2s, 1); 957 else 958 i2s_txctrl(i2s, 1); 959 960 spin_unlock_irqrestore(&priv->lock, flags); 961 break; 962 case SNDRV_PCM_TRIGGER_STOP: 963 case SNDRV_PCM_TRIGGER_SUSPEND: 964 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 965 spin_lock_irqsave(&priv->lock, flags); 966 967 if (capture) { 968 i2s_rxctrl(i2s, 0); 969 i2s_fifo(i2s, FIC_RXFLUSH); 970 } else { 971 i2s_txctrl(i2s, 0); 972 i2s_fifo(i2s, FIC_TXFLUSH); 973 } 974 975 spin_unlock_irqrestore(&priv->lock, flags); 976 pm_runtime_put(dai->dev); 977 break; 978 } 979 980 return 0; 981 } 982 983 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 984 int div_id, int div) 985 { 986 struct i2s_dai *i2s = to_info(dai); 987 struct i2s_dai *other = get_other_dai(i2s); 988 989 switch (div_id) { 990 case SAMSUNG_I2S_DIV_BCLK: 991 pm_runtime_get_sync(dai->dev); 992 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 993 || (other && other->bfs && (other->bfs != div))) { 994 pm_runtime_put(dai->dev); 995 dev_err(&i2s->pdev->dev, 996 "%s:%d Other DAI busy\n", __func__, __LINE__); 997 return -EAGAIN; 998 } 999 i2s->bfs = div; 1000 pm_runtime_put(dai->dev); 1001 break; 1002 default: 1003 dev_err(&i2s->pdev->dev, 1004 "Invalid clock divider(%d)\n", div_id); 1005 return -EINVAL; 1006 } 1007 1008 return 0; 1009 } 1010 1011 static snd_pcm_sframes_t 1012 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 1013 { 1014 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1015 struct i2s_dai *i2s = to_info(dai); 1016 u32 reg = readl(priv->addr + I2SFIC); 1017 snd_pcm_sframes_t delay; 1018 1019 WARN_ON(!pm_runtime_active(dai->dev)); 1020 1021 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 1022 delay = FIC_RXCOUNT(reg); 1023 else if (is_secondary(i2s)) 1024 delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS)); 1025 else 1026 delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f; 1027 1028 return delay; 1029 } 1030 1031 #ifdef CONFIG_PM 1032 static int i2s_suspend(struct snd_soc_dai *dai) 1033 { 1034 return pm_runtime_force_suspend(dai->dev); 1035 } 1036 1037 static int i2s_resume(struct snd_soc_dai *dai) 1038 { 1039 return pm_runtime_force_resume(dai->dev); 1040 } 1041 #else 1042 #define i2s_suspend NULL 1043 #define i2s_resume NULL 1044 #endif 1045 1046 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 1047 { 1048 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1049 struct i2s_dai *i2s = to_info(dai); 1050 struct i2s_dai *other = get_other_dai(i2s); 1051 unsigned long flags; 1052 1053 pm_runtime_get_sync(dai->dev); 1054 1055 if (is_secondary(i2s)) { 1056 /* If this is probe on the secondary DAI */ 1057 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL); 1058 } else { 1059 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, 1060 &i2s->dma_capture); 1061 1062 if (priv->quirks & QUIRK_NEED_RSTCLR) 1063 writel(CON_RSTCLR, priv->addr + I2SCON); 1064 1065 if (priv->quirks & QUIRK_SUPPORTS_IDMA) 1066 idma_reg_addr_init(priv->addr, 1067 other->idma_playback.addr); 1068 } 1069 1070 /* Reset any constraint on RFS and BFS */ 1071 i2s->rfs = 0; 1072 i2s->bfs = 0; 1073 1074 spin_lock_irqsave(&priv->lock, flags); 1075 i2s_txctrl(i2s, 0); 1076 i2s_rxctrl(i2s, 0); 1077 i2s_fifo(i2s, FIC_TXFLUSH); 1078 i2s_fifo(other, FIC_TXFLUSH); 1079 i2s_fifo(i2s, FIC_RXFLUSH); 1080 spin_unlock_irqrestore(&priv->lock, flags); 1081 1082 /* Gate CDCLK by default */ 1083 if (!is_opened(other)) 1084 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 1085 0, SND_SOC_CLOCK_IN); 1086 pm_runtime_put(dai->dev); 1087 1088 return 0; 1089 } 1090 1091 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 1092 { 1093 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1094 struct i2s_dai *i2s = to_info(dai); 1095 unsigned long flags; 1096 1097 pm_runtime_get_sync(dai->dev); 1098 1099 if (!is_secondary(i2s)) { 1100 if (priv->quirks & QUIRK_NEED_RSTCLR) { 1101 spin_lock_irqsave(&priv->lock, flags); 1102 writel(0, priv->addr + I2SCON); 1103 spin_unlock_irqrestore(&priv->lock, flags); 1104 } 1105 } 1106 1107 pm_runtime_put(dai->dev); 1108 1109 return 0; 1110 } 1111 1112 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 1113 .trigger = i2s_trigger, 1114 .hw_params = i2s_hw_params, 1115 .set_fmt = i2s_set_fmt, 1116 .set_clkdiv = i2s_set_clkdiv, 1117 .set_sysclk = i2s_set_sysclk, 1118 .startup = i2s_startup, 1119 .shutdown = i2s_shutdown, 1120 .delay = i2s_delay, 1121 }; 1122 1123 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = { 1124 /* Backend DAI */ 1125 SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0), 1126 SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0), 1127 1128 /* Playback Mixer */ 1129 SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), 1130 }; 1131 1132 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = { 1133 { "Playback Mixer", NULL, "Primary Playback" }, 1134 { "Playback Mixer", NULL, "Secondary Playback" }, 1135 1136 { "Mixer DAI TX", NULL, "Playback Mixer" }, 1137 { "Primary Capture", NULL, "Mixer DAI RX" }, 1138 }; 1139 1140 static const struct snd_soc_component_driver samsung_i2s_component = { 1141 .name = "samsung-i2s", 1142 1143 .dapm_widgets = samsung_i2s_widgets, 1144 .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets), 1145 1146 .dapm_routes = samsung_i2s_dapm_routes, 1147 .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes), 1148 }; 1149 1150 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ 1151 SNDRV_PCM_FMTBIT_S24_LE) 1152 1153 static int i2s_alloc_dais(struct samsung_i2s_priv *priv, 1154 const struct samsung_i2s_dai_data *i2s_dai_data, 1155 int num_dais) 1156 { 1157 static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" }; 1158 static const char *stream_names[] = { "Primary Playback", 1159 "Secondary Playback" }; 1160 struct snd_soc_dai_driver *dai_drv; 1161 struct i2s_dai *dai; 1162 int i; 1163 1164 priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais, 1165 sizeof(*dai), GFP_KERNEL); 1166 if (!priv->dai) 1167 return -ENOMEM; 1168 1169 priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais, 1170 sizeof(*dai_drv), GFP_KERNEL); 1171 if (!priv->dai_drv) 1172 return -ENOMEM; 1173 1174 for (i = 0; i < num_dais; i++) { 1175 dai_drv = &priv->dai_drv[i]; 1176 1177 dai_drv->probe = samsung_i2s_dai_probe; 1178 dai_drv->remove = samsung_i2s_dai_remove; 1179 dai_drv->suspend = i2s_suspend; 1180 dai_drv->resume = i2s_resume; 1181 1182 dai_drv->symmetric_rates = 1; 1183 dai_drv->ops = &samsung_i2s_dai_ops; 1184 1185 dai_drv->playback.channels_min = 1; 1186 dai_drv->playback.channels_max = 2; 1187 dai_drv->playback.rates = i2s_dai_data->pcm_rates; 1188 dai_drv->playback.formats = SAMSUNG_I2S_FMTS; 1189 dai_drv->playback.stream_name = stream_names[i]; 1190 1191 dai_drv->id = i + 1; 1192 dai_drv->name = dai_names[i]; 1193 1194 priv->dai[i].drv = &priv->dai_drv[i]; 1195 priv->dai[i].pdev = priv->pdev; 1196 } 1197 1198 /* Initialize capture only for the primary DAI */ 1199 dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1]; 1200 1201 dai_drv->capture.channels_min = 1; 1202 dai_drv->capture.channels_max = 2; 1203 dai_drv->capture.rates = i2s_dai_data->pcm_rates; 1204 dai_drv->capture.formats = SAMSUNG_I2S_FMTS; 1205 dai_drv->capture.stream_name = "Primary Capture"; 1206 1207 return 0; 1208 } 1209 1210 #ifdef CONFIG_PM 1211 static int i2s_runtime_suspend(struct device *dev) 1212 { 1213 struct samsung_i2s_priv *priv = dev_get_drvdata(dev); 1214 1215 priv->suspend_i2smod = readl(priv->addr + I2SMOD); 1216 priv->suspend_i2scon = readl(priv->addr + I2SCON); 1217 priv->suspend_i2spsr = readl(priv->addr + I2SPSR); 1218 1219 if (priv->op_clk) 1220 clk_disable_unprepare(priv->op_clk); 1221 clk_disable_unprepare(priv->clk); 1222 1223 return 0; 1224 } 1225 1226 static int i2s_runtime_resume(struct device *dev) 1227 { 1228 struct samsung_i2s_priv *priv = dev_get_drvdata(dev); 1229 int ret; 1230 1231 ret = clk_prepare_enable(priv->clk); 1232 if (ret) 1233 return ret; 1234 1235 if (priv->op_clk) { 1236 ret = clk_prepare_enable(priv->op_clk); 1237 if (ret) { 1238 clk_disable_unprepare(priv->clk); 1239 return ret; 1240 } 1241 } 1242 1243 writel(priv->suspend_i2scon, priv->addr + I2SCON); 1244 writel(priv->suspend_i2smod, priv->addr + I2SMOD); 1245 writel(priv->suspend_i2spsr, priv->addr + I2SPSR); 1246 1247 return 0; 1248 } 1249 #endif /* CONFIG_PM */ 1250 1251 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv) 1252 { 1253 int i; 1254 1255 for (i = 0; i < priv->clk_data.clk_num; i++) { 1256 if (!IS_ERR(priv->clk_table[i])) 1257 clk_unregister(priv->clk_table[i]); 1258 } 1259 } 1260 1261 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv) 1262 { 1263 of_clk_del_provider(priv->pdev->dev.of_node); 1264 i2s_unregister_clocks(priv); 1265 } 1266 1267 1268 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv) 1269 { 1270 1271 const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" }; 1272 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" }; 1273 const char *p_names[2] = { NULL }; 1274 struct device *dev = &priv->pdev->dev; 1275 const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs; 1276 const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)]; 1277 struct clk *rclksrc; 1278 int ret, i; 1279 1280 /* Register the clock provider only if it's expected in the DTB */ 1281 if (!of_find_property(dev->of_node, "#clock-cells", NULL)) 1282 return 0; 1283 1284 /* Get the RCLKSRC mux clock parent clock names */ 1285 for (i = 0; i < ARRAY_SIZE(p_names); i++) { 1286 rclksrc = clk_get(dev, clk_name[i]); 1287 if (IS_ERR(rclksrc)) 1288 continue; 1289 p_names[i] = __clk_get_name(rclksrc); 1290 clk_put(rclksrc); 1291 } 1292 1293 for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) { 1294 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s", 1295 dev_name(dev), i2s_clk_desc[i]); 1296 if (!i2s_clk_name[i]) 1297 return -ENOMEM; 1298 } 1299 1300 if (!(priv->quirks & QUIRK_NO_MUXPSR)) { 1301 /* Activate the prescaler */ 1302 u32 val = readl(priv->addr + I2SPSR); 1303 writel(val | PSR_PSREN, priv->addr + I2SPSR); 1304 1305 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, 1306 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names, 1307 ARRAY_SIZE(p_names), 1308 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, 1309 priv->addr + I2SMOD, reg_info->rclksrc_off, 1310 1, 0, &priv->lock); 1311 1312 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, 1313 i2s_clk_name[CLK_I2S_RCLK_PSR], 1314 i2s_clk_name[CLK_I2S_RCLK_SRC], 1315 CLK_SET_RATE_PARENT, 1316 priv->addr + I2SPSR, 8, 6, 0, &priv->lock); 1317 1318 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR]; 1319 priv->clk_data.clk_num = 2; 1320 } 1321 1322 priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, 1323 i2s_clk_name[CLK_I2S_CDCLK], p_names[0], 1324 CLK_SET_RATE_PARENT, 1325 priv->addr + I2SMOD, reg_info->cdclkcon_off, 1326 CLK_GATE_SET_TO_DISABLE, &priv->lock); 1327 1328 priv->clk_data.clk_num += 1; 1329 priv->clk_data.clks = priv->clk_table; 1330 1331 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, 1332 &priv->clk_data); 1333 if (ret < 0) { 1334 dev_err(dev, "failed to add clock provider: %d\n", ret); 1335 i2s_unregister_clocks(priv); 1336 } 1337 1338 return ret; 1339 } 1340 1341 /* Create platform device for the secondary PCM */ 1342 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv) 1343 { 1344 struct platform_device *pdev_sec; 1345 const char *devname; 1346 int ret; 1347 1348 devname = devm_kasprintf(&priv->pdev->dev, GFP_KERNEL, "%s-sec", 1349 dev_name(&priv->pdev->dev)); 1350 if (!devname) 1351 return -ENOMEM; 1352 1353 pdev_sec = platform_device_alloc(devname, -1); 1354 if (!pdev_sec) 1355 return -ENOMEM; 1356 1357 pdev_sec->driver_override = kstrdup("samsung-i2s", GFP_KERNEL); 1358 1359 ret = platform_device_add(pdev_sec); 1360 if (ret < 0) { 1361 platform_device_put(pdev_sec); 1362 return ret; 1363 } 1364 1365 ret = device_attach(&pdev_sec->dev); 1366 if (ret <= 0) { 1367 platform_device_unregister(priv->pdev_sec); 1368 dev_info(&pdev_sec->dev, "device_attach() failed\n"); 1369 return ret; 1370 } 1371 1372 priv->pdev_sec = pdev_sec; 1373 1374 return 0; 1375 } 1376 1377 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv) 1378 { 1379 platform_device_unregister(priv->pdev_sec); 1380 priv->pdev_sec = NULL; 1381 } 1382 1383 static int samsung_i2s_probe(struct platform_device *pdev) 1384 { 1385 struct i2s_dai *pri_dai, *sec_dai = NULL; 1386 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1387 u32 regs_base, idma_addr = 0; 1388 struct device_node *np = pdev->dev.of_node; 1389 const struct samsung_i2s_dai_data *i2s_dai_data; 1390 const struct platform_device_id *id; 1391 struct samsung_i2s_priv *priv; 1392 struct resource *res; 1393 int num_dais, ret; 1394 1395 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { 1396 i2s_dai_data = of_device_get_match_data(&pdev->dev); 1397 } else { 1398 id = platform_get_device_id(pdev); 1399 1400 /* Nothing to do if it is the secondary device probe */ 1401 if (!id) 1402 return 0; 1403 1404 i2s_dai_data = (struct samsung_i2s_dai_data *)id->driver_data; 1405 } 1406 1407 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 1408 if (!priv) 1409 return -ENOMEM; 1410 1411 if (np) { 1412 priv->quirks = i2s_dai_data->quirks; 1413 } else { 1414 if (!i2s_pdata) { 1415 dev_err(&pdev->dev, "Missing platform data\n"); 1416 return -EINVAL; 1417 } 1418 priv->quirks = i2s_pdata->type.quirks; 1419 } 1420 1421 num_dais = (priv->quirks & QUIRK_SEC_DAI) ? 2 : 1; 1422 priv->pdev = pdev; 1423 priv->variant_regs = i2s_dai_data->i2s_variant_regs; 1424 1425 ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais); 1426 if (ret < 0) 1427 return ret; 1428 1429 pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1]; 1430 1431 spin_lock_init(&priv->lock); 1432 spin_lock_init(&priv->pcm_lock); 1433 1434 if (!np) { 1435 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback; 1436 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture; 1437 pri_dai->filter = i2s_pdata->dma_filter; 1438 1439 idma_addr = i2s_pdata->type.idma_addr; 1440 } else { 1441 if (of_property_read_u32(np, "samsung,idma-addr", 1442 &idma_addr)) { 1443 if (priv->quirks & QUIRK_SUPPORTS_IDMA) { 1444 dev_info(&pdev->dev, "idma address is not"\ 1445 "specified"); 1446 } 1447 } 1448 } 1449 1450 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1451 priv->addr = devm_ioremap_resource(&pdev->dev, res); 1452 if (IS_ERR(priv->addr)) 1453 return PTR_ERR(priv->addr); 1454 1455 regs_base = res->start; 1456 1457 priv->clk = devm_clk_get(&pdev->dev, "iis"); 1458 if (IS_ERR(priv->clk)) { 1459 dev_err(&pdev->dev, "Failed to get iis clock\n"); 1460 return PTR_ERR(priv->clk); 1461 } 1462 1463 ret = clk_prepare_enable(priv->clk); 1464 if (ret != 0) { 1465 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret); 1466 return ret; 1467 } 1468 pri_dai->dma_playback.addr = regs_base + I2STXD; 1469 pri_dai->dma_capture.addr = regs_base + I2SRXD; 1470 pri_dai->dma_playback.chan_name = "tx"; 1471 pri_dai->dma_capture.chan_name = "rx"; 1472 pri_dai->dma_playback.addr_width = 4; 1473 pri_dai->dma_capture.addr_width = 4; 1474 pri_dai->priv = priv; 1475 1476 if (priv->quirks & QUIRK_PRI_6CHAN) 1477 pri_dai->drv->playback.channels_max = 6; 1478 1479 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter, 1480 "tx", "rx", NULL); 1481 if (ret < 0) 1482 goto err_disable_clk; 1483 1484 if (priv->quirks & QUIRK_SEC_DAI) { 1485 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1]; 1486 1487 sec_dai->dma_playback.addr = regs_base + I2STXDS; 1488 sec_dai->dma_playback.chan_name = "tx-sec"; 1489 1490 if (!np) { 1491 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec; 1492 sec_dai->filter = i2s_pdata->dma_filter; 1493 } 1494 1495 sec_dai->dma_playback.addr_width = 4; 1496 sec_dai->idma_playback.addr = idma_addr; 1497 sec_dai->pri_dai = pri_dai; 1498 sec_dai->priv = priv; 1499 pri_dai->sec_dai = sec_dai; 1500 1501 ret = i2s_create_secondary_device(priv); 1502 if (ret < 0) 1503 goto err_disable_clk; 1504 1505 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev, 1506 sec_dai->filter, "tx-sec", NULL, 1507 &pdev->dev); 1508 if (ret < 0) 1509 goto err_del_sec; 1510 1511 } 1512 1513 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1514 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1515 ret = -EINVAL; 1516 goto err_del_sec; 1517 } 1518 1519 dev_set_drvdata(&pdev->dev, priv); 1520 1521 ret = devm_snd_soc_register_component(&pdev->dev, 1522 &samsung_i2s_component, 1523 priv->dai_drv, num_dais); 1524 if (ret < 0) 1525 goto err_del_sec; 1526 1527 pm_runtime_set_active(&pdev->dev); 1528 pm_runtime_enable(&pdev->dev); 1529 1530 ret = i2s_register_clock_provider(priv); 1531 if (ret < 0) 1532 goto err_disable_pm; 1533 1534 priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]); 1535 1536 return 0; 1537 1538 err_disable_pm: 1539 pm_runtime_disable(&pdev->dev); 1540 err_del_sec: 1541 i2s_delete_secondary_device(priv); 1542 err_disable_clk: 1543 clk_disable_unprepare(priv->clk); 1544 return ret; 1545 } 1546 1547 static int samsung_i2s_remove(struct platform_device *pdev) 1548 { 1549 struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev); 1550 1551 /* The secondary device has no driver data assigned */ 1552 if (!priv) 1553 return 0; 1554 1555 pm_runtime_get_sync(&pdev->dev); 1556 pm_runtime_disable(&pdev->dev); 1557 1558 i2s_unregister_clock_provider(priv); 1559 i2s_delete_secondary_device(priv); 1560 clk_disable_unprepare(priv->clk); 1561 1562 pm_runtime_put_noidle(&pdev->dev); 1563 1564 return 0; 1565 } 1566 1567 static const struct samsung_i2s_variant_regs i2sv3_regs = { 1568 .bfs_off = 1, 1569 .rfs_off = 3, 1570 .sdf_off = 5, 1571 .txr_off = 8, 1572 .rclksrc_off = 10, 1573 .mss_off = 11, 1574 .cdclkcon_off = 12, 1575 .lrp_off = 7, 1576 .bfs_mask = 0x3, 1577 .rfs_mask = 0x3, 1578 .ftx0cnt_off = 8, 1579 }; 1580 1581 static const struct samsung_i2s_variant_regs i2sv6_regs = { 1582 .bfs_off = 0, 1583 .rfs_off = 4, 1584 .sdf_off = 6, 1585 .txr_off = 8, 1586 .rclksrc_off = 10, 1587 .mss_off = 11, 1588 .cdclkcon_off = 12, 1589 .lrp_off = 15, 1590 .bfs_mask = 0xf, 1591 .rfs_mask = 0x3, 1592 .ftx0cnt_off = 8, 1593 }; 1594 1595 static const struct samsung_i2s_variant_regs i2sv7_regs = { 1596 .bfs_off = 0, 1597 .rfs_off = 4, 1598 .sdf_off = 7, 1599 .txr_off = 9, 1600 .rclksrc_off = 11, 1601 .mss_off = 12, 1602 .cdclkcon_off = 22, 1603 .lrp_off = 15, 1604 .bfs_mask = 0xf, 1605 .rfs_mask = 0x7, 1606 .ftx0cnt_off = 0, 1607 }; 1608 1609 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = { 1610 .bfs_off = 0, 1611 .rfs_off = 3, 1612 .sdf_off = 6, 1613 .txr_off = 8, 1614 .rclksrc_off = 10, 1615 .mss_off = 11, 1616 .cdclkcon_off = 12, 1617 .lrp_off = 15, 1618 .bfs_mask = 0x7, 1619 .rfs_mask = 0x7, 1620 .ftx0cnt_off = 8, 1621 }; 1622 1623 static const struct samsung_i2s_dai_data i2sv3_dai_type = { 1624 .quirks = QUIRK_NO_MUXPSR, 1625 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1626 .i2s_variant_regs = &i2sv3_regs, 1627 }; 1628 1629 static const struct samsung_i2s_dai_data i2sv5_dai_type = { 1630 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1631 QUIRK_SUPPORTS_IDMA, 1632 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1633 .i2s_variant_regs = &i2sv3_regs, 1634 }; 1635 1636 static const struct samsung_i2s_dai_data i2sv6_dai_type = { 1637 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1638 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA, 1639 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1640 .i2s_variant_regs = &i2sv6_regs, 1641 }; 1642 1643 static const struct samsung_i2s_dai_data i2sv7_dai_type = { 1644 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1645 QUIRK_SUPPORTS_TDM, 1646 .pcm_rates = SNDRV_PCM_RATE_8000_192000, 1647 .i2s_variant_regs = &i2sv7_regs, 1648 }; 1649 1650 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = { 1651 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR, 1652 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1653 .i2s_variant_regs = &i2sv5_i2s1_regs, 1654 }; 1655 1656 static const struct platform_device_id samsung_i2s_driver_ids[] = { 1657 { 1658 .name = "samsung-i2s", 1659 .driver_data = (kernel_ulong_t)&i2sv3_dai_type, 1660 }, 1661 {}, 1662 }; 1663 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1664 1665 #ifdef CONFIG_OF 1666 static const struct of_device_id exynos_i2s_match[] = { 1667 { 1668 .compatible = "samsung,s3c6410-i2s", 1669 .data = &i2sv3_dai_type, 1670 }, { 1671 .compatible = "samsung,s5pv210-i2s", 1672 .data = &i2sv5_dai_type, 1673 }, { 1674 .compatible = "samsung,exynos5420-i2s", 1675 .data = &i2sv6_dai_type, 1676 }, { 1677 .compatible = "samsung,exynos7-i2s", 1678 .data = &i2sv7_dai_type, 1679 }, { 1680 .compatible = "samsung,exynos7-i2s1", 1681 .data = &i2sv5_dai_type_i2s1, 1682 }, 1683 {}, 1684 }; 1685 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1686 #endif 1687 1688 static const struct dev_pm_ops samsung_i2s_pm = { 1689 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1690 i2s_runtime_resume, NULL) 1691 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1692 pm_runtime_force_resume) 1693 }; 1694 1695 static struct platform_driver samsung_i2s_driver = { 1696 .probe = samsung_i2s_probe, 1697 .remove = samsung_i2s_remove, 1698 .id_table = samsung_i2s_driver_ids, 1699 .driver = { 1700 .name = "samsung-i2s", 1701 .of_match_table = of_match_ptr(exynos_i2s_match), 1702 .pm = &samsung_i2s_pm, 1703 }, 1704 }; 1705 1706 module_platform_driver(samsung_i2s_driver); 1707 1708 /* Module information */ 1709 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1710 MODULE_DESCRIPTION("Samsung I2S Interface"); 1711 MODULE_ALIAS("platform:samsung-i2s"); 1712 MODULE_LICENSE("GPL"); 1713