1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // ALSA SoC Audio Layer - Samsung I2S Controller driver 4 // 5 // Copyright (c) 2010 Samsung Electronics Co. Ltd. 6 // Jaswinder Singh <jassisinghbrar@gmail.com> 7 8 #include <dt-bindings/sound/samsung-i2s.h> 9 #include <linux/delay.h> 10 #include <linux/slab.h> 11 #include <linux/clk.h> 12 #include <linux/clk-provider.h> 13 #include <linux/io.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_device.h> 17 #include <linux/of_gpio.h> 18 #include <linux/pm_runtime.h> 19 20 #include <sound/soc.h> 21 #include <sound/pcm_params.h> 22 23 #include <linux/platform_data/asoc-s3c.h> 24 25 #include "dma.h" 26 #include "idma.h" 27 #include "i2s.h" 28 #include "i2s-regs.h" 29 30 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) 31 32 #define SAMSUNG_I2S_ID_PRIMARY 1 33 #define SAMSUNG_I2S_ID_SECONDARY 2 34 35 struct samsung_i2s_variant_regs { 36 unsigned int bfs_off; 37 unsigned int rfs_off; 38 unsigned int sdf_off; 39 unsigned int txr_off; 40 unsigned int rclksrc_off; 41 unsigned int mss_off; 42 unsigned int cdclkcon_off; 43 unsigned int lrp_off; 44 unsigned int bfs_mask; 45 unsigned int rfs_mask; 46 unsigned int ftx0cnt_off; 47 }; 48 49 struct samsung_i2s_dai_data { 50 u32 quirks; 51 unsigned int pcm_rates; 52 const struct samsung_i2s_variant_regs *i2s_variant_regs; 53 void (*fixup_early)(struct snd_pcm_substream *substream, 54 struct snd_soc_dai *dai); 55 void (*fixup_late)(struct snd_pcm_substream *substream, 56 struct snd_soc_dai *dai); 57 }; 58 59 struct i2s_dai { 60 /* Platform device for this DAI */ 61 struct platform_device *pdev; 62 63 /* Frame clock */ 64 unsigned frmclk; 65 /* 66 * Specifically requested RCLK, BCLK by machine driver. 67 * 0 indicates CPU driver is free to choose any value. 68 */ 69 unsigned rfs, bfs; 70 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */ 71 struct i2s_dai *pri_dai; 72 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */ 73 struct i2s_dai *sec_dai; 74 75 #define DAI_OPENED (1 << 0) /* DAI is opened */ 76 #define DAI_MANAGER (1 << 1) /* DAI is the manager */ 77 unsigned mode; 78 79 /* Driver for this DAI */ 80 struct snd_soc_dai_driver *drv; 81 82 /* DMA parameters */ 83 struct snd_dmaengine_dai_dma_data dma_playback; 84 struct snd_dmaengine_dai_dma_data dma_capture; 85 struct snd_dmaengine_dai_dma_data idma_playback; 86 dma_filter_fn filter; 87 88 struct samsung_i2s_priv *priv; 89 }; 90 91 struct samsung_i2s_priv { 92 struct platform_device *pdev; 93 struct platform_device *pdev_sec; 94 95 /* Lock for cross interface checks */ 96 spinlock_t pcm_lock; 97 98 /* CPU DAIs and their corresponding drivers */ 99 struct i2s_dai *dai; 100 struct snd_soc_dai_driver *dai_drv; 101 int num_dais; 102 103 /* The I2S controller's core clock */ 104 struct clk *clk; 105 106 /* Clock for generating I2S signals */ 107 struct clk *op_clk; 108 109 /* Rate of RCLK source clock */ 110 unsigned long rclk_srcrate; 111 112 /* Cache of selected I2S registers for system suspend */ 113 u32 suspend_i2smod; 114 u32 suspend_i2scon; 115 u32 suspend_i2spsr; 116 117 const struct samsung_i2s_variant_regs *variant_regs; 118 void (*fixup_early)(struct snd_pcm_substream *substream, 119 struct snd_soc_dai *dai); 120 void (*fixup_late)(struct snd_pcm_substream *substream, 121 struct snd_soc_dai *dai); 122 u32 quirks; 123 124 /* The clock provider's data */ 125 struct clk *clk_table[3]; 126 struct clk_onecell_data clk_data; 127 128 /* Spinlock protecting member fields below */ 129 spinlock_t lock; 130 131 /* Memory mapped SFR region */ 132 void __iomem *addr; 133 134 /* A flag indicating the I2S slave mode operation */ 135 bool slave_mode; 136 }; 137 138 /* Returns true if this is the 'overlay' stereo DAI */ 139 static inline bool is_secondary(struct i2s_dai *i2s) 140 { 141 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; 142 } 143 144 /* If this interface of the controller is transmitting data */ 145 static inline bool tx_active(struct i2s_dai *i2s) 146 { 147 u32 active; 148 149 if (!i2s) 150 return false; 151 152 active = readl(i2s->priv->addr + I2SCON); 153 154 if (is_secondary(i2s)) 155 active &= CON_TXSDMA_ACTIVE; 156 else 157 active &= CON_TXDMA_ACTIVE; 158 159 return active ? true : false; 160 } 161 162 /* Return pointer to the other DAI */ 163 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s) 164 { 165 return i2s->pri_dai ? : i2s->sec_dai; 166 } 167 168 /* If the other interface of the controller is transmitting data */ 169 static inline bool other_tx_active(struct i2s_dai *i2s) 170 { 171 struct i2s_dai *other = get_other_dai(i2s); 172 173 return tx_active(other); 174 } 175 176 /* If any interface of the controller is transmitting data */ 177 static inline bool any_tx_active(struct i2s_dai *i2s) 178 { 179 return tx_active(i2s) || other_tx_active(i2s); 180 } 181 182 /* If this interface of the controller is receiving data */ 183 static inline bool rx_active(struct i2s_dai *i2s) 184 { 185 u32 active; 186 187 if (!i2s) 188 return false; 189 190 active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE; 191 192 return active ? true : false; 193 } 194 195 /* If the other interface of the controller is receiving data */ 196 static inline bool other_rx_active(struct i2s_dai *i2s) 197 { 198 struct i2s_dai *other = get_other_dai(i2s); 199 200 return rx_active(other); 201 } 202 203 /* If any interface of the controller is receiving data */ 204 static inline bool any_rx_active(struct i2s_dai *i2s) 205 { 206 return rx_active(i2s) || other_rx_active(i2s); 207 } 208 209 /* If the other DAI is transmitting or receiving data */ 210 static inline bool other_active(struct i2s_dai *i2s) 211 { 212 return other_rx_active(i2s) || other_tx_active(i2s); 213 } 214 215 /* If this DAI is transmitting or receiving data */ 216 static inline bool this_active(struct i2s_dai *i2s) 217 { 218 return tx_active(i2s) || rx_active(i2s); 219 } 220 221 /* If the controller is active anyway */ 222 static inline bool any_active(struct i2s_dai *i2s) 223 { 224 return this_active(i2s) || other_active(i2s); 225 } 226 227 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai) 228 { 229 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 230 231 return &priv->dai[dai->id - 1]; 232 } 233 234 static inline bool is_opened(struct i2s_dai *i2s) 235 { 236 if (i2s && (i2s->mode & DAI_OPENED)) 237 return true; 238 else 239 return false; 240 } 241 242 static inline bool is_manager(struct i2s_dai *i2s) 243 { 244 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER)) 245 return true; 246 else 247 return false; 248 } 249 250 /* Read RCLK of I2S (in multiples of LRCLK) */ 251 static inline unsigned get_rfs(struct i2s_dai *i2s) 252 { 253 struct samsung_i2s_priv *priv = i2s->priv; 254 u32 rfs; 255 256 rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off; 257 rfs &= priv->variant_regs->rfs_mask; 258 259 switch (rfs) { 260 case 7: return 192; 261 case 6: return 96; 262 case 5: return 128; 263 case 4: return 64; 264 case 3: return 768; 265 case 2: return 384; 266 case 1: return 512; 267 default: return 256; 268 } 269 } 270 271 /* Write RCLK of I2S (in multiples of LRCLK) */ 272 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs) 273 { 274 struct samsung_i2s_priv *priv = i2s->priv; 275 u32 mod = readl(priv->addr + I2SMOD); 276 int rfs_shift = priv->variant_regs->rfs_off; 277 278 mod &= ~(priv->variant_regs->rfs_mask << rfs_shift); 279 280 switch (rfs) { 281 case 192: 282 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift); 283 break; 284 case 96: 285 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift); 286 break; 287 case 128: 288 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift); 289 break; 290 case 64: 291 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift); 292 break; 293 case 768: 294 mod |= (MOD_RCLK_768FS << rfs_shift); 295 break; 296 case 512: 297 mod |= (MOD_RCLK_512FS << rfs_shift); 298 break; 299 case 384: 300 mod |= (MOD_RCLK_384FS << rfs_shift); 301 break; 302 default: 303 mod |= (MOD_RCLK_256FS << rfs_shift); 304 break; 305 } 306 307 writel(mod, priv->addr + I2SMOD); 308 } 309 310 /* Read bit-clock of I2S (in multiples of LRCLK) */ 311 static inline unsigned get_bfs(struct i2s_dai *i2s) 312 { 313 struct samsung_i2s_priv *priv = i2s->priv; 314 u32 bfs; 315 316 bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off; 317 bfs &= priv->variant_regs->bfs_mask; 318 319 switch (bfs) { 320 case 8: return 256; 321 case 7: return 192; 322 case 6: return 128; 323 case 5: return 96; 324 case 4: return 64; 325 case 3: return 24; 326 case 2: return 16; 327 case 1: return 48; 328 default: return 32; 329 } 330 } 331 332 /* Write bit-clock of I2S (in multiples of LRCLK) */ 333 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs) 334 { 335 struct samsung_i2s_priv *priv = i2s->priv; 336 u32 mod = readl(priv->addr + I2SMOD); 337 int tdm = priv->quirks & QUIRK_SUPPORTS_TDM; 338 int bfs_shift = priv->variant_regs->bfs_off; 339 340 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */ 341 if (!tdm && bfs > 48) { 342 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n"); 343 return; 344 } 345 346 mod &= ~(priv->variant_regs->bfs_mask << bfs_shift); 347 348 switch (bfs) { 349 case 48: 350 mod |= (MOD_BCLK_48FS << bfs_shift); 351 break; 352 case 32: 353 mod |= (MOD_BCLK_32FS << bfs_shift); 354 break; 355 case 24: 356 mod |= (MOD_BCLK_24FS << bfs_shift); 357 break; 358 case 16: 359 mod |= (MOD_BCLK_16FS << bfs_shift); 360 break; 361 case 64: 362 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift); 363 break; 364 case 96: 365 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift); 366 break; 367 case 128: 368 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift); 369 break; 370 case 192: 371 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift); 372 break; 373 case 256: 374 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift); 375 break; 376 default: 377 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n"); 378 return; 379 } 380 381 writel(mod, priv->addr + I2SMOD); 382 } 383 384 /* Sample size */ 385 static inline int get_blc(struct i2s_dai *i2s) 386 { 387 int blc = readl(i2s->priv->addr + I2SMOD); 388 389 blc = (blc >> 13) & 0x3; 390 391 switch (blc) { 392 case 2: return 24; 393 case 1: return 8; 394 default: return 16; 395 } 396 } 397 398 /* TX channel control */ 399 static void i2s_txctrl(struct i2s_dai *i2s, int on) 400 { 401 struct samsung_i2s_priv *priv = i2s->priv; 402 void __iomem *addr = priv->addr; 403 int txr_off = priv->variant_regs->txr_off; 404 u32 con = readl(addr + I2SCON); 405 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 406 407 if (on) { 408 con |= CON_ACTIVE; 409 con &= ~CON_TXCH_PAUSE; 410 411 if (is_secondary(i2s)) { 412 con |= CON_TXSDMA_ACTIVE; 413 con &= ~CON_TXSDMA_PAUSE; 414 } else { 415 con |= CON_TXDMA_ACTIVE; 416 con &= ~CON_TXDMA_PAUSE; 417 } 418 419 if (any_rx_active(i2s)) 420 mod |= 2 << txr_off; 421 else 422 mod |= 0 << txr_off; 423 } else { 424 if (is_secondary(i2s)) { 425 con |= CON_TXSDMA_PAUSE; 426 con &= ~CON_TXSDMA_ACTIVE; 427 } else { 428 con |= CON_TXDMA_PAUSE; 429 con &= ~CON_TXDMA_ACTIVE; 430 } 431 432 if (other_tx_active(i2s)) { 433 writel(con, addr + I2SCON); 434 return; 435 } 436 437 con |= CON_TXCH_PAUSE; 438 439 if (any_rx_active(i2s)) 440 mod |= 1 << txr_off; 441 else 442 con &= ~CON_ACTIVE; 443 } 444 445 writel(mod, addr + I2SMOD); 446 writel(con, addr + I2SCON); 447 } 448 449 /* RX Channel Control */ 450 static void i2s_rxctrl(struct i2s_dai *i2s, int on) 451 { 452 struct samsung_i2s_priv *priv = i2s->priv; 453 void __iomem *addr = priv->addr; 454 int txr_off = priv->variant_regs->txr_off; 455 u32 con = readl(addr + I2SCON); 456 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off); 457 458 if (on) { 459 con |= CON_RXDMA_ACTIVE | CON_ACTIVE; 460 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE); 461 462 if (any_tx_active(i2s)) 463 mod |= 2 << txr_off; 464 else 465 mod |= 1 << txr_off; 466 } else { 467 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE; 468 con &= ~CON_RXDMA_ACTIVE; 469 470 if (any_tx_active(i2s)) 471 mod |= 0 << txr_off; 472 else 473 con &= ~CON_ACTIVE; 474 } 475 476 writel(mod, addr + I2SMOD); 477 writel(con, addr + I2SCON); 478 } 479 480 /* Flush FIFO of an interface */ 481 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush) 482 { 483 void __iomem *fic; 484 u32 val; 485 486 if (!i2s) 487 return; 488 489 if (is_secondary(i2s)) 490 fic = i2s->priv->addr + I2SFICS; 491 else 492 fic = i2s->priv->addr + I2SFIC; 493 494 /* Flush the FIFO */ 495 writel(readl(fic) | flush, fic); 496 497 /* Be patient */ 498 val = msecs_to_loops(1) / 1000; /* 1 usec */ 499 while (--val) 500 cpu_relax(); 501 502 writel(readl(fic) & ~flush, fic); 503 } 504 505 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs, 506 int dir) 507 { 508 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 509 struct i2s_dai *i2s = to_info(dai); 510 struct i2s_dai *other = get_other_dai(i2s); 511 const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs; 512 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off; 513 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off; 514 u32 mod, mask, val = 0; 515 unsigned long flags; 516 int ret = 0; 517 518 pm_runtime_get_sync(dai->dev); 519 520 spin_lock_irqsave(&priv->lock, flags); 521 mod = readl(priv->addr + I2SMOD); 522 spin_unlock_irqrestore(&priv->lock, flags); 523 524 switch (clk_id) { 525 case SAMSUNG_I2S_OPCLK: 526 mask = MOD_OPCLK_MASK; 527 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK; 528 break; 529 case SAMSUNG_I2S_CDCLK: 530 mask = 1 << i2s_regs->cdclkcon_off; 531 /* Shouldn't matter in GATING(CLOCK_IN) mode */ 532 if (dir == SND_SOC_CLOCK_IN) 533 rfs = 0; 534 535 if ((rfs && other && other->rfs && (other->rfs != rfs)) || 536 (any_active(i2s) && 537 (((dir == SND_SOC_CLOCK_IN) 538 && !(mod & cdcon_mask)) || 539 ((dir == SND_SOC_CLOCK_OUT) 540 && (mod & cdcon_mask))))) { 541 dev_err(&i2s->pdev->dev, 542 "%s:%d Other DAI busy\n", __func__, __LINE__); 543 ret = -EAGAIN; 544 goto err; 545 } 546 547 if (dir == SND_SOC_CLOCK_IN) 548 val = 1 << i2s_regs->cdclkcon_off; 549 550 i2s->rfs = rfs; 551 break; 552 553 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */ 554 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */ 555 mask = 1 << i2s_regs->rclksrc_off; 556 557 if ((priv->quirks & QUIRK_NO_MUXPSR) 558 || (clk_id == SAMSUNG_I2S_RCLKSRC_0)) 559 clk_id = 0; 560 else 561 clk_id = 1; 562 563 if (!any_active(i2s)) { 564 if (priv->op_clk && !IS_ERR(priv->op_clk)) { 565 if ((clk_id && !(mod & rsrc_mask)) || 566 (!clk_id && (mod & rsrc_mask))) { 567 clk_disable_unprepare(priv->op_clk); 568 clk_put(priv->op_clk); 569 } else { 570 priv->rclk_srcrate = 571 clk_get_rate(priv->op_clk); 572 goto done; 573 } 574 } 575 576 if (clk_id) 577 priv->op_clk = clk_get(&i2s->pdev->dev, 578 "i2s_opclk1"); 579 else 580 priv->op_clk = clk_get(&i2s->pdev->dev, 581 "i2s_opclk0"); 582 583 if (WARN_ON(IS_ERR(priv->op_clk))) { 584 ret = PTR_ERR(priv->op_clk); 585 priv->op_clk = NULL; 586 goto err; 587 } 588 589 ret = clk_prepare_enable(priv->op_clk); 590 if (ret) { 591 clk_put(priv->op_clk); 592 priv->op_clk = NULL; 593 goto err; 594 } 595 priv->rclk_srcrate = clk_get_rate(priv->op_clk); 596 597 } else if ((!clk_id && (mod & rsrc_mask)) 598 || (clk_id && !(mod & rsrc_mask))) { 599 dev_err(&i2s->pdev->dev, 600 "%s:%d Other DAI busy\n", __func__, __LINE__); 601 ret = -EAGAIN; 602 goto err; 603 } else { 604 /* Call can't be on the active DAI */ 605 goto done; 606 } 607 608 if (clk_id == 1) 609 val = 1 << i2s_regs->rclksrc_off; 610 break; 611 default: 612 dev_err(&i2s->pdev->dev, "We don't serve that!\n"); 613 ret = -EINVAL; 614 goto err; 615 } 616 617 spin_lock_irqsave(&priv->lock, flags); 618 mod = readl(priv->addr + I2SMOD); 619 mod = (mod & ~mask) | val; 620 writel(mod, priv->addr + I2SMOD); 621 spin_unlock_irqrestore(&priv->lock, flags); 622 done: 623 pm_runtime_put(dai->dev); 624 625 return 0; 626 err: 627 pm_runtime_put(dai->dev); 628 return ret; 629 } 630 631 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 632 { 633 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 634 struct i2s_dai *i2s = to_info(dai); 635 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave; 636 u32 mod, tmp = 0; 637 unsigned long flags; 638 639 lrp_shift = priv->variant_regs->lrp_off; 640 sdf_shift = priv->variant_regs->sdf_off; 641 mod_slave = 1 << priv->variant_regs->mss_off; 642 643 sdf_mask = MOD_SDF_MASK << sdf_shift; 644 lrp_rlow = MOD_LR_RLOW << lrp_shift; 645 646 /* Format is priority */ 647 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 648 case SND_SOC_DAIFMT_RIGHT_J: 649 tmp |= lrp_rlow; 650 tmp |= (MOD_SDF_MSB << sdf_shift); 651 break; 652 case SND_SOC_DAIFMT_LEFT_J: 653 tmp |= lrp_rlow; 654 tmp |= (MOD_SDF_LSB << sdf_shift); 655 break; 656 case SND_SOC_DAIFMT_I2S: 657 tmp |= (MOD_SDF_IIS << sdf_shift); 658 break; 659 default: 660 dev_err(&i2s->pdev->dev, "Format not supported\n"); 661 return -EINVAL; 662 } 663 664 /* 665 * INV flag is relative to the FORMAT flag - if set it simply 666 * flips the polarity specified by the Standard 667 */ 668 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 669 case SND_SOC_DAIFMT_NB_NF: 670 break; 671 case SND_SOC_DAIFMT_NB_IF: 672 if (tmp & lrp_rlow) 673 tmp &= ~lrp_rlow; 674 else 675 tmp |= lrp_rlow; 676 break; 677 default: 678 dev_err(&i2s->pdev->dev, "Polarity not supported\n"); 679 return -EINVAL; 680 } 681 682 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 683 case SND_SOC_DAIFMT_BC_FC: 684 tmp |= mod_slave; 685 break; 686 case SND_SOC_DAIFMT_BP_FP: 687 /* 688 * Set default source clock in Master mode, only when the 689 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any 690 * clock configuration assigned in DT is not overwritten. 691 */ 692 if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL) 693 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 694 0, SND_SOC_CLOCK_IN); 695 break; 696 default: 697 dev_err(&i2s->pdev->dev, "master/slave format not supported\n"); 698 return -EINVAL; 699 } 700 701 pm_runtime_get_sync(dai->dev); 702 spin_lock_irqsave(&priv->lock, flags); 703 mod = readl(priv->addr + I2SMOD); 704 /* 705 * Don't change the I2S mode if any controller is active on this 706 * channel. 707 */ 708 if (any_active(i2s) && 709 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) { 710 spin_unlock_irqrestore(&priv->lock, flags); 711 pm_runtime_put(dai->dev); 712 dev_err(&i2s->pdev->dev, 713 "%s:%d Other DAI busy\n", __func__, __LINE__); 714 return -EAGAIN; 715 } 716 717 mod &= ~(sdf_mask | lrp_rlow | mod_slave); 718 mod |= tmp; 719 writel(mod, priv->addr + I2SMOD); 720 priv->slave_mode = (mod & mod_slave); 721 spin_unlock_irqrestore(&priv->lock, flags); 722 pm_runtime_put(dai->dev); 723 724 return 0; 725 } 726 727 static int i2s_hw_params(struct snd_pcm_substream *substream, 728 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) 729 { 730 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 731 struct i2s_dai *i2s = to_info(dai); 732 u32 mod, mask = 0, val = 0; 733 struct clk *rclksrc; 734 unsigned long flags; 735 736 WARN_ON(!pm_runtime_active(dai->dev)); 737 738 if (!is_secondary(i2s)) 739 mask |= (MOD_DC2_EN | MOD_DC1_EN); 740 741 switch (params_channels(params)) { 742 case 6: 743 val |= MOD_DC2_EN; 744 fallthrough; 745 case 4: 746 val |= MOD_DC1_EN; 747 break; 748 case 2: 749 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 750 i2s->dma_playback.addr_width = 4; 751 else 752 i2s->dma_capture.addr_width = 4; 753 break; 754 case 1: 755 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 756 i2s->dma_playback.addr_width = 2; 757 else 758 i2s->dma_capture.addr_width = 2; 759 760 break; 761 default: 762 dev_err(&i2s->pdev->dev, "%d channels not supported\n", 763 params_channels(params)); 764 return -EINVAL; 765 } 766 767 if (is_secondary(i2s)) 768 mask |= MOD_BLCS_MASK; 769 else 770 mask |= MOD_BLCP_MASK; 771 772 if (is_manager(i2s)) 773 mask |= MOD_BLC_MASK; 774 775 switch (params_width(params)) { 776 case 8: 777 if (is_secondary(i2s)) 778 val |= MOD_BLCS_8BIT; 779 else 780 val |= MOD_BLCP_8BIT; 781 if (is_manager(i2s)) 782 val |= MOD_BLC_8BIT; 783 break; 784 case 16: 785 if (is_secondary(i2s)) 786 val |= MOD_BLCS_16BIT; 787 else 788 val |= MOD_BLCP_16BIT; 789 if (is_manager(i2s)) 790 val |= MOD_BLC_16BIT; 791 break; 792 case 24: 793 if (is_secondary(i2s)) 794 val |= MOD_BLCS_24BIT; 795 else 796 val |= MOD_BLCP_24BIT; 797 if (is_manager(i2s)) 798 val |= MOD_BLC_24BIT; 799 break; 800 default: 801 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n", 802 params_format(params)); 803 return -EINVAL; 804 } 805 806 spin_lock_irqsave(&priv->lock, flags); 807 mod = readl(priv->addr + I2SMOD); 808 mod = (mod & ~mask) | val; 809 writel(mod, priv->addr + I2SMOD); 810 spin_unlock_irqrestore(&priv->lock, flags); 811 812 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); 813 814 i2s->frmclk = params_rate(params); 815 816 rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; 817 if (rclksrc && !IS_ERR(rclksrc)) 818 priv->rclk_srcrate = clk_get_rate(rclksrc); 819 820 return 0; 821 } 822 823 /* We set constraints on the substream according to the version of I2S */ 824 static int i2s_startup(struct snd_pcm_substream *substream, 825 struct snd_soc_dai *dai) 826 { 827 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 828 struct i2s_dai *i2s = to_info(dai); 829 struct i2s_dai *other = get_other_dai(i2s); 830 unsigned long flags; 831 832 pm_runtime_get_sync(dai->dev); 833 834 spin_lock_irqsave(&priv->pcm_lock, flags); 835 836 i2s->mode |= DAI_OPENED; 837 838 if (is_manager(other)) 839 i2s->mode &= ~DAI_MANAGER; 840 else 841 i2s->mode |= DAI_MANAGER; 842 843 if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR)) 844 writel(CON_RSTCLR, i2s->priv->addr + I2SCON); 845 846 spin_unlock_irqrestore(&priv->pcm_lock, flags); 847 848 return 0; 849 } 850 851 static void i2s_shutdown(struct snd_pcm_substream *substream, 852 struct snd_soc_dai *dai) 853 { 854 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 855 struct i2s_dai *i2s = to_info(dai); 856 struct i2s_dai *other = get_other_dai(i2s); 857 unsigned long flags; 858 859 spin_lock_irqsave(&priv->pcm_lock, flags); 860 861 i2s->mode &= ~DAI_OPENED; 862 i2s->mode &= ~DAI_MANAGER; 863 864 if (is_opened(other)) 865 other->mode |= DAI_MANAGER; 866 867 /* Reset any constraint on RFS and BFS */ 868 i2s->rfs = 0; 869 i2s->bfs = 0; 870 871 spin_unlock_irqrestore(&priv->pcm_lock, flags); 872 873 pm_runtime_put(dai->dev); 874 } 875 876 static int config_setup(struct i2s_dai *i2s) 877 { 878 struct samsung_i2s_priv *priv = i2s->priv; 879 struct i2s_dai *other = get_other_dai(i2s); 880 unsigned rfs, bfs, blc; 881 u32 psr; 882 883 blc = get_blc(i2s); 884 885 bfs = i2s->bfs; 886 887 if (!bfs && other) 888 bfs = other->bfs; 889 890 /* Select least possible multiple(2) if no constraint set */ 891 if (!bfs) 892 bfs = blc * 2; 893 894 rfs = i2s->rfs; 895 896 if (!rfs && other) 897 rfs = other->rfs; 898 899 if ((rfs == 256 || rfs == 512) && (blc == 24)) { 900 dev_err(&i2s->pdev->dev, 901 "%d-RFS not supported for 24-blc\n", rfs); 902 return -EINVAL; 903 } 904 905 if (!rfs) { 906 if (bfs == 16 || bfs == 32) 907 rfs = 256; 908 else 909 rfs = 384; 910 } 911 912 /* If already setup and running */ 913 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) { 914 dev_err(&i2s->pdev->dev, 915 "%s:%d Other DAI busy\n", __func__, __LINE__); 916 return -EAGAIN; 917 } 918 919 set_bfs(i2s, bfs); 920 set_rfs(i2s, rfs); 921 922 /* Don't bother with PSR in Slave mode */ 923 if (priv->slave_mode) 924 return 0; 925 926 if (!(priv->quirks & QUIRK_NO_MUXPSR)) { 927 psr = priv->rclk_srcrate / i2s->frmclk / rfs; 928 writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR); 929 dev_dbg(&i2s->pdev->dev, 930 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n", 931 priv->rclk_srcrate, psr, rfs, bfs); 932 } 933 934 return 0; 935 } 936 937 static int i2s_trigger(struct snd_pcm_substream *substream, 938 int cmd, struct snd_soc_dai *dai) 939 { 940 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 941 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); 942 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 943 struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0)); 944 unsigned long flags; 945 946 switch (cmd) { 947 case SNDRV_PCM_TRIGGER_START: 948 case SNDRV_PCM_TRIGGER_RESUME: 949 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 950 pm_runtime_get_sync(dai->dev); 951 952 if (priv->fixup_early) 953 priv->fixup_early(substream, dai); 954 955 spin_lock_irqsave(&priv->lock, flags); 956 957 if (config_setup(i2s)) { 958 spin_unlock_irqrestore(&priv->lock, flags); 959 return -EINVAL; 960 } 961 962 if (priv->fixup_late) 963 priv->fixup_late(substream, dai); 964 965 if (capture) 966 i2s_rxctrl(i2s, 1); 967 else 968 i2s_txctrl(i2s, 1); 969 970 spin_unlock_irqrestore(&priv->lock, flags); 971 break; 972 case SNDRV_PCM_TRIGGER_STOP: 973 case SNDRV_PCM_TRIGGER_SUSPEND: 974 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 975 spin_lock_irqsave(&priv->lock, flags); 976 977 if (capture) { 978 i2s_rxctrl(i2s, 0); 979 i2s_fifo(i2s, FIC_RXFLUSH); 980 } else { 981 i2s_txctrl(i2s, 0); 982 i2s_fifo(i2s, FIC_TXFLUSH); 983 } 984 985 spin_unlock_irqrestore(&priv->lock, flags); 986 pm_runtime_put(dai->dev); 987 break; 988 } 989 990 return 0; 991 } 992 993 static int i2s_set_clkdiv(struct snd_soc_dai *dai, 994 int div_id, int div) 995 { 996 struct i2s_dai *i2s = to_info(dai); 997 struct i2s_dai *other = get_other_dai(i2s); 998 999 switch (div_id) { 1000 case SAMSUNG_I2S_DIV_BCLK: 1001 pm_runtime_get_sync(dai->dev); 1002 if ((any_active(i2s) && div && (get_bfs(i2s) != div)) 1003 || (other && other->bfs && (other->bfs != div))) { 1004 pm_runtime_put(dai->dev); 1005 dev_err(&i2s->pdev->dev, 1006 "%s:%d Other DAI busy\n", __func__, __LINE__); 1007 return -EAGAIN; 1008 } 1009 i2s->bfs = div; 1010 pm_runtime_put(dai->dev); 1011 break; 1012 default: 1013 dev_err(&i2s->pdev->dev, 1014 "Invalid clock divider(%d)\n", div_id); 1015 return -EINVAL; 1016 } 1017 1018 return 0; 1019 } 1020 1021 static snd_pcm_sframes_t 1022 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) 1023 { 1024 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1025 struct i2s_dai *i2s = to_info(dai); 1026 u32 reg = readl(priv->addr + I2SFIC); 1027 snd_pcm_sframes_t delay; 1028 1029 WARN_ON(!pm_runtime_active(dai->dev)); 1030 1031 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 1032 delay = FIC_RXCOUNT(reg); 1033 else if (is_secondary(i2s)) 1034 delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS)); 1035 else 1036 delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f; 1037 1038 return delay; 1039 } 1040 1041 #ifdef CONFIG_PM 1042 static int i2s_suspend(struct snd_soc_component *component) 1043 { 1044 return pm_runtime_force_suspend(component->dev); 1045 } 1046 1047 static int i2s_resume(struct snd_soc_component *component) 1048 { 1049 return pm_runtime_force_resume(component->dev); 1050 } 1051 #else 1052 #define i2s_suspend NULL 1053 #define i2s_resume NULL 1054 #endif 1055 1056 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) 1057 { 1058 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1059 struct i2s_dai *i2s = to_info(dai); 1060 struct i2s_dai *other = get_other_dai(i2s); 1061 unsigned long flags; 1062 1063 pm_runtime_get_sync(dai->dev); 1064 1065 if (is_secondary(i2s)) { 1066 /* If this is probe on the secondary DAI */ 1067 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL); 1068 } else { 1069 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, 1070 &i2s->dma_capture); 1071 1072 if (priv->quirks & QUIRK_NEED_RSTCLR) 1073 writel(CON_RSTCLR, priv->addr + I2SCON); 1074 1075 if (priv->quirks & QUIRK_SUPPORTS_IDMA) 1076 idma_reg_addr_init(priv->addr, 1077 other->idma_playback.addr); 1078 } 1079 1080 /* Reset any constraint on RFS and BFS */ 1081 i2s->rfs = 0; 1082 i2s->bfs = 0; 1083 1084 spin_lock_irqsave(&priv->lock, flags); 1085 i2s_txctrl(i2s, 0); 1086 i2s_rxctrl(i2s, 0); 1087 i2s_fifo(i2s, FIC_TXFLUSH); 1088 i2s_fifo(other, FIC_TXFLUSH); 1089 i2s_fifo(i2s, FIC_RXFLUSH); 1090 spin_unlock_irqrestore(&priv->lock, flags); 1091 1092 /* Gate CDCLK by default */ 1093 if (!is_opened(other)) 1094 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 1095 0, SND_SOC_CLOCK_IN); 1096 pm_runtime_put(dai->dev); 1097 1098 return 0; 1099 } 1100 1101 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai) 1102 { 1103 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1104 struct i2s_dai *i2s = to_info(dai); 1105 unsigned long flags; 1106 1107 pm_runtime_get_sync(dai->dev); 1108 1109 if (!is_secondary(i2s)) { 1110 if (priv->quirks & QUIRK_NEED_RSTCLR) { 1111 spin_lock_irqsave(&priv->lock, flags); 1112 writel(0, priv->addr + I2SCON); 1113 spin_unlock_irqrestore(&priv->lock, flags); 1114 } 1115 } 1116 1117 pm_runtime_put(dai->dev); 1118 1119 return 0; 1120 } 1121 1122 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = { 1123 .probe = samsung_i2s_dai_probe, 1124 .remove = samsung_i2s_dai_remove, 1125 .trigger = i2s_trigger, 1126 .hw_params = i2s_hw_params, 1127 .set_fmt = i2s_set_fmt, 1128 .set_clkdiv = i2s_set_clkdiv, 1129 .set_sysclk = i2s_set_sysclk, 1130 .startup = i2s_startup, 1131 .shutdown = i2s_shutdown, 1132 .delay = i2s_delay, 1133 }; 1134 1135 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = { 1136 /* Backend DAI */ 1137 SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0), 1138 SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0), 1139 1140 /* Playback Mixer */ 1141 SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), 1142 }; 1143 1144 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = { 1145 { "Playback Mixer", NULL, "Primary Playback" }, 1146 { "Playback Mixer", NULL, "Secondary Playback" }, 1147 1148 { "Mixer DAI TX", NULL, "Playback Mixer" }, 1149 { "Primary Capture", NULL, "Mixer DAI RX" }, 1150 }; 1151 1152 static const struct snd_soc_component_driver samsung_i2s_component = { 1153 .name = "samsung-i2s", 1154 1155 .dapm_widgets = samsung_i2s_widgets, 1156 .num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets), 1157 1158 .dapm_routes = samsung_i2s_dapm_routes, 1159 .num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes), 1160 1161 .suspend = i2s_suspend, 1162 .resume = i2s_resume, 1163 1164 .legacy_dai_naming = 1, 1165 }; 1166 1167 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ 1168 SNDRV_PCM_FMTBIT_S24_LE) 1169 1170 static int i2s_alloc_dais(struct samsung_i2s_priv *priv, 1171 const struct samsung_i2s_dai_data *i2s_dai_data, 1172 int num_dais) 1173 { 1174 static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" }; 1175 static const char *stream_names[] = { "Primary Playback", 1176 "Secondary Playback" }; 1177 struct snd_soc_dai_driver *dai_drv; 1178 int i; 1179 1180 priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais, 1181 sizeof(struct i2s_dai), GFP_KERNEL); 1182 if (!priv->dai) 1183 return -ENOMEM; 1184 1185 priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais, 1186 sizeof(*dai_drv), GFP_KERNEL); 1187 if (!priv->dai_drv) 1188 return -ENOMEM; 1189 1190 for (i = 0; i < num_dais; i++) { 1191 dai_drv = &priv->dai_drv[i]; 1192 1193 dai_drv->symmetric_rate = 1; 1194 dai_drv->ops = &samsung_i2s_dai_ops; 1195 1196 dai_drv->playback.channels_min = 1; 1197 dai_drv->playback.channels_max = 2; 1198 dai_drv->playback.rates = i2s_dai_data->pcm_rates; 1199 dai_drv->playback.formats = SAMSUNG_I2S_FMTS; 1200 dai_drv->playback.stream_name = stream_names[i]; 1201 1202 dai_drv->id = i + 1; 1203 dai_drv->name = dai_names[i]; 1204 1205 priv->dai[i].drv = &priv->dai_drv[i]; 1206 priv->dai[i].pdev = priv->pdev; 1207 } 1208 1209 /* Initialize capture only for the primary DAI */ 1210 dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1]; 1211 1212 dai_drv->capture.channels_min = 1; 1213 dai_drv->capture.channels_max = 2; 1214 dai_drv->capture.rates = i2s_dai_data->pcm_rates; 1215 dai_drv->capture.formats = SAMSUNG_I2S_FMTS; 1216 dai_drv->capture.stream_name = "Primary Capture"; 1217 1218 return 0; 1219 } 1220 1221 #ifdef CONFIG_PM 1222 static int i2s_runtime_suspend(struct device *dev) 1223 { 1224 struct samsung_i2s_priv *priv = dev_get_drvdata(dev); 1225 1226 priv->suspend_i2smod = readl(priv->addr + I2SMOD); 1227 priv->suspend_i2scon = readl(priv->addr + I2SCON); 1228 priv->suspend_i2spsr = readl(priv->addr + I2SPSR); 1229 1230 clk_disable_unprepare(priv->op_clk); 1231 clk_disable_unprepare(priv->clk); 1232 1233 return 0; 1234 } 1235 1236 static int i2s_runtime_resume(struct device *dev) 1237 { 1238 struct samsung_i2s_priv *priv = dev_get_drvdata(dev); 1239 int ret; 1240 1241 ret = clk_prepare_enable(priv->clk); 1242 if (ret) 1243 return ret; 1244 1245 if (priv->op_clk) { 1246 ret = clk_prepare_enable(priv->op_clk); 1247 if (ret) { 1248 clk_disable_unprepare(priv->clk); 1249 return ret; 1250 } 1251 } 1252 1253 writel(priv->suspend_i2scon, priv->addr + I2SCON); 1254 writel(priv->suspend_i2smod, priv->addr + I2SMOD); 1255 writel(priv->suspend_i2spsr, priv->addr + I2SPSR); 1256 1257 return 0; 1258 } 1259 #endif /* CONFIG_PM */ 1260 1261 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv) 1262 { 1263 int i; 1264 1265 for (i = 0; i < priv->clk_data.clk_num; i++) { 1266 if (!IS_ERR(priv->clk_table[i])) 1267 clk_unregister(priv->clk_table[i]); 1268 } 1269 } 1270 1271 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv) 1272 { 1273 of_clk_del_provider(priv->pdev->dev.of_node); 1274 i2s_unregister_clocks(priv); 1275 } 1276 1277 1278 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv) 1279 { 1280 1281 const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" }; 1282 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" }; 1283 const char *p_names[2] = { NULL }; 1284 struct device *dev = &priv->pdev->dev; 1285 const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs; 1286 const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)]; 1287 struct clk *rclksrc; 1288 int ret, i; 1289 1290 /* Register the clock provider only if it's expected in the DTB */ 1291 if (!of_property_present(dev->of_node, "#clock-cells")) 1292 return 0; 1293 1294 /* Get the RCLKSRC mux clock parent clock names */ 1295 for (i = 0; i < ARRAY_SIZE(p_names); i++) { 1296 rclksrc = clk_get(dev, clk_name[i]); 1297 if (IS_ERR(rclksrc)) 1298 continue; 1299 p_names[i] = __clk_get_name(rclksrc); 1300 clk_put(rclksrc); 1301 } 1302 1303 for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) { 1304 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s", 1305 dev_name(dev), i2s_clk_desc[i]); 1306 if (!i2s_clk_name[i]) 1307 return -ENOMEM; 1308 } 1309 1310 if (!(priv->quirks & QUIRK_NO_MUXPSR)) { 1311 /* Activate the prescaler */ 1312 u32 val = readl(priv->addr + I2SPSR); 1313 writel(val | PSR_PSREN, priv->addr + I2SPSR); 1314 1315 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, 1316 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names, 1317 ARRAY_SIZE(p_names), 1318 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, 1319 priv->addr + I2SMOD, reg_info->rclksrc_off, 1320 1, 0, &priv->lock); 1321 1322 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, 1323 i2s_clk_name[CLK_I2S_RCLK_PSR], 1324 i2s_clk_name[CLK_I2S_RCLK_SRC], 1325 CLK_SET_RATE_PARENT, 1326 priv->addr + I2SPSR, 8, 6, 0, &priv->lock); 1327 1328 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR]; 1329 priv->clk_data.clk_num = 2; 1330 } 1331 1332 priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, 1333 i2s_clk_name[CLK_I2S_CDCLK], p_names[0], 1334 CLK_SET_RATE_PARENT, 1335 priv->addr + I2SMOD, reg_info->cdclkcon_off, 1336 CLK_GATE_SET_TO_DISABLE, &priv->lock); 1337 1338 priv->clk_data.clk_num += 1; 1339 priv->clk_data.clks = priv->clk_table; 1340 1341 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, 1342 &priv->clk_data); 1343 if (ret < 0) { 1344 dev_err(dev, "failed to add clock provider: %d\n", ret); 1345 i2s_unregister_clocks(priv); 1346 } 1347 1348 return ret; 1349 } 1350 1351 /* Create platform device for the secondary PCM */ 1352 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv) 1353 { 1354 struct platform_device *pdev_sec; 1355 const char *devname; 1356 int ret; 1357 1358 devname = devm_kasprintf(&priv->pdev->dev, GFP_KERNEL, "%s-sec", 1359 dev_name(&priv->pdev->dev)); 1360 if (!devname) 1361 return -ENOMEM; 1362 1363 pdev_sec = platform_device_alloc(devname, -1); 1364 if (!pdev_sec) 1365 return -ENOMEM; 1366 1367 pdev_sec->driver_override = kstrdup("samsung-i2s", GFP_KERNEL); 1368 if (!pdev_sec->driver_override) { 1369 platform_device_put(pdev_sec); 1370 return -ENOMEM; 1371 } 1372 1373 ret = platform_device_add(pdev_sec); 1374 if (ret < 0) { 1375 platform_device_put(pdev_sec); 1376 return ret; 1377 } 1378 1379 ret = device_attach(&pdev_sec->dev); 1380 if (ret <= 0) { 1381 platform_device_unregister(priv->pdev_sec); 1382 dev_info(&pdev_sec->dev, "device_attach() failed\n"); 1383 return ret; 1384 } 1385 1386 priv->pdev_sec = pdev_sec; 1387 1388 return 0; 1389 } 1390 1391 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv) 1392 { 1393 platform_device_unregister(priv->pdev_sec); 1394 priv->pdev_sec = NULL; 1395 } 1396 1397 static int samsung_i2s_probe(struct platform_device *pdev) 1398 { 1399 struct i2s_dai *pri_dai, *sec_dai = NULL; 1400 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data; 1401 u32 regs_base, idma_addr = 0; 1402 struct device_node *np = pdev->dev.of_node; 1403 const struct samsung_i2s_dai_data *i2s_dai_data; 1404 const struct platform_device_id *id; 1405 struct samsung_i2s_priv *priv; 1406 struct resource *res; 1407 int num_dais, ret; 1408 1409 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { 1410 i2s_dai_data = of_device_get_match_data(&pdev->dev); 1411 } else { 1412 id = platform_get_device_id(pdev); 1413 1414 /* Nothing to do if it is the secondary device probe */ 1415 if (!id) 1416 return 0; 1417 1418 i2s_dai_data = (struct samsung_i2s_dai_data *)id->driver_data; 1419 } 1420 1421 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 1422 if (!priv) 1423 return -ENOMEM; 1424 1425 if (np) { 1426 priv->quirks = i2s_dai_data->quirks; 1427 priv->fixup_early = i2s_dai_data->fixup_early; 1428 priv->fixup_late = i2s_dai_data->fixup_late; 1429 } else { 1430 if (!i2s_pdata) { 1431 dev_err(&pdev->dev, "Missing platform data\n"); 1432 return -EINVAL; 1433 } 1434 priv->quirks = i2s_pdata->type.quirks; 1435 } 1436 1437 num_dais = (priv->quirks & QUIRK_SEC_DAI) ? 2 : 1; 1438 priv->pdev = pdev; 1439 priv->variant_regs = i2s_dai_data->i2s_variant_regs; 1440 1441 ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais); 1442 if (ret < 0) 1443 return ret; 1444 1445 pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1]; 1446 1447 spin_lock_init(&priv->lock); 1448 spin_lock_init(&priv->pcm_lock); 1449 1450 if (!np) { 1451 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback; 1452 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture; 1453 pri_dai->filter = i2s_pdata->dma_filter; 1454 1455 idma_addr = i2s_pdata->type.idma_addr; 1456 } else { 1457 if (of_property_read_u32(np, "samsung,idma-addr", 1458 &idma_addr)) { 1459 if (priv->quirks & QUIRK_SUPPORTS_IDMA) { 1460 dev_info(&pdev->dev, "idma address is not"\ 1461 "specified"); 1462 } 1463 } 1464 } 1465 1466 priv->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 1467 if (IS_ERR(priv->addr)) 1468 return PTR_ERR(priv->addr); 1469 1470 regs_base = res->start; 1471 1472 priv->clk = devm_clk_get(&pdev->dev, "iis"); 1473 if (IS_ERR(priv->clk)) { 1474 dev_err(&pdev->dev, "Failed to get iis clock\n"); 1475 return PTR_ERR(priv->clk); 1476 } 1477 1478 ret = clk_prepare_enable(priv->clk); 1479 if (ret != 0) { 1480 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret); 1481 return ret; 1482 } 1483 pri_dai->dma_playback.addr = regs_base + I2STXD; 1484 pri_dai->dma_capture.addr = regs_base + I2SRXD; 1485 pri_dai->dma_playback.chan_name = "tx"; 1486 pri_dai->dma_capture.chan_name = "rx"; 1487 pri_dai->dma_playback.addr_width = 4; 1488 pri_dai->dma_capture.addr_width = 4; 1489 pri_dai->priv = priv; 1490 1491 if (priv->quirks & QUIRK_PRI_6CHAN) 1492 pri_dai->drv->playback.channels_max = 6; 1493 1494 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter, 1495 "tx", "rx", NULL); 1496 if (ret < 0) 1497 goto err_disable_clk; 1498 1499 if (priv->quirks & QUIRK_SEC_DAI) { 1500 sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1]; 1501 1502 sec_dai->dma_playback.addr = regs_base + I2STXDS; 1503 sec_dai->dma_playback.chan_name = "tx-sec"; 1504 1505 if (!np) { 1506 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec; 1507 sec_dai->filter = i2s_pdata->dma_filter; 1508 } 1509 1510 sec_dai->dma_playback.addr_width = 4; 1511 sec_dai->idma_playback.addr = idma_addr; 1512 sec_dai->pri_dai = pri_dai; 1513 sec_dai->priv = priv; 1514 pri_dai->sec_dai = sec_dai; 1515 1516 ret = i2s_create_secondary_device(priv); 1517 if (ret < 0) 1518 goto err_disable_clk; 1519 1520 ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev, 1521 sec_dai->filter, "tx-sec", NULL, 1522 &pdev->dev); 1523 if (ret < 0) 1524 goto err_del_sec; 1525 1526 } 1527 1528 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) { 1529 dev_err(&pdev->dev, "Unable to configure gpio\n"); 1530 ret = -EINVAL; 1531 goto err_del_sec; 1532 } 1533 1534 dev_set_drvdata(&pdev->dev, priv); 1535 1536 ret = devm_snd_soc_register_component(&pdev->dev, 1537 &samsung_i2s_component, 1538 priv->dai_drv, num_dais); 1539 if (ret < 0) 1540 goto err_del_sec; 1541 1542 pm_runtime_set_active(&pdev->dev); 1543 pm_runtime_enable(&pdev->dev); 1544 1545 ret = i2s_register_clock_provider(priv); 1546 if (ret < 0) 1547 goto err_disable_pm; 1548 1549 priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]); 1550 1551 return 0; 1552 1553 err_disable_pm: 1554 pm_runtime_disable(&pdev->dev); 1555 err_del_sec: 1556 i2s_delete_secondary_device(priv); 1557 err_disable_clk: 1558 clk_disable_unprepare(priv->clk); 1559 return ret; 1560 } 1561 1562 static void samsung_i2s_remove(struct platform_device *pdev) 1563 { 1564 struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev); 1565 1566 /* The secondary device has no driver data assigned */ 1567 if (!priv) 1568 return; 1569 1570 pm_runtime_get_sync(&pdev->dev); 1571 pm_runtime_disable(&pdev->dev); 1572 1573 i2s_unregister_clock_provider(priv); 1574 i2s_delete_secondary_device(priv); 1575 clk_disable_unprepare(priv->clk); 1576 1577 pm_runtime_put_noidle(&pdev->dev); 1578 } 1579 1580 static void fsd_i2s_fixup_early(struct snd_pcm_substream *substream, 1581 struct snd_soc_dai *dai) 1582 { 1583 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 1584 struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0)); 1585 struct i2s_dai *other = get_other_dai(i2s); 1586 1587 if (!is_opened(other)) { 1588 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 0, SND_SOC_CLOCK_OUT); 1589 i2s_set_sysclk(dai, SAMSUNG_I2S_OPCLK, 0, MOD_OPCLK_PCLK); 1590 } 1591 } 1592 1593 static void fsd_i2s_fixup_late(struct snd_pcm_substream *substream, 1594 struct snd_soc_dai *dai) 1595 { 1596 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 1597 struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai); 1598 struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0)); 1599 struct i2s_dai *other = get_other_dai(i2s); 1600 1601 if (!is_opened(other)) 1602 writel(PSR_PSVAL(2) | PSR_PSREN, priv->addr + I2SPSR); 1603 } 1604 1605 static const struct samsung_i2s_variant_regs i2sv3_regs = { 1606 .bfs_off = 1, 1607 .rfs_off = 3, 1608 .sdf_off = 5, 1609 .txr_off = 8, 1610 .rclksrc_off = 10, 1611 .mss_off = 11, 1612 .cdclkcon_off = 12, 1613 .lrp_off = 7, 1614 .bfs_mask = 0x3, 1615 .rfs_mask = 0x3, 1616 .ftx0cnt_off = 8, 1617 }; 1618 1619 static const struct samsung_i2s_variant_regs i2sv6_regs = { 1620 .bfs_off = 0, 1621 .rfs_off = 4, 1622 .sdf_off = 6, 1623 .txr_off = 8, 1624 .rclksrc_off = 10, 1625 .mss_off = 11, 1626 .cdclkcon_off = 12, 1627 .lrp_off = 15, 1628 .bfs_mask = 0xf, 1629 .rfs_mask = 0x3, 1630 .ftx0cnt_off = 8, 1631 }; 1632 1633 static const struct samsung_i2s_variant_regs i2sv7_regs = { 1634 .bfs_off = 0, 1635 .rfs_off = 4, 1636 .sdf_off = 7, 1637 .txr_off = 9, 1638 .rclksrc_off = 11, 1639 .mss_off = 12, 1640 .cdclkcon_off = 22, 1641 .lrp_off = 15, 1642 .bfs_mask = 0xf, 1643 .rfs_mask = 0x7, 1644 .ftx0cnt_off = 0, 1645 }; 1646 1647 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = { 1648 .bfs_off = 0, 1649 .rfs_off = 3, 1650 .sdf_off = 6, 1651 .txr_off = 8, 1652 .rclksrc_off = 10, 1653 .mss_off = 11, 1654 .cdclkcon_off = 12, 1655 .lrp_off = 15, 1656 .bfs_mask = 0x7, 1657 .rfs_mask = 0x7, 1658 .ftx0cnt_off = 8, 1659 }; 1660 1661 static const struct samsung_i2s_dai_data i2sv3_dai_type = { 1662 .quirks = QUIRK_NO_MUXPSR, 1663 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1664 .i2s_variant_regs = &i2sv3_regs, 1665 }; 1666 1667 static const struct samsung_i2s_dai_data i2sv5_dai_type __maybe_unused = { 1668 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1669 QUIRK_SUPPORTS_IDMA, 1670 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1671 .i2s_variant_regs = &i2sv3_regs, 1672 }; 1673 1674 static const struct samsung_i2s_dai_data i2sv6_dai_type __maybe_unused = { 1675 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1676 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA, 1677 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1678 .i2s_variant_regs = &i2sv6_regs, 1679 }; 1680 1681 static const struct samsung_i2s_dai_data i2sv7_dai_type __maybe_unused = { 1682 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | 1683 QUIRK_SUPPORTS_TDM, 1684 .pcm_rates = SNDRV_PCM_RATE_8000_192000, 1685 .i2s_variant_regs = &i2sv7_regs, 1686 }; 1687 1688 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 __maybe_unused = { 1689 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR, 1690 .pcm_rates = SNDRV_PCM_RATE_8000_96000, 1691 .i2s_variant_regs = &i2sv5_i2s1_regs, 1692 }; 1693 1694 static const struct samsung_i2s_dai_data fsd_dai_type __maybe_unused = { 1695 .quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | QUIRK_SUPPORTS_TDM, 1696 .pcm_rates = SNDRV_PCM_RATE_8000_192000, 1697 .i2s_variant_regs = &i2sv7_regs, 1698 .fixup_early = fsd_i2s_fixup_early, 1699 .fixup_late = fsd_i2s_fixup_late, 1700 }; 1701 1702 static const struct platform_device_id samsung_i2s_driver_ids[] = { 1703 { 1704 .name = "samsung-i2s", 1705 .driver_data = (kernel_ulong_t)&i2sv3_dai_type, 1706 }, 1707 {}, 1708 }; 1709 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids); 1710 1711 #ifdef CONFIG_OF 1712 static const struct of_device_id exynos_i2s_match[] = { 1713 { 1714 .compatible = "samsung,s3c6410-i2s", 1715 .data = &i2sv3_dai_type, 1716 }, { 1717 .compatible = "samsung,s5pv210-i2s", 1718 .data = &i2sv5_dai_type, 1719 }, { 1720 .compatible = "samsung,exynos5420-i2s", 1721 .data = &i2sv6_dai_type, 1722 }, { 1723 .compatible = "samsung,exynos7-i2s", 1724 .data = &i2sv7_dai_type, 1725 }, { 1726 .compatible = "samsung,exynos7-i2s1", 1727 .data = &i2sv5_dai_type_i2s1, 1728 }, { 1729 .compatible = "tesla,fsd-i2s", 1730 .data = &fsd_dai_type, 1731 }, 1732 {}, 1733 }; 1734 MODULE_DEVICE_TABLE(of, exynos_i2s_match); 1735 #endif 1736 1737 static const struct dev_pm_ops samsung_i2s_pm = { 1738 SET_RUNTIME_PM_OPS(i2s_runtime_suspend, 1739 i2s_runtime_resume, NULL) 1740 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1741 pm_runtime_force_resume) 1742 }; 1743 1744 static struct platform_driver samsung_i2s_driver = { 1745 .probe = samsung_i2s_probe, 1746 .remove_new = samsung_i2s_remove, 1747 .id_table = samsung_i2s_driver_ids, 1748 .driver = { 1749 .name = "samsung-i2s", 1750 .of_match_table = of_match_ptr(exynos_i2s_match), 1751 .pm = &samsung_i2s_pm, 1752 }, 1753 }; 1754 1755 module_platform_driver(samsung_i2s_driver); 1756 1757 /* Module information */ 1758 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>"); 1759 MODULE_DESCRIPTION("Samsung I2S Interface"); 1760 MODULE_ALIAS("platform:samsung-i2s"); 1761 MODULE_LICENSE("GPL"); 1762