1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2021, Linaro Limited
3 
4 #include <linux/err.h>
5 #include <linux/init.h>
6 #include <linux/clk-provider.h>
7 #include <linux/module.h>
8 #include <linux/device.h>
9 #include <linux/platform_device.h>
10 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
11 #include "q6dsp-lpass-clocks.h"
12 #include "q6prm.h"
13 
14 #define Q6PRM_CLK(id) {					\
15 		.clk_id	= id,				\
16 		.q6dsp_clk_id	= Q6PRM_##id,		\
17 		.name = #id,				\
18 		.rate = 19200000,			\
19 	}
20 
21 static const struct q6dsp_clk_init q6prm_clks[] = {
22 	Q6PRM_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT),
23 	Q6PRM_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT),
24 	Q6PRM_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT),
25 	Q6PRM_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT),
26 	Q6PRM_CLK(LPASS_CLK_ID_TER_MI2S_IBIT),
27 	Q6PRM_CLK(LPASS_CLK_ID_TER_MI2S_EBIT),
28 	Q6PRM_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT),
29 	Q6PRM_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT),
30 	Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT),
31 	Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT),
32 	Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR),
33 	Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT),
34 	Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT),
35 	Q6PRM_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT),
36 	Q6PRM_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT),
37 	Q6PRM_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT),
38 	Q6PRM_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT),
39 	Q6PRM_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT),
40 	Q6PRM_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT),
41 	Q6PRM_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT),
42 	Q6PRM_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
43 	Q6PRM_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
44 	Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
45 	Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
46 	Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
47 	Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
48 	Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
49 	Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
50 	Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
51 	Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
52 	Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
53 	Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE, Q6PRM_HW_CORE_ID_LPASS,
54 		       "LPASS_HW_MACRO"),
55 	Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE, Q6PRM_HW_CORE_ID_DCODEC,
56 		       "LPASS_HW_DCODEC"),
57 };
58 
59 static const struct q6dsp_clk_desc q6dsp_clk_q6prm __maybe_unused = {
60 	.clks = q6prm_clks,
61 	.num_clks = ARRAY_SIZE(q6prm_clks),
62 	.lpass_set_clk = q6prm_set_lpass_clock,
63 	.lpass_vote_clk = q6prm_vote_lpass_core_hw,
64 	.lpass_unvote_clk = q6prm_unvote_lpass_core_hw,
65 };
66 
67 #ifdef CONFIG_OF
68 static const struct of_device_id q6prm_clock_device_id[] = {
69 	{ .compatible = "qcom,q6prm-lpass-clocks", .data = &q6dsp_clk_q6prm },
70 	{},
71 };
72 MODULE_DEVICE_TABLE(of, q6prm_clock_device_id);
73 #endif
74 
75 static struct platform_driver q6prm_clock_platform_driver = {
76 	.driver = {
77 		.name = "q6prm-lpass-clock",
78 		.of_match_table = of_match_ptr(q6prm_clock_device_id),
79 	},
80 	.probe = q6dsp_clock_dev_probe,
81 };
82 module_platform_driver(q6prm_clock_platform_driver);
83 
84 MODULE_DESCRIPTION("Q6 Proxy Resource Manager LPASS clock driver");
85 MODULE_LICENSE("GPL");
86