1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. 4 * 5 * lpass.h - Definitions for the QTi LPASS 6 */ 7 8 #ifndef __LPASS_H__ 9 #define __LPASS_H__ 10 11 #include <linux/clk.h> 12 #include <linux/compiler.h> 13 #include <linux/platform_device.h> 14 #include <linux/regmap.h> 15 16 #define LPASS_AHBIX_CLOCK_FREQUENCY 131072000 17 #define LPASS_MAX_MI2S_PORTS (8) 18 #define LPASS_MAX_DMA_CHANNELS (8) 19 20 struct lpaif_i2sctl { 21 struct regmap_field *loopback; 22 struct regmap_field *spken; 23 struct regmap_field *spkmode; 24 struct regmap_field *spkmono; 25 struct regmap_field *micen; 26 struct regmap_field *micmode; 27 struct regmap_field *micmono; 28 struct regmap_field *wssrc; 29 struct regmap_field *bitwidth; 30 }; 31 32 33 struct lpaif_dmactl { 34 struct regmap_field *bursten; 35 struct regmap_field *wpscnt; 36 struct regmap_field *intf; 37 struct regmap_field *fifowm; 38 struct regmap_field *enable; 39 struct regmap_field *dyncclk; 40 }; 41 42 /* Both the CPU DAI and platform drivers will access this data */ 43 struct lpass_data { 44 45 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */ 46 struct clk *ahbix_clk; 47 48 /* MI2S system clock */ 49 struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS]; 50 51 /* MI2S bit clock (derived from system clock by a divider */ 52 struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS]; 53 54 /* MI2S SD lines to use for playback/capture */ 55 unsigned int mi2s_playback_sd_mode[LPASS_MAX_MI2S_PORTS]; 56 unsigned int mi2s_capture_sd_mode[LPASS_MAX_MI2S_PORTS]; 57 58 /* low-power audio interface (LPAIF) registers */ 59 void __iomem *lpaif; 60 61 /* regmap backed by the low-power audio interface (LPAIF) registers */ 62 struct regmap *lpaif_map; 63 64 /* interrupts from the low-power audio interface (LPAIF) */ 65 int lpaif_irq; 66 67 /* SOC specific variations in the LPASS IP integration */ 68 struct lpass_variant *variant; 69 70 /* bit map to keep track of static channel allocations */ 71 unsigned long dma_ch_bit_map; 72 73 /* used it for handling interrupt per dma channel */ 74 struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS]; 75 76 /* SOC specific clock list */ 77 struct clk_bulk_data *clks; 78 int num_clks; 79 80 /* Regmap fields of I2SCTL & DMACTL registers bitfields */ 81 struct lpaif_i2sctl *i2sctl; 82 struct lpaif_dmactl *rd_dmactl; 83 struct lpaif_dmactl *wr_dmactl; 84 }; 85 86 /* Vairant data per each SOC */ 87 struct lpass_variant { 88 u32 i2sctrl_reg_base; 89 u32 i2sctrl_reg_stride; 90 u32 i2s_ports; 91 u32 irq_reg_base; 92 u32 irq_reg_stride; 93 u32 irq_ports; 94 u32 rdma_reg_base; 95 u32 rdma_reg_stride; 96 u32 rdma_channels; 97 u32 wrdma_reg_base; 98 u32 wrdma_reg_stride; 99 u32 wrdma_channels; 100 101 /* I2SCTL Register fields */ 102 struct reg_field loopback; 103 struct reg_field spken; 104 struct reg_field spkmode; 105 struct reg_field spkmono; 106 struct reg_field micen; 107 struct reg_field micmode; 108 struct reg_field micmono; 109 struct reg_field wssrc; 110 struct reg_field bitwidth; 111 112 /* RD_DMA Register fields */ 113 struct reg_field rdma_bursten; 114 struct reg_field rdma_wpscnt; 115 struct reg_field rdma_intf; 116 struct reg_field rdma_fifowm; 117 struct reg_field rdma_enable; 118 struct reg_field rdma_dyncclk; 119 120 /* WR_DMA Register fields */ 121 struct reg_field wrdma_bursten; 122 struct reg_field wrdma_wpscnt; 123 struct reg_field wrdma_intf; 124 struct reg_field wrdma_fifowm; 125 struct reg_field wrdma_enable; 126 struct reg_field wrdma_dyncclk; 127 128 /** 129 * on SOCs like APQ8016 the channel control bits start 130 * at different offset to ipq806x 131 **/ 132 u32 dmactl_audif_start; 133 u32 wrdma_channel_start; 134 /* SOC specific initialization like clocks */ 135 int (*init)(struct platform_device *pdev); 136 int (*exit)(struct platform_device *pdev); 137 int (*alloc_dma_channel)(struct lpass_data *data, int direction); 138 int (*free_dma_channel)(struct lpass_data *data, int ch); 139 140 /* SOC specific dais */ 141 struct snd_soc_dai_driver *dai_driver; 142 int num_dai; 143 const char * const *dai_osr_clk_names; 144 const char * const *dai_bit_clk_names; 145 146 /* SOC specific clocks configuration */ 147 const char **clk_name; 148 int num_clks; 149 }; 150 151 /* register the platform driver from the CPU DAI driver */ 152 int asoc_qcom_lpass_platform_register(struct platform_device *); 153 int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev); 154 int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev); 155 int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai); 156 extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops; 157 158 #endif /* __LPASS_H__ */ 159