xref: /openbmc/linux/sound/soc/qcom/lpass-apq8016.c (revision a06c488d)
1 /*
2  * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 and
6  * only version 2 as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
14  *
15  */
16 
17 
18 #include <linux/clk.h>
19 #include <linux/device.h>
20 #include <linux/err.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/of.h>
24 #include <linux/platform_device.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dai.h>
29 
30 #include <dt-bindings/sound/apq8016-lpass.h>
31 #include "lpass-lpaif-reg.h"
32 #include "lpass.h"
33 
34 static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = {
35 	[MI2S_PRIMARY] =  {
36 		.id = MI2S_PRIMARY,
37 		.name = "Primary MI2S",
38 		.playback = {
39 			.stream_name	= "Primary Playback",
40 			.formats	= SNDRV_PCM_FMTBIT_S16 |
41 						SNDRV_PCM_FMTBIT_S24 |
42 						SNDRV_PCM_FMTBIT_S32,
43 			.rates		= SNDRV_PCM_RATE_8000 |
44 						SNDRV_PCM_RATE_16000 |
45 						SNDRV_PCM_RATE_32000 |
46 						SNDRV_PCM_RATE_48000 |
47 						SNDRV_PCM_RATE_96000,
48 			.rate_min	= 8000,
49 			.rate_max	= 96000,
50 			.channels_min	= 1,
51 			.channels_max	= 8,
52 		},
53 		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
54 		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
55 	},
56 	[MI2S_SECONDARY] =  {
57 		.id = MI2S_SECONDARY,
58 		.name = "Secondary MI2S",
59 		.playback = {
60 			.stream_name	= "Secondary Playback",
61 			.formats	= SNDRV_PCM_FMTBIT_S16 |
62 						SNDRV_PCM_FMTBIT_S24 |
63 						SNDRV_PCM_FMTBIT_S32,
64 			.rates		= SNDRV_PCM_RATE_8000 |
65 						SNDRV_PCM_RATE_16000 |
66 						SNDRV_PCM_RATE_32000 |
67 						SNDRV_PCM_RATE_48000 |
68 						SNDRV_PCM_RATE_96000,
69 			.rate_min	= 8000,
70 			.rate_max	= 96000,
71 			.channels_min	= 1,
72 			.channels_max	= 8,
73 		},
74 		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
75 		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
76 	},
77 	[MI2S_TERTIARY] =  {
78 		.id = MI2S_TERTIARY,
79 		.name = "Tertiary MI2S",
80 		.capture = {
81 			.stream_name	= "Tertiary Capture",
82 			.formats	= SNDRV_PCM_FMTBIT_S16 |
83 						SNDRV_PCM_FMTBIT_S24 |
84 						SNDRV_PCM_FMTBIT_S32,
85 			.rates		= SNDRV_PCM_RATE_8000 |
86 						SNDRV_PCM_RATE_16000 |
87 						SNDRV_PCM_RATE_32000 |
88 						SNDRV_PCM_RATE_48000 |
89 						SNDRV_PCM_RATE_96000,
90 			.rate_min	= 8000,
91 			.rate_max	= 96000,
92 			.channels_min	= 1,
93 			.channels_max	= 8,
94 		},
95 		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
96 		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
97 	},
98 	[MI2S_QUATERNARY] =  {
99 		.id = MI2S_QUATERNARY,
100 		.name = "Quatenary MI2S",
101 		.playback = {
102 			.stream_name	= "Quatenary Playback",
103 			.formats	= SNDRV_PCM_FMTBIT_S16 |
104 						SNDRV_PCM_FMTBIT_S24 |
105 						SNDRV_PCM_FMTBIT_S32,
106 			.rates		= SNDRV_PCM_RATE_8000 |
107 						SNDRV_PCM_RATE_16000 |
108 						SNDRV_PCM_RATE_32000 |
109 						SNDRV_PCM_RATE_48000 |
110 						SNDRV_PCM_RATE_96000,
111 			.rate_min	= 8000,
112 			.rate_max	= 96000,
113 			.channels_min	= 1,
114 			.channels_max	= 8,
115 		},
116 		.capture = {
117 			.stream_name	= "Quatenary Capture",
118 			.formats	= SNDRV_PCM_FMTBIT_S16 |
119 						SNDRV_PCM_FMTBIT_S24 |
120 						SNDRV_PCM_FMTBIT_S32,
121 			.rates		= SNDRV_PCM_RATE_8000 |
122 						SNDRV_PCM_RATE_16000 |
123 						SNDRV_PCM_RATE_32000 |
124 						SNDRV_PCM_RATE_48000 |
125 						SNDRV_PCM_RATE_96000,
126 			.rate_min	= 8000,
127 			.rate_max	= 96000,
128 			.channels_min	= 1,
129 			.channels_max	= 8,
130 		},
131 		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
132 		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
133 	},
134 };
135 
136 static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata)
137 {
138 	struct lpass_variant *v = drvdata->variant;
139 	int chan = find_first_zero_bit(&drvdata->rdma_ch_bit_map,
140 					v->rdma_channels);
141 
142 	if (chan >= v->rdma_channels)
143 		return -EBUSY;
144 
145 	set_bit(chan, &drvdata->rdma_ch_bit_map);
146 
147 	return chan;
148 }
149 
150 static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
151 {
152 	clear_bit(chan, &drvdata->rdma_ch_bit_map);
153 
154 	return 0;
155 }
156 
157 static int apq8016_lpass_init(struct platform_device *pdev)
158 {
159 	struct lpass_data *drvdata = platform_get_drvdata(pdev);
160 	struct device *dev = &pdev->dev;
161 	int ret;
162 
163 	drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
164 	if (IS_ERR(drvdata->pcnoc_mport_clk)) {
165 		dev_err(&pdev->dev, "%s() error getting pcnoc-mport-clk: %ld\n",
166 				__func__, PTR_ERR(drvdata->pcnoc_mport_clk));
167 		return PTR_ERR(drvdata->pcnoc_mport_clk);
168 	}
169 
170 	ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
171 	if (ret) {
172 		dev_err(&pdev->dev, "%s() Error enabling pcnoc-mport-clk: %d\n",
173 				__func__, ret);
174 		return ret;
175 	}
176 
177 	drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
178 	if (IS_ERR(drvdata->pcnoc_sway_clk)) {
179 		dev_err(&pdev->dev, "%s() error getting pcnoc-sway-clk: %ld\n",
180 				__func__, PTR_ERR(drvdata->pcnoc_sway_clk));
181 		return PTR_ERR(drvdata->pcnoc_sway_clk);
182 	}
183 
184 	ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
185 	if (ret) {
186 		dev_err(&pdev->dev, "%s() Error enabling pcnoc_sway_clk: %d\n",
187 				__func__, ret);
188 		return ret;
189 	}
190 
191 	return 0;
192 }
193 
194 static int apq8016_lpass_exit(struct platform_device *pdev)
195 {
196 	struct lpass_data *drvdata = platform_get_drvdata(pdev);
197 
198 	clk_disable_unprepare(drvdata->pcnoc_mport_clk);
199 	clk_disable_unprepare(drvdata->pcnoc_sway_clk);
200 
201 	return 0;
202 }
203 
204 
205 static struct lpass_variant apq8016_data = {
206 	.i2sctrl_reg_base	= 0x1000,
207 	.i2sctrl_reg_stride	= 0x1000,
208 	.i2s_ports		= 4,
209 	.irq_reg_base		= 0x6000,
210 	.irq_reg_stride		= 0x1000,
211 	.irq_ports		= 3,
212 	.rdma_reg_base		= 0x8400,
213 	.rdma_reg_stride	= 0x1000,
214 	.rdma_channels		= 2,
215 	.rdmactl_audif_start	= 1,
216 	.dai_driver		= apq8016_lpass_cpu_dai_driver,
217 	.num_dai		= ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
218 	.init			= apq8016_lpass_init,
219 	.exit			= apq8016_lpass_exit,
220 	.alloc_dma_channel	= apq8016_lpass_alloc_dma_channel,
221 	.free_dma_channel	= apq8016_lpass_free_dma_channel,
222 };
223 
224 static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
225 	{ .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
226 	{}
227 };
228 MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id);
229 
230 static struct platform_driver apq8016_lpass_cpu_platform_driver = {
231 	.driver	= {
232 		.name		= "apq8016-lpass-cpu",
233 		.of_match_table	= of_match_ptr(apq8016_lpass_cpu_device_id),
234 	},
235 	.probe	= asoc_qcom_lpass_cpu_platform_probe,
236 	.remove	= asoc_qcom_lpass_cpu_platform_remove,
237 };
238 module_platform_driver(apq8016_lpass_cpu_platform_driver);
239 
240 MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
241 MODULE_LICENSE("GPL v2");
242 
243