xref: /openbmc/linux/sound/soc/pxa/pxa2xx-i2s.c (revision 081b355d) 
1 /*
2  * pxa2xx-i2s.c  --  ALSA Soc Audio Layer
3  *
4  * Copyright 2005 Wolfson Microelectronics PLC.
5  * Author: Liam Girdwood
6  *         liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  */
13 
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/delay.h>
18 #include <linux/clk.h>
19 #include <linux/platform_device.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/initval.h>
23 #include <sound/soc.h>
24 
25 #include <mach/hardware.h>
26 #include <mach/pxa-regs.h>
27 #include <mach/pxa2xx-gpio.h>
28 #include <mach/audio.h>
29 
30 #include "pxa2xx-pcm.h"
31 #include "pxa2xx-i2s.h"
32 
33 struct pxa_i2s_port {
34 	u32 sadiv;
35 	u32 sacr0;
36 	u32 sacr1;
37 	u32 saimr;
38 	int master;
39 	u32 fmt;
40 };
41 static struct pxa_i2s_port pxa_i2s;
42 static struct clk *clk_i2s;
43 
44 static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = {
45 	.name			= "I2S PCM Stereo out",
46 	.dev_addr		= __PREG(SADR),
47 	.drcmr			= &DRCMRTXSADR,
48 	.dcmd			= DCMD_INCSRCADDR | DCMD_FLOWTRG |
49 				  DCMD_BURST32 | DCMD_WIDTH4,
50 };
51 
52 static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_in = {
53 	.name			= "I2S PCM Stereo in",
54 	.dev_addr		= __PREG(SADR),
55 	.drcmr			= &DRCMRRXSADR,
56 	.dcmd			= DCMD_INCTRGADDR | DCMD_FLOWSRC |
57 				  DCMD_BURST32 | DCMD_WIDTH4,
58 };
59 
60 static struct pxa2xx_gpio gpio_bus[] = {
61 	{ /* I2S SoC Slave */
62 		.rx = GPIO29_SDATA_IN_I2S_MD,
63 		.tx = GPIO30_SDATA_OUT_I2S_MD,
64 		.clk = GPIO28_BITCLK_IN_I2S_MD,
65 		.frm = GPIO31_SYNC_I2S_MD,
66 	},
67 	{ /* I2S SoC Master */
68 		.rx = GPIO29_SDATA_IN_I2S_MD,
69 		.tx = GPIO30_SDATA_OUT_I2S_MD,
70 		.clk = GPIO28_BITCLK_OUT_I2S_MD,
71 		.frm = GPIO31_SYNC_I2S_MD,
72 	},
73 };
74 
75 static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream)
76 {
77 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
78 	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
79 
80 	if (IS_ERR(clk_i2s))
81 		return PTR_ERR(clk_i2s);
82 
83 	if (!cpu_dai->active) {
84 		SACR0 |= SACR0_RST;
85 		SACR0 = 0;
86 	}
87 
88 	return 0;
89 }
90 
91 /* wait for I2S controller to be ready */
92 static int pxa_i2s_wait(void)
93 {
94 	int i;
95 
96 	/* flush the Rx FIFO */
97 	for(i = 0; i < 16; i++)
98 		SADR;
99 	return 0;
100 }
101 
102 static int pxa2xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
103 		unsigned int fmt)
104 {
105 	/* interface format */
106 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
107 	case SND_SOC_DAIFMT_I2S:
108 		pxa_i2s.fmt = 0;
109 		break;
110 	case SND_SOC_DAIFMT_LEFT_J:
111 		pxa_i2s.fmt = SACR1_AMSL;
112 		break;
113 	}
114 
115 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
116 	case SND_SOC_DAIFMT_CBS_CFS:
117 		pxa_i2s.master = 1;
118 		break;
119 	case SND_SOC_DAIFMT_CBM_CFS:
120 		pxa_i2s.master = 0;
121 		break;
122 	default:
123 		break;
124 	}
125 	return 0;
126 }
127 
128 static int pxa2xx_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
129 		int clk_id, unsigned int freq, int dir)
130 {
131 	if (clk_id != PXA2XX_I2S_SYSCLK)
132 		return -ENODEV;
133 
134 	if (pxa_i2s.master && dir == SND_SOC_CLOCK_OUT)
135 		pxa_gpio_mode(gpio_bus[pxa_i2s.master].sys);
136 
137 	return 0;
138 }
139 
140 static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
141 				struct snd_pcm_hw_params *params)
142 {
143 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
144 	struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
145 
146 	pxa_gpio_mode(gpio_bus[pxa_i2s.master].rx);
147 	pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
148 	pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
149 	pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
150 	BUG_ON(IS_ERR(clk_i2s));
151 	clk_enable(clk_i2s);
152 	pxa_i2s_wait();
153 
154 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
155 		cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_out;
156 	else
157 		cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_in;
158 
159 	/* is port used by another stream */
160 	if (!(SACR0 & SACR0_ENB)) {
161 
162 		SACR0 = 0;
163 		SACR1 = 0;
164 		if (pxa_i2s.master)
165 			SACR0 |= SACR0_BCKD;
166 
167 		SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1);
168 		SACR1 |= pxa_i2s.fmt;
169 	}
170 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
171 		SAIMR |= SAIMR_TFS;
172 	else
173 		SAIMR |= SAIMR_RFS;
174 
175 	switch (params_rate(params)) {
176 	case 8000:
177 		SADIV = 0x48;
178 		break;
179 	case 11025:
180 		SADIV = 0x34;
181 		break;
182 	case 16000:
183 		SADIV = 0x24;
184 		break;
185 	case 22050:
186 		SADIV = 0x1a;
187 		break;
188 	case 44100:
189 		SADIV = 0xd;
190 		break;
191 	case 48000:
192 		SADIV = 0xc;
193 		break;
194 	case 96000: /* not in manual and possibly slightly inaccurate */
195 		SADIV = 0x6;
196 		break;
197 	}
198 
199 	return 0;
200 }
201 
202 static int pxa2xx_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
203 {
204 	int ret = 0;
205 
206 	switch (cmd) {
207 	case SNDRV_PCM_TRIGGER_START:
208 		SACR0 |= SACR0_ENB;
209 		break;
210 	case SNDRV_PCM_TRIGGER_RESUME:
211 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
212 	case SNDRV_PCM_TRIGGER_STOP:
213 	case SNDRV_PCM_TRIGGER_SUSPEND:
214 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
215 		break;
216 	default:
217 		ret = -EINVAL;
218 	}
219 
220 	return ret;
221 }
222 
223 static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream)
224 {
225 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
226 		SACR1 |= SACR1_DRPL;
227 		SAIMR &= ~SAIMR_TFS;
228 	} else {
229 		SACR1 |= SACR1_DREC;
230 		SAIMR &= ~SAIMR_RFS;
231 	}
232 
233 	if (SACR1 & (SACR1_DREC | SACR1_DRPL)) {
234 		SACR0 &= ~SACR0_ENB;
235 		pxa_i2s_wait();
236 		clk_disable(clk_i2s);
237 	}
238 
239 	clk_put(clk_i2s);
240 }
241 
242 #ifdef CONFIG_PM
243 static int pxa2xx_i2s_suspend(struct platform_device *dev,
244 	struct snd_soc_dai *dai)
245 {
246 	if (!dai->active)
247 		return 0;
248 
249 	/* store registers */
250 	pxa_i2s.sacr0 = SACR0;
251 	pxa_i2s.sacr1 = SACR1;
252 	pxa_i2s.saimr = SAIMR;
253 	pxa_i2s.sadiv = SADIV;
254 
255 	/* deactivate link */
256 	SACR0 &= ~SACR0_ENB;
257 	pxa_i2s_wait();
258 	return 0;
259 }
260 
261 static int pxa2xx_i2s_resume(struct platform_device *pdev,
262 	struct snd_soc_dai *dai)
263 {
264 	if (!dai->active)
265 		return 0;
266 
267 	pxa_i2s_wait();
268 
269 	SACR0 = pxa_i2s.sacr0 &= ~SACR0_ENB;
270 	SACR1 = pxa_i2s.sacr1;
271 	SAIMR = pxa_i2s.saimr;
272 	SADIV = pxa_i2s.sadiv;
273 	SACR0 |= SACR0_ENB;
274 
275 	return 0;
276 }
277 
278 #else
279 #define pxa2xx_i2s_suspend	NULL
280 #define pxa2xx_i2s_resume	NULL
281 #endif
282 
283 #define PXA2XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
284 		SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
285 		SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
286 
287 struct snd_soc_dai pxa_i2s_dai = {
288 	.name = "pxa2xx-i2s",
289 	.id = 0,
290 	.type = SND_SOC_DAI_I2S,
291 	.suspend = pxa2xx_i2s_suspend,
292 	.resume = pxa2xx_i2s_resume,
293 	.playback = {
294 		.channels_min = 2,
295 		.channels_max = 2,
296 		.rates = PXA2XX_I2S_RATES,
297 		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
298 	.capture = {
299 		.channels_min = 2,
300 		.channels_max = 2,
301 		.rates = PXA2XX_I2S_RATES,
302 		.formats = SNDRV_PCM_FMTBIT_S16_LE,},
303 	.ops = {
304 		.startup = pxa2xx_i2s_startup,
305 		.shutdown = pxa2xx_i2s_shutdown,
306 		.trigger = pxa2xx_i2s_trigger,
307 		.hw_params = pxa2xx_i2s_hw_params,},
308 	.dai_ops = {
309 		.set_fmt = pxa2xx_i2s_set_dai_fmt,
310 		.set_sysclk = pxa2xx_i2s_set_dai_sysclk,
311 	},
312 };
313 
314 EXPORT_SYMBOL_GPL(pxa_i2s_dai);
315 
316 static int pxa2xx_i2s_probe(struct platform_device *dev)
317 {
318 	clk_i2s = clk_get(&dev->dev, "I2SCLK");
319 	return IS_ERR(clk_i2s) ? PTR_ERR(clk_i2s) : 0;
320 }
321 
322 static int __devexit pxa2xx_i2s_remove(struct platform_device *dev)
323 {
324 	clk_put(clk_i2s);
325 	clk_i2s = ERR_PTR(-ENOENT);
326 	return 0;
327 }
328 
329 static struct platform_driver pxa2xx_i2s_driver = {
330 	.probe = pxa2xx_i2s_probe,
331 	.remove = __devexit_p(pxa2xx_i2s_remove),
332 
333 	.driver = {
334 		.name = "pxa2xx-i2s",
335 		.owner = THIS_MODULE,
336 	},
337 };
338 
339 static int __init pxa2xx_i2s_init(void)
340 {
341 	if (cpu_is_pxa27x())
342 		gpio_bus[1].sys = GPIO113_I2S_SYSCLK_MD;
343 	else
344 		gpio_bus[1].sys = GPIO32_SYSCLK_I2S_MD;
345 
346 	clk_i2s = ERR_PTR(-ENOENT);
347 	return platform_driver_register(&pxa2xx_i2s_driver);
348 }
349 
350 static void __exit pxa2xx_i2s_exit(void)
351 {
352 	platform_driver_unregister(&pxa2xx_i2s_driver);
353 }
354 
355 module_init(pxa2xx_i2s_init);
356 module_exit(pxa2xx_i2s_exit);
357 
358 /* Module information */
359 MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com");
360 MODULE_DESCRIPTION("pxa2xx I2S SoC Interface");
361 MODULE_LICENSE("GPL");
362