xref: /openbmc/linux/sound/soc/meson/axg-tdmout.c (revision 9b93eb47)
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright (c) 2018 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
5 
6 #include <linux/module.h>
7 #include <linux/of_platform.h>
8 #include <linux/regmap.h>
9 #include <sound/soc.h>
10 #include <sound/soc-dai.h>
11 
12 #include "axg-tdm-formatter.h"
13 
14 #define TDMOUT_CTRL0			0x00
15 #define  TDMOUT_CTRL0_BITNUM_MASK	GENMASK(4, 0)
16 #define  TDMOUT_CTRL0_BITNUM(x)		((x) << 0)
17 #define  TDMOUT_CTRL0_SLOTNUM_MASK	GENMASK(9, 5)
18 #define  TDMOUT_CTRL0_SLOTNUM(x)	((x) << 5)
19 #define  TDMOUT_CTRL0_INIT_BITNUM_MASK	GENMASK(19, 15)
20 #define  TDMOUT_CTRL0_INIT_BITNUM(x)	((x) << 15)
21 #define  TDMOUT_CTRL0_ENABLE		BIT(31)
22 #define  TDMOUT_CTRL0_RST_OUT		BIT(29)
23 #define  TDMOUT_CTRL0_RST_IN		BIT(28)
24 #define TDMOUT_CTRL1			0x04
25 #define  TDMOUT_CTRL1_TYPE_MASK		GENMASK(6, 4)
26 #define  TDMOUT_CTRL1_TYPE(x)		((x) << 4)
27 #define  TDMOUT_CTRL1_MSB_POS_MASK	GENMASK(12, 8)
28 #define  TDMOUT_CTRL1_MSB_POS(x)	((x) << 8)
29 #define  TDMOUT_CTRL1_SEL_SHIFT		24
30 #define  TDMOUT_CTRL1_GAIN_EN		26
31 #define  TDMOUT_CTRL1_WS_INV		BIT(28)
32 #define TDMOUT_SWAP			0x08
33 #define TDMOUT_MASK0			0x0c
34 #define TDMOUT_MASK1			0x10
35 #define TDMOUT_MASK2			0x14
36 #define TDMOUT_MASK3			0x18
37 #define TDMOUT_STAT			0x1c
38 #define TDMOUT_GAIN0			0x20
39 #define TDMOUT_GAIN1			0x24
40 #define TDMOUT_MUTE_VAL			0x28
41 #define TDMOUT_MUTE0			0x2c
42 #define TDMOUT_MUTE1			0x30
43 #define TDMOUT_MUTE2			0x34
44 #define TDMOUT_MUTE3			0x38
45 #define TDMOUT_MASK_VAL			0x3c
46 
47 static const struct regmap_config axg_tdmout_regmap_cfg = {
48 	.reg_bits	= 32,
49 	.val_bits	= 32,
50 	.reg_stride	= 4,
51 	.max_register	= TDMOUT_MASK_VAL,
52 };
53 
54 static const struct snd_kcontrol_new axg_tdmout_controls[] = {
55 	SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0,  0,  8, 255, 0),
56 	SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
57 	SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1,  0,  8, 255, 0),
58 	SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
59 	SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
60 		   TDMOUT_CTRL1_GAIN_EN, 1, 0),
61 };
62 
63 static const char * const tdmout_sel_texts[] = {
64 	"IN 0", "IN 1", "IN 2",
65 };
66 
67 static SOC_ENUM_SINGLE_DECL(axg_tdmout_sel_enum, TDMOUT_CTRL1,
68 			    TDMOUT_CTRL1_SEL_SHIFT, tdmout_sel_texts);
69 
70 static const struct snd_kcontrol_new axg_tdmout_in_mux =
71 	SOC_DAPM_ENUM("Input Source", axg_tdmout_sel_enum);
72 
73 static struct snd_soc_dai *
74 axg_tdmout_get_be(struct snd_soc_dapm_widget *w)
75 {
76 	struct snd_soc_dapm_path *p = NULL;
77 	struct snd_soc_dai *be;
78 
79 	snd_soc_dapm_widget_for_each_sink_path(w, p) {
80 		if (!p->connect)
81 			continue;
82 
83 		if (p->sink->id == snd_soc_dapm_dai_in)
84 			return (struct snd_soc_dai *)p->sink->priv;
85 
86 		be = axg_tdmout_get_be(p->sink);
87 		if (be)
88 			return be;
89 	}
90 
91 	return NULL;
92 }
93 
94 static struct axg_tdm_stream *
95 axg_tdmout_get_tdm_stream(struct snd_soc_dapm_widget *w)
96 {
97 	struct snd_soc_dai *be = axg_tdmout_get_be(w);
98 
99 	if (!be)
100 		return NULL;
101 
102 	return be->playback_dma_data;
103 }
104 
105 static void axg_tdmout_enable(struct regmap *map)
106 {
107 	/* Apply both reset */
108 	regmap_update_bits(map, TDMOUT_CTRL0,
109 			   TDMOUT_CTRL0_RST_OUT | TDMOUT_CTRL0_RST_IN, 0);
110 
111 	/* Clear out reset before in reset */
112 	regmap_update_bits(map, TDMOUT_CTRL0,
113 			   TDMOUT_CTRL0_RST_OUT, TDMOUT_CTRL0_RST_OUT);
114 	regmap_update_bits(map, TDMOUT_CTRL0,
115 			   TDMOUT_CTRL0_RST_IN,  TDMOUT_CTRL0_RST_IN);
116 
117 	/* Actually enable tdmout */
118 	regmap_update_bits(map, TDMOUT_CTRL0,
119 			   TDMOUT_CTRL0_ENABLE, TDMOUT_CTRL0_ENABLE);
120 }
121 
122 static void axg_tdmout_disable(struct regmap *map)
123 {
124 	regmap_update_bits(map, TDMOUT_CTRL0, TDMOUT_CTRL0_ENABLE, 0);
125 }
126 
127 static int axg_tdmout_prepare(struct regmap *map,
128 			      const struct axg_tdm_formatter_hw *quirks,
129 			      struct axg_tdm_stream *ts)
130 {
131 	unsigned int val, skew = quirks->skew_offset;
132 
133 	/* Set the stream skew */
134 	switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
135 	case SND_SOC_DAIFMT_I2S:
136 	case SND_SOC_DAIFMT_DSP_A:
137 		break;
138 
139 	case SND_SOC_DAIFMT_LEFT_J:
140 	case SND_SOC_DAIFMT_RIGHT_J:
141 	case SND_SOC_DAIFMT_DSP_B:
142 		skew += 1;
143 		break;
144 
145 	default:
146 		pr_err("Unsupported format: %u\n",
147 		       ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
148 		return -EINVAL;
149 	}
150 
151 	val = TDMOUT_CTRL0_INIT_BITNUM(skew);
152 
153 	/* Set the slot width */
154 	val |= TDMOUT_CTRL0_BITNUM(ts->iface->slot_width - 1);
155 
156 	/* Set the slot number */
157 	val |= TDMOUT_CTRL0_SLOTNUM(ts->iface->slots - 1);
158 
159 	regmap_update_bits(map, TDMOUT_CTRL0,
160 			   TDMOUT_CTRL0_INIT_BITNUM_MASK |
161 			   TDMOUT_CTRL0_BITNUM_MASK |
162 			   TDMOUT_CTRL0_SLOTNUM_MASK, val);
163 
164 	/* Set the sample width */
165 	val = TDMOUT_CTRL1_MSB_POS(ts->width - 1);
166 
167 	/* FIFO data are arranged in chunks of 64bits */
168 	switch (ts->physical_width) {
169 	case 8:
170 		/* 8 samples of 8 bits */
171 		val |= TDMOUT_CTRL1_TYPE(0);
172 		break;
173 	case 16:
174 		/* 4 samples of 16 bits - right justified */
175 		val |= TDMOUT_CTRL1_TYPE(2);
176 		break;
177 	case 32:
178 		/* 2 samples of 32 bits - right justified */
179 		val |= TDMOUT_CTRL1_TYPE(4);
180 		break;
181 	default:
182 		pr_err("Unsupported physical width: %u\n",
183 		       ts->physical_width);
184 		return -EINVAL;
185 	}
186 
187 	/* If the sample clock is inverted, invert it back for the formatter */
188 	if (axg_tdm_lrclk_invert(ts->iface->fmt))
189 		val |= TDMOUT_CTRL1_WS_INV;
190 
191 	regmap_update_bits(map, TDMOUT_CTRL1,
192 			   (TDMOUT_CTRL1_TYPE_MASK | TDMOUT_CTRL1_MSB_POS_MASK |
193 			    TDMOUT_CTRL1_WS_INV), val);
194 
195 	/* Set static swap mask configuration */
196 	regmap_write(map, TDMOUT_SWAP, 0x76543210);
197 
198 	return axg_tdm_formatter_set_channel_masks(map, ts, TDMOUT_MASK0);
199 }
200 
201 static const struct snd_soc_dapm_widget axg_tdmout_dapm_widgets[] = {
202 	SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
203 	SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
204 	SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
205 	SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmout_in_mux),
206 	SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
207 			   axg_tdm_formatter_event,
208 			   (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
209 	SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
210 };
211 
212 static const struct snd_soc_dapm_route axg_tdmout_dapm_routes[] = {
213 	{ "SRC SEL", "IN 0", "IN 0" },
214 	{ "SRC SEL", "IN 1", "IN 1" },
215 	{ "SRC SEL", "IN 2", "IN 2" },
216 	{ "ENC", NULL, "SRC SEL" },
217 	{ "OUT", NULL, "ENC" },
218 };
219 
220 static const struct snd_soc_component_driver axg_tdmout_component_drv = {
221 	.controls		= axg_tdmout_controls,
222 	.num_controls		= ARRAY_SIZE(axg_tdmout_controls),
223 	.dapm_widgets		= axg_tdmout_dapm_widgets,
224 	.num_dapm_widgets	= ARRAY_SIZE(axg_tdmout_dapm_widgets),
225 	.dapm_routes		= axg_tdmout_dapm_routes,
226 	.num_dapm_routes	= ARRAY_SIZE(axg_tdmout_dapm_routes),
227 };
228 
229 static const struct axg_tdm_formatter_ops axg_tdmout_ops = {
230 	.get_stream	= axg_tdmout_get_tdm_stream,
231 	.prepare	= axg_tdmout_prepare,
232 	.enable		= axg_tdmout_enable,
233 	.disable	= axg_tdmout_disable,
234 };
235 
236 static const struct axg_tdm_formatter_driver axg_tdmout_drv = {
237 	.component_drv	= &axg_tdmout_component_drv,
238 	.regmap_cfg	= &axg_tdmout_regmap_cfg,
239 	.ops		= &axg_tdmout_ops,
240 	.quirks		= &(const struct axg_tdm_formatter_hw) {
241 		.invert_sclk = true,
242 		.skew_offset = 1,
243 	},
244 };
245 
246 static const struct axg_tdm_formatter_driver g12a_tdmout_drv = {
247 	.component_drv	= &axg_tdmout_component_drv,
248 	.regmap_cfg	= &axg_tdmout_regmap_cfg,
249 	.ops		= &axg_tdmout_ops,
250 	.quirks		= &(const struct axg_tdm_formatter_hw) {
251 		.invert_sclk = true,
252 		.skew_offset = 2,
253 	},
254 };
255 
256 static const struct of_device_id axg_tdmout_of_match[] = {
257 	{
258 		.compatible = "amlogic,axg-tdmout",
259 		.data = &axg_tdmout_drv,
260 	}, {
261 		.compatible = "amlogic,g12a-tdmout",
262 		.data = &g12a_tdmout_drv,
263 	}, {}
264 };
265 MODULE_DEVICE_TABLE(of, axg_tdmout_of_match);
266 
267 static struct platform_driver axg_tdmout_pdrv = {
268 	.probe = axg_tdm_formatter_probe,
269 	.driver = {
270 		.name = "axg-tdmout",
271 		.of_match_table = axg_tdmout_of_match,
272 	},
273 };
274 module_platform_driver(axg_tdmout_pdrv);
275 
276 MODULE_DESCRIPTION("Amlogic AXG TDM output formatter driver");
277 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
278 MODULE_LICENSE("GPL v2");
279