1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 // 3 // Copyright (c) 2018 BayLibre, SAS. 4 // Author: Jerome Brunet <jbrunet@baylibre.com> 5 6 #include <linux/module.h> 7 #include <linux/of_platform.h> 8 #include <linux/regmap.h> 9 #include <sound/soc.h> 10 #include <sound/soc-dai.h> 11 12 #include "axg-tdm-formatter.h" 13 14 #define TDMOUT_CTRL0 0x00 15 #define TDMOUT_CTRL0_BITNUM_MASK GENMASK(4, 0) 16 #define TDMOUT_CTRL0_BITNUM(x) ((x) << 0) 17 #define TDMOUT_CTRL0_SLOTNUM_MASK GENMASK(9, 5) 18 #define TDMOUT_CTRL0_SLOTNUM(x) ((x) << 5) 19 #define TDMOUT_CTRL0_INIT_BITNUM_MASK GENMASK(19, 15) 20 #define TDMOUT_CTRL0_INIT_BITNUM(x) ((x) << 15) 21 #define TDMOUT_CTRL0_ENABLE BIT(31) 22 #define TDMOUT_CTRL0_RST_OUT BIT(29) 23 #define TDMOUT_CTRL0_RST_IN BIT(28) 24 #define TDMOUT_CTRL1 0x04 25 #define TDMOUT_CTRL1_TYPE_MASK GENMASK(6, 4) 26 #define TDMOUT_CTRL1_TYPE(x) ((x) << 4) 27 #define TDMOUT_CTRL1_MSB_POS_MASK GENMASK(12, 8) 28 #define TDMOUT_CTRL1_MSB_POS(x) ((x) << 8) 29 #define TDMOUT_CTRL1_SEL_SHIFT 24 30 #define TDMOUT_CTRL1_GAIN_EN 26 31 #define TDMOUT_CTRL1_WS_INV BIT(28) 32 #define TDMOUT_SWAP 0x08 33 #define TDMOUT_MASK0 0x0c 34 #define TDMOUT_MASK1 0x10 35 #define TDMOUT_MASK2 0x14 36 #define TDMOUT_MASK3 0x18 37 #define TDMOUT_STAT 0x1c 38 #define TDMOUT_GAIN0 0x20 39 #define TDMOUT_GAIN1 0x24 40 #define TDMOUT_MUTE_VAL 0x28 41 #define TDMOUT_MUTE0 0x2c 42 #define TDMOUT_MUTE1 0x30 43 #define TDMOUT_MUTE2 0x34 44 #define TDMOUT_MUTE3 0x38 45 #define TDMOUT_MASK_VAL 0x3c 46 47 static const struct regmap_config axg_tdmout_regmap_cfg = { 48 .reg_bits = 32, 49 .val_bits = 32, 50 .reg_stride = 4, 51 .max_register = TDMOUT_MASK_VAL, 52 }; 53 54 static const struct snd_kcontrol_new axg_tdmout_controls[] = { 55 SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0, 0, 8, 255, 0), 56 SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0), 57 SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1, 0, 8, 255, 0), 58 SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0), 59 SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1, 60 TDMOUT_CTRL1_GAIN_EN, 1, 0), 61 }; 62 63 static const char * const tdmout_sel_texts[] = { 64 "IN 0", "IN 1", "IN 2", 65 }; 66 67 static SOC_ENUM_SINGLE_DECL(axg_tdmout_sel_enum, TDMOUT_CTRL1, 68 TDMOUT_CTRL1_SEL_SHIFT, tdmout_sel_texts); 69 70 static const struct snd_kcontrol_new axg_tdmout_in_mux = 71 SOC_DAPM_ENUM("Input Source", axg_tdmout_sel_enum); 72 73 static struct snd_soc_dai * 74 axg_tdmout_get_be(struct snd_soc_dapm_widget *w) 75 { 76 struct snd_soc_dapm_path *p = NULL; 77 struct snd_soc_dai *be; 78 79 snd_soc_dapm_widget_for_each_sink_path(w, p) { 80 if (!p->connect) 81 continue; 82 83 if (p->sink->id == snd_soc_dapm_dai_in) 84 return (struct snd_soc_dai *)p->sink->priv; 85 86 be = axg_tdmout_get_be(p->sink); 87 if (be) 88 return be; 89 } 90 91 return NULL; 92 } 93 94 static struct axg_tdm_stream * 95 axg_tdmout_get_tdm_stream(struct snd_soc_dapm_widget *w) 96 { 97 struct snd_soc_dai *be = axg_tdmout_get_be(w); 98 99 if (!be) 100 return NULL; 101 102 return be->playback_dma_data; 103 } 104 105 static void axg_tdmout_enable(struct regmap *map) 106 { 107 /* Apply both reset */ 108 regmap_update_bits(map, TDMOUT_CTRL0, 109 TDMOUT_CTRL0_RST_OUT | TDMOUT_CTRL0_RST_IN, 0); 110 111 /* Clear out reset before in reset */ 112 regmap_update_bits(map, TDMOUT_CTRL0, 113 TDMOUT_CTRL0_RST_OUT, TDMOUT_CTRL0_RST_OUT); 114 regmap_update_bits(map, TDMOUT_CTRL0, 115 TDMOUT_CTRL0_RST_IN, TDMOUT_CTRL0_RST_IN); 116 117 /* Actually enable tdmout */ 118 regmap_update_bits(map, TDMOUT_CTRL0, 119 TDMOUT_CTRL0_ENABLE, TDMOUT_CTRL0_ENABLE); 120 } 121 122 static void axg_tdmout_disable(struct regmap *map) 123 { 124 regmap_update_bits(map, TDMOUT_CTRL0, TDMOUT_CTRL0_ENABLE, 0); 125 } 126 127 static int axg_tdmout_prepare(struct regmap *map, struct axg_tdm_stream *ts) 128 { 129 unsigned int val = 0; 130 131 /* Set the stream skew */ 132 switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 133 case SND_SOC_DAIFMT_I2S: 134 case SND_SOC_DAIFMT_DSP_A: 135 val |= TDMOUT_CTRL0_INIT_BITNUM(1); 136 break; 137 138 case SND_SOC_DAIFMT_LEFT_J: 139 case SND_SOC_DAIFMT_RIGHT_J: 140 case SND_SOC_DAIFMT_DSP_B: 141 val |= TDMOUT_CTRL0_INIT_BITNUM(2); 142 break; 143 144 default: 145 pr_err("Unsupported format: %u\n", 146 ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK); 147 return -EINVAL; 148 } 149 150 /* Set the slot width */ 151 val |= TDMOUT_CTRL0_BITNUM(ts->iface->slot_width - 1); 152 153 /* Set the slot number */ 154 val |= TDMOUT_CTRL0_SLOTNUM(ts->iface->slots - 1); 155 156 regmap_update_bits(map, TDMOUT_CTRL0, 157 TDMOUT_CTRL0_INIT_BITNUM_MASK | 158 TDMOUT_CTRL0_BITNUM_MASK | 159 TDMOUT_CTRL0_SLOTNUM_MASK, val); 160 161 /* Set the sample width */ 162 val = TDMOUT_CTRL1_MSB_POS(ts->width - 1); 163 164 /* FIFO data are arranged in chunks of 64bits */ 165 switch (ts->physical_width) { 166 case 8: 167 /* 8 samples of 8 bits */ 168 val |= TDMOUT_CTRL1_TYPE(0); 169 break; 170 case 16: 171 /* 4 samples of 16 bits - right justified */ 172 val |= TDMOUT_CTRL1_TYPE(2); 173 break; 174 case 32: 175 /* 2 samples of 32 bits - right justified */ 176 val |= TDMOUT_CTRL1_TYPE(4); 177 break; 178 default: 179 pr_err("Unsupported physical width: %u\n", 180 ts->physical_width); 181 return -EINVAL; 182 } 183 184 /* If the sample clock is inverted, invert it back for the formatter */ 185 if (axg_tdm_lrclk_invert(ts->iface->fmt)) 186 val |= TDMOUT_CTRL1_WS_INV; 187 188 regmap_update_bits(map, TDMOUT_CTRL1, 189 (TDMOUT_CTRL1_TYPE_MASK | TDMOUT_CTRL1_MSB_POS_MASK | 190 TDMOUT_CTRL1_WS_INV), val); 191 192 /* Set static swap mask configuration */ 193 regmap_write(map, TDMOUT_SWAP, 0x76543210); 194 195 return axg_tdm_formatter_set_channel_masks(map, ts, TDMOUT_MASK0); 196 } 197 198 static const struct snd_soc_dapm_widget axg_tdmout_dapm_widgets[] = { 199 SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0), 200 SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0), 201 SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0), 202 SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmout_in_mux), 203 SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0, 204 axg_tdm_formatter_event, 205 (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)), 206 SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0), 207 }; 208 209 static const struct snd_soc_dapm_route axg_tdmout_dapm_routes[] = { 210 { "SRC SEL", "IN 0", "IN 0" }, 211 { "SRC SEL", "IN 1", "IN 1" }, 212 { "SRC SEL", "IN 2", "IN 2" }, 213 { "ENC", NULL, "SRC SEL" }, 214 { "OUT", NULL, "ENC" }, 215 }; 216 217 static const struct snd_soc_component_driver axg_tdmout_component_drv = { 218 .controls = axg_tdmout_controls, 219 .num_controls = ARRAY_SIZE(axg_tdmout_controls), 220 .dapm_widgets = axg_tdmout_dapm_widgets, 221 .num_dapm_widgets = ARRAY_SIZE(axg_tdmout_dapm_widgets), 222 .dapm_routes = axg_tdmout_dapm_routes, 223 .num_dapm_routes = ARRAY_SIZE(axg_tdmout_dapm_routes), 224 }; 225 226 static const struct axg_tdm_formatter_ops axg_tdmout_ops = { 227 .get_stream = axg_tdmout_get_tdm_stream, 228 .prepare = axg_tdmout_prepare, 229 .enable = axg_tdmout_enable, 230 .disable = axg_tdmout_disable, 231 }; 232 233 static const struct axg_tdm_formatter_driver axg_tdmout_drv = { 234 .component_drv = &axg_tdmout_component_drv, 235 .regmap_cfg = &axg_tdmout_regmap_cfg, 236 .ops = &axg_tdmout_ops, 237 .invert_sclk = true, 238 }; 239 240 static const struct of_device_id axg_tdmout_of_match[] = { 241 { 242 .compatible = "amlogic,axg-tdmout", 243 .data = &axg_tdmout_drv, 244 }, {} 245 }; 246 MODULE_DEVICE_TABLE(of, axg_tdmout_of_match); 247 248 static struct platform_driver axg_tdmout_pdrv = { 249 .probe = axg_tdm_formatter_probe, 250 .driver = { 251 .name = "axg-tdmout", 252 .of_match_table = axg_tdmout_of_match, 253 }, 254 }; 255 module_platform_driver(axg_tdmout_pdrv); 256 257 MODULE_DESCRIPTION("Amlogic AXG TDM output formatter driver"); 258 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>"); 259 MODULE_LICENSE("GPL v2"); 260