xref: /openbmc/linux/sound/soc/meson/axg-tdmout.c (revision c765ceda)
1c41c2a35SJerome Brunet // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2c41c2a35SJerome Brunet //
3c41c2a35SJerome Brunet // Copyright (c) 2018 BayLibre, SAS.
4c41c2a35SJerome Brunet // Author: Jerome Brunet <jbrunet@baylibre.com>
5c41c2a35SJerome Brunet 
6c41c2a35SJerome Brunet #include <linux/module.h>
7c41c2a35SJerome Brunet #include <linux/of_platform.h>
8c41c2a35SJerome Brunet #include <linux/regmap.h>
9c41c2a35SJerome Brunet #include <sound/soc.h>
10c41c2a35SJerome Brunet #include <sound/soc-dai.h>
11c41c2a35SJerome Brunet 
12c41c2a35SJerome Brunet #include "axg-tdm-formatter.h"
13c41c2a35SJerome Brunet 
14c41c2a35SJerome Brunet #define TDMOUT_CTRL0			0x00
15c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_BITNUM_MASK	GENMASK(4, 0)
16c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_BITNUM(x)		((x) << 0)
17c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_SLOTNUM_MASK	GENMASK(9, 5)
18c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_SLOTNUM(x)	((x) << 5)
19c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_INIT_BITNUM_MASK	GENMASK(19, 15)
20c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_INIT_BITNUM(x)	((x) << 15)
21c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_ENABLE		BIT(31)
22c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_RST_OUT		BIT(29)
23c41c2a35SJerome Brunet #define  TDMOUT_CTRL0_RST_IN		BIT(28)
24c41c2a35SJerome Brunet #define TDMOUT_CTRL1			0x04
25c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_TYPE_MASK		GENMASK(6, 4)
26c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_TYPE(x)		((x) << 4)
27329299d6SJerome Brunet #define  SM1_TDMOUT_CTRL1_GAIN_EN	7
28c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_MSB_POS_MASK	GENMASK(12, 8)
29c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_MSB_POS(x)	((x) << 8)
30c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_SEL_SHIFT		24
31c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_GAIN_EN		26
32c41c2a35SJerome Brunet #define  TDMOUT_CTRL1_WS_INV		BIT(28)
33c41c2a35SJerome Brunet #define TDMOUT_SWAP			0x08
34c41c2a35SJerome Brunet #define TDMOUT_MASK0			0x0c
35c41c2a35SJerome Brunet #define TDMOUT_MASK1			0x10
36c41c2a35SJerome Brunet #define TDMOUT_MASK2			0x14
37c41c2a35SJerome Brunet #define TDMOUT_MASK3			0x18
38c41c2a35SJerome Brunet #define TDMOUT_STAT			0x1c
39c41c2a35SJerome Brunet #define TDMOUT_GAIN0			0x20
40c41c2a35SJerome Brunet #define TDMOUT_GAIN1			0x24
41c41c2a35SJerome Brunet #define TDMOUT_MUTE_VAL			0x28
42c41c2a35SJerome Brunet #define TDMOUT_MUTE0			0x2c
43c41c2a35SJerome Brunet #define TDMOUT_MUTE1			0x30
44c41c2a35SJerome Brunet #define TDMOUT_MUTE2			0x34
45c41c2a35SJerome Brunet #define TDMOUT_MUTE3			0x38
46c41c2a35SJerome Brunet #define TDMOUT_MASK_VAL			0x3c
47c41c2a35SJerome Brunet 
48c41c2a35SJerome Brunet static const struct regmap_config axg_tdmout_regmap_cfg = {
49c41c2a35SJerome Brunet 	.reg_bits	= 32,
50c41c2a35SJerome Brunet 	.val_bits	= 32,
51c41c2a35SJerome Brunet 	.reg_stride	= 4,
52c41c2a35SJerome Brunet 	.max_register	= TDMOUT_MASK_VAL,
53c41c2a35SJerome Brunet };
54c41c2a35SJerome Brunet 
55c41c2a35SJerome Brunet static struct snd_soc_dai *
axg_tdmout_get_be(struct snd_soc_dapm_widget * w)56c41c2a35SJerome Brunet axg_tdmout_get_be(struct snd_soc_dapm_widget *w)
57c41c2a35SJerome Brunet {
5818efddeeSPierre-Louis Bossart 	struct snd_soc_dapm_path *p;
59c41c2a35SJerome Brunet 	struct snd_soc_dai *be;
60c41c2a35SJerome Brunet 
61c41c2a35SJerome Brunet 	snd_soc_dapm_widget_for_each_sink_path(w, p) {
62c41c2a35SJerome Brunet 		if (!p->connect)
63c41c2a35SJerome Brunet 			continue;
64c41c2a35SJerome Brunet 
65c41c2a35SJerome Brunet 		if (p->sink->id == snd_soc_dapm_dai_in)
66c41c2a35SJerome Brunet 			return (struct snd_soc_dai *)p->sink->priv;
67c41c2a35SJerome Brunet 
68c41c2a35SJerome Brunet 		be = axg_tdmout_get_be(p->sink);
69c41c2a35SJerome Brunet 		if (be)
70c41c2a35SJerome Brunet 			return be;
71c41c2a35SJerome Brunet 	}
72c41c2a35SJerome Brunet 
73c41c2a35SJerome Brunet 	return NULL;
74c41c2a35SJerome Brunet }
75c41c2a35SJerome Brunet 
76c41c2a35SJerome Brunet static struct axg_tdm_stream *
axg_tdmout_get_tdm_stream(struct snd_soc_dapm_widget * w)77c41c2a35SJerome Brunet axg_tdmout_get_tdm_stream(struct snd_soc_dapm_widget *w)
78c41c2a35SJerome Brunet {
79c41c2a35SJerome Brunet 	struct snd_soc_dai *be = axg_tdmout_get_be(w);
80c41c2a35SJerome Brunet 
81c41c2a35SJerome Brunet 	if (!be)
82c41c2a35SJerome Brunet 		return NULL;
83c41c2a35SJerome Brunet 
84*c765cedaSKuninori Morimoto 	return snd_soc_dai_dma_data_get_playback(be);
85c41c2a35SJerome Brunet }
86c41c2a35SJerome Brunet 
axg_tdmout_enable(struct regmap * map)87c41c2a35SJerome Brunet static void axg_tdmout_enable(struct regmap *map)
88c41c2a35SJerome Brunet {
89c41c2a35SJerome Brunet 	/* Apply both reset */
90c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL0,
91c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_RST_OUT | TDMOUT_CTRL0_RST_IN, 0);
92c41c2a35SJerome Brunet 
93c41c2a35SJerome Brunet 	/* Clear out reset before in reset */
94c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL0,
95c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_RST_OUT, TDMOUT_CTRL0_RST_OUT);
96c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL0,
97c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_RST_IN,  TDMOUT_CTRL0_RST_IN);
98c41c2a35SJerome Brunet 
99c41c2a35SJerome Brunet 	/* Actually enable tdmout */
100c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL0,
101c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_ENABLE, TDMOUT_CTRL0_ENABLE);
102c41c2a35SJerome Brunet }
103c41c2a35SJerome Brunet 
axg_tdmout_disable(struct regmap * map)104c41c2a35SJerome Brunet static void axg_tdmout_disable(struct regmap *map)
105c41c2a35SJerome Brunet {
106c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL0, TDMOUT_CTRL0_ENABLE, 0);
107c41c2a35SJerome Brunet }
108c41c2a35SJerome Brunet 
axg_tdmout_prepare(struct regmap * map,const struct axg_tdm_formatter_hw * quirks,struct axg_tdm_stream * ts)109f01bc67fSJerome Brunet static int axg_tdmout_prepare(struct regmap *map,
110f01bc67fSJerome Brunet 			      const struct axg_tdm_formatter_hw *quirks,
111f01bc67fSJerome Brunet 			      struct axg_tdm_stream *ts)
112c41c2a35SJerome Brunet {
113f01bc67fSJerome Brunet 	unsigned int val, skew = quirks->skew_offset;
114c41c2a35SJerome Brunet 
115c41c2a35SJerome Brunet 	/* Set the stream skew */
116c41c2a35SJerome Brunet 	switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
117c41c2a35SJerome Brunet 	case SND_SOC_DAIFMT_I2S:
118c41c2a35SJerome Brunet 	case SND_SOC_DAIFMT_DSP_A:
119c41c2a35SJerome Brunet 		break;
120c41c2a35SJerome Brunet 
121c41c2a35SJerome Brunet 	case SND_SOC_DAIFMT_LEFT_J:
122c41c2a35SJerome Brunet 	case SND_SOC_DAIFMT_DSP_B:
123f01bc67fSJerome Brunet 		skew += 1;
124c41c2a35SJerome Brunet 		break;
125c41c2a35SJerome Brunet 
126c41c2a35SJerome Brunet 	default:
127c41c2a35SJerome Brunet 		pr_err("Unsupported format: %u\n",
128c41c2a35SJerome Brunet 		       ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
129c41c2a35SJerome Brunet 		return -EINVAL;
130c41c2a35SJerome Brunet 	}
131c41c2a35SJerome Brunet 
132f01bc67fSJerome Brunet 	val = TDMOUT_CTRL0_INIT_BITNUM(skew);
133f01bc67fSJerome Brunet 
134c41c2a35SJerome Brunet 	/* Set the slot width */
135c41c2a35SJerome Brunet 	val |= TDMOUT_CTRL0_BITNUM(ts->iface->slot_width - 1);
136c41c2a35SJerome Brunet 
137c41c2a35SJerome Brunet 	/* Set the slot number */
138c41c2a35SJerome Brunet 	val |= TDMOUT_CTRL0_SLOTNUM(ts->iface->slots - 1);
139c41c2a35SJerome Brunet 
140c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL0,
141c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_INIT_BITNUM_MASK |
142c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_BITNUM_MASK |
143c41c2a35SJerome Brunet 			   TDMOUT_CTRL0_SLOTNUM_MASK, val);
144c41c2a35SJerome Brunet 
145c41c2a35SJerome Brunet 	/* Set the sample width */
146c41c2a35SJerome Brunet 	val = TDMOUT_CTRL1_MSB_POS(ts->width - 1);
147c41c2a35SJerome Brunet 
148c41c2a35SJerome Brunet 	/* FIFO data are arranged in chunks of 64bits */
149c41c2a35SJerome Brunet 	switch (ts->physical_width) {
150c41c2a35SJerome Brunet 	case 8:
151c41c2a35SJerome Brunet 		/* 8 samples of 8 bits */
152c41c2a35SJerome Brunet 		val |= TDMOUT_CTRL1_TYPE(0);
153c41c2a35SJerome Brunet 		break;
154c41c2a35SJerome Brunet 	case 16:
155c41c2a35SJerome Brunet 		/* 4 samples of 16 bits - right justified */
156c41c2a35SJerome Brunet 		val |= TDMOUT_CTRL1_TYPE(2);
157c41c2a35SJerome Brunet 		break;
158c41c2a35SJerome Brunet 	case 32:
159c41c2a35SJerome Brunet 		/* 2 samples of 32 bits - right justified */
160c41c2a35SJerome Brunet 		val |= TDMOUT_CTRL1_TYPE(4);
161c41c2a35SJerome Brunet 		break;
162c41c2a35SJerome Brunet 	default:
163c41c2a35SJerome Brunet 		pr_err("Unsupported physical width: %u\n",
164c41c2a35SJerome Brunet 		       ts->physical_width);
165c41c2a35SJerome Brunet 		return -EINVAL;
166c41c2a35SJerome Brunet 	}
167c41c2a35SJerome Brunet 
168c41c2a35SJerome Brunet 	/* If the sample clock is inverted, invert it back for the formatter */
169c41c2a35SJerome Brunet 	if (axg_tdm_lrclk_invert(ts->iface->fmt))
170c41c2a35SJerome Brunet 		val |= TDMOUT_CTRL1_WS_INV;
171c41c2a35SJerome Brunet 
172c41c2a35SJerome Brunet 	regmap_update_bits(map, TDMOUT_CTRL1,
173c41c2a35SJerome Brunet 			   (TDMOUT_CTRL1_TYPE_MASK | TDMOUT_CTRL1_MSB_POS_MASK |
174c41c2a35SJerome Brunet 			    TDMOUT_CTRL1_WS_INV), val);
175c41c2a35SJerome Brunet 
176c41c2a35SJerome Brunet 	/* Set static swap mask configuration */
177c41c2a35SJerome Brunet 	regmap_write(map, TDMOUT_SWAP, 0x76543210);
178c41c2a35SJerome Brunet 
179c41c2a35SJerome Brunet 	return axg_tdm_formatter_set_channel_masks(map, ts, TDMOUT_MASK0);
180c41c2a35SJerome Brunet }
181c41c2a35SJerome Brunet 
182329299d6SJerome Brunet static const struct snd_kcontrol_new axg_tdmout_controls[] = {
183329299d6SJerome Brunet 	SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0,  0,  8, 255, 0),
184329299d6SJerome Brunet 	SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
185329299d6SJerome Brunet 	SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1,  0,  8, 255, 0),
186329299d6SJerome Brunet 	SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
187329299d6SJerome Brunet 	SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
188329299d6SJerome Brunet 		   TDMOUT_CTRL1_GAIN_EN, 1, 0),
189329299d6SJerome Brunet };
190329299d6SJerome Brunet 
191329299d6SJerome Brunet static const char * const axg_tdmout_sel_texts[] = {
192329299d6SJerome Brunet 	"IN 0", "IN 1", "IN 2",
193329299d6SJerome Brunet };
194329299d6SJerome Brunet 
195329299d6SJerome Brunet static SOC_ENUM_SINGLE_DECL(axg_tdmout_sel_enum, TDMOUT_CTRL1,
196329299d6SJerome Brunet 			    TDMOUT_CTRL1_SEL_SHIFT, axg_tdmout_sel_texts);
197329299d6SJerome Brunet 
198329299d6SJerome Brunet static const struct snd_kcontrol_new axg_tdmout_in_mux =
199329299d6SJerome Brunet 	SOC_DAPM_ENUM("Input Source", axg_tdmout_sel_enum);
200329299d6SJerome Brunet 
201c41c2a35SJerome Brunet static const struct snd_soc_dapm_widget axg_tdmout_dapm_widgets[] = {
202c41c2a35SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
203c41c2a35SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
204c41c2a35SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
205c41c2a35SJerome Brunet 	SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmout_in_mux),
206c41c2a35SJerome Brunet 	SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
207c41c2a35SJerome Brunet 			   axg_tdm_formatter_event,
208c41c2a35SJerome Brunet 			   (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
209c41c2a35SJerome Brunet 	SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
210c41c2a35SJerome Brunet };
211c41c2a35SJerome Brunet 
212c41c2a35SJerome Brunet static const struct snd_soc_dapm_route axg_tdmout_dapm_routes[] = {
213c41c2a35SJerome Brunet 	{ "SRC SEL", "IN 0", "IN 0" },
214c41c2a35SJerome Brunet 	{ "SRC SEL", "IN 1", "IN 1" },
215c41c2a35SJerome Brunet 	{ "SRC SEL", "IN 2", "IN 2" },
216c41c2a35SJerome Brunet 	{ "ENC", NULL, "SRC SEL" },
217c41c2a35SJerome Brunet 	{ "OUT", NULL, "ENC" },
218c41c2a35SJerome Brunet };
219c41c2a35SJerome Brunet 
220c41c2a35SJerome Brunet static const struct snd_soc_component_driver axg_tdmout_component_drv = {
221c41c2a35SJerome Brunet 	.controls		= axg_tdmout_controls,
222c41c2a35SJerome Brunet 	.num_controls		= ARRAY_SIZE(axg_tdmout_controls),
223c41c2a35SJerome Brunet 	.dapm_widgets		= axg_tdmout_dapm_widgets,
224c41c2a35SJerome Brunet 	.num_dapm_widgets	= ARRAY_SIZE(axg_tdmout_dapm_widgets),
225c41c2a35SJerome Brunet 	.dapm_routes		= axg_tdmout_dapm_routes,
226c41c2a35SJerome Brunet 	.num_dapm_routes	= ARRAY_SIZE(axg_tdmout_dapm_routes),
227c41c2a35SJerome Brunet };
228c41c2a35SJerome Brunet 
229c41c2a35SJerome Brunet static const struct axg_tdm_formatter_ops axg_tdmout_ops = {
230c41c2a35SJerome Brunet 	.get_stream	= axg_tdmout_get_tdm_stream,
231c41c2a35SJerome Brunet 	.prepare	= axg_tdmout_prepare,
232c41c2a35SJerome Brunet 	.enable		= axg_tdmout_enable,
233c41c2a35SJerome Brunet 	.disable	= axg_tdmout_disable,
234c41c2a35SJerome Brunet };
235c41c2a35SJerome Brunet 
236c41c2a35SJerome Brunet static const struct axg_tdm_formatter_driver axg_tdmout_drv = {
237c41c2a35SJerome Brunet 	.component_drv	= &axg_tdmout_component_drv,
238c41c2a35SJerome Brunet 	.regmap_cfg	= &axg_tdmout_regmap_cfg,
239c41c2a35SJerome Brunet 	.ops		= &axg_tdmout_ops,
240f01bc67fSJerome Brunet 	.quirks		= &(const struct axg_tdm_formatter_hw) {
241f01bc67fSJerome Brunet 		.skew_offset = 1,
242f01bc67fSJerome Brunet 	},
243c41c2a35SJerome Brunet };
244c41c2a35SJerome Brunet 
245aa191a37SJerome Brunet static const struct axg_tdm_formatter_driver g12a_tdmout_drv = {
246aa191a37SJerome Brunet 	.component_drv	= &axg_tdmout_component_drv,
247aa191a37SJerome Brunet 	.regmap_cfg	= &axg_tdmout_regmap_cfg,
248aa191a37SJerome Brunet 	.ops		= &axg_tdmout_ops,
249aa191a37SJerome Brunet 	.quirks		= &(const struct axg_tdm_formatter_hw) {
250aa191a37SJerome Brunet 		.skew_offset = 2,
251aa191a37SJerome Brunet 	},
252aa191a37SJerome Brunet };
253aa191a37SJerome Brunet 
254329299d6SJerome Brunet static const struct snd_kcontrol_new sm1_tdmout_controls[] = {
255329299d6SJerome Brunet 	SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0,  0,  8, 255, 0),
256329299d6SJerome Brunet 	SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
257329299d6SJerome Brunet 	SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1,  0,  8, 255, 0),
258329299d6SJerome Brunet 	SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
259329299d6SJerome Brunet 	SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
260329299d6SJerome Brunet 		   SM1_TDMOUT_CTRL1_GAIN_EN, 1, 0),
261329299d6SJerome Brunet };
262329299d6SJerome Brunet 
263329299d6SJerome Brunet static const char * const sm1_tdmout_sel_texts[] = {
264329299d6SJerome Brunet 	"IN 0", "IN 1", "IN 2", "IN 3", "IN 4",
265329299d6SJerome Brunet };
266329299d6SJerome Brunet 
267329299d6SJerome Brunet static SOC_ENUM_SINGLE_DECL(sm1_tdmout_sel_enum, TDMOUT_CTRL1,
268329299d6SJerome Brunet 			    TDMOUT_CTRL1_SEL_SHIFT, sm1_tdmout_sel_texts);
269329299d6SJerome Brunet 
270329299d6SJerome Brunet static const struct snd_kcontrol_new sm1_tdmout_in_mux =
271329299d6SJerome Brunet 	SOC_DAPM_ENUM("Input Source", sm1_tdmout_sel_enum);
272329299d6SJerome Brunet 
273329299d6SJerome Brunet static const struct snd_soc_dapm_widget sm1_tdmout_dapm_widgets[] = {
274329299d6SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
275329299d6SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
276329299d6SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
277329299d6SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
278329299d6SJerome Brunet 	SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
279329299d6SJerome Brunet 	SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_tdmout_in_mux),
280329299d6SJerome Brunet 	SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
281329299d6SJerome Brunet 			   axg_tdm_formatter_event,
282329299d6SJerome Brunet 			   (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
283329299d6SJerome Brunet 	SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
284329299d6SJerome Brunet };
285329299d6SJerome Brunet 
286329299d6SJerome Brunet static const struct snd_soc_dapm_route sm1_tdmout_dapm_routes[] = {
287329299d6SJerome Brunet 	{ "SRC SEL", "IN 0", "IN 0" },
288329299d6SJerome Brunet 	{ "SRC SEL", "IN 1", "IN 1" },
289329299d6SJerome Brunet 	{ "SRC SEL", "IN 2", "IN 2" },
290329299d6SJerome Brunet 	{ "SRC SEL", "IN 3", "IN 3" },
291329299d6SJerome Brunet 	{ "SRC SEL", "IN 4", "IN 4" },
292329299d6SJerome Brunet 	{ "ENC", NULL, "SRC SEL" },
293329299d6SJerome Brunet 	{ "OUT", NULL, "ENC" },
294329299d6SJerome Brunet };
295329299d6SJerome Brunet 
296329299d6SJerome Brunet static const struct snd_soc_component_driver sm1_tdmout_component_drv = {
297329299d6SJerome Brunet 	.controls		= sm1_tdmout_controls,
298329299d6SJerome Brunet 	.num_controls		= ARRAY_SIZE(sm1_tdmout_controls),
299329299d6SJerome Brunet 	.dapm_widgets		= sm1_tdmout_dapm_widgets,
300329299d6SJerome Brunet 	.num_dapm_widgets	= ARRAY_SIZE(sm1_tdmout_dapm_widgets),
301329299d6SJerome Brunet 	.dapm_routes		= sm1_tdmout_dapm_routes,
302329299d6SJerome Brunet 	.num_dapm_routes	= ARRAY_SIZE(sm1_tdmout_dapm_routes),
303329299d6SJerome Brunet };
304329299d6SJerome Brunet 
305329299d6SJerome Brunet static const struct axg_tdm_formatter_driver sm1_tdmout_drv = {
306329299d6SJerome Brunet 	.component_drv	= &sm1_tdmout_component_drv,
307329299d6SJerome Brunet 	.regmap_cfg	= &axg_tdmout_regmap_cfg,
308329299d6SJerome Brunet 	.ops		= &axg_tdmout_ops,
309329299d6SJerome Brunet 	.quirks		= &(const struct axg_tdm_formatter_hw) {
310329299d6SJerome Brunet 		.skew_offset = 2,
311329299d6SJerome Brunet 	},
312329299d6SJerome Brunet };
313329299d6SJerome Brunet 
314c41c2a35SJerome Brunet static const struct of_device_id axg_tdmout_of_match[] = {
315c41c2a35SJerome Brunet 	{
316c41c2a35SJerome Brunet 		.compatible = "amlogic,axg-tdmout",
317c41c2a35SJerome Brunet 		.data = &axg_tdmout_drv,
318aa191a37SJerome Brunet 	}, {
319aa191a37SJerome Brunet 		.compatible = "amlogic,g12a-tdmout",
320aa191a37SJerome Brunet 		.data = &g12a_tdmout_drv,
321329299d6SJerome Brunet 	}, {
322329299d6SJerome Brunet 		.compatible = "amlogic,sm1-tdmout",
323329299d6SJerome Brunet 		.data = &sm1_tdmout_drv,
324c41c2a35SJerome Brunet 	}, {}
325c41c2a35SJerome Brunet };
326c41c2a35SJerome Brunet MODULE_DEVICE_TABLE(of, axg_tdmout_of_match);
327c41c2a35SJerome Brunet 
328c41c2a35SJerome Brunet static struct platform_driver axg_tdmout_pdrv = {
329c41c2a35SJerome Brunet 	.probe = axg_tdm_formatter_probe,
330c41c2a35SJerome Brunet 	.driver = {
331c41c2a35SJerome Brunet 		.name = "axg-tdmout",
332c41c2a35SJerome Brunet 		.of_match_table = axg_tdmout_of_match,
333c41c2a35SJerome Brunet 	},
334c41c2a35SJerome Brunet };
335c41c2a35SJerome Brunet module_platform_driver(axg_tdmout_pdrv);
336c41c2a35SJerome Brunet 
337c41c2a35SJerome Brunet MODULE_DESCRIPTION("Amlogic AXG TDM output formatter driver");
338c41c2a35SJerome Brunet MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
339c41c2a35SJerome Brunet MODULE_LICENSE("GPL v2");
340