1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 //
3 // Copyright (c) 2018 BayLibre, SAS.
4 // Author: Jerome Brunet <jbrunet@baylibre.com>
5 
6 #include <linux/clk.h>
7 #include <linux/module.h>
8 #include <linux/of_platform.h>
9 #include <sound/pcm_params.h>
10 #include <sound/soc.h>
11 #include <sound/soc-dai.h>
12 
13 #include "axg-tdm.h"
14 
15 enum {
16 	TDM_IFACE_PAD,
17 	TDM_IFACE_LOOPBACK,
18 };
19 
20 static unsigned int axg_tdm_slots_total(u32 *mask)
21 {
22 	unsigned int slots = 0;
23 	int i;
24 
25 	if (!mask)
26 		return 0;
27 
28 	/* Count the total number of slots provided by all 4 lanes */
29 	for (i = 0; i < AXG_TDM_NUM_LANES; i++)
30 		slots += hweight32(mask[i]);
31 
32 	return slots;
33 }
34 
35 int axg_tdm_set_tdm_slots(struct snd_soc_dai *dai, u32 *tx_mask,
36 			  u32 *rx_mask, unsigned int slots,
37 			  unsigned int slot_width)
38 {
39 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
40 	struct axg_tdm_stream *tx = (struct axg_tdm_stream *)
41 		dai->playback_dma_data;
42 	struct axg_tdm_stream *rx = (struct axg_tdm_stream *)
43 		dai->capture_dma_data;
44 	unsigned int tx_slots, rx_slots;
45 	unsigned int fmt = 0;
46 
47 	tx_slots = axg_tdm_slots_total(tx_mask);
48 	rx_slots = axg_tdm_slots_total(rx_mask);
49 
50 	/* We should at least have a slot for a valid interface */
51 	if (!tx_slots && !rx_slots) {
52 		dev_err(dai->dev, "interface has no slot\n");
53 		return -EINVAL;
54 	}
55 
56 	iface->slots = slots;
57 
58 	switch (slot_width) {
59 	case 0:
60 		slot_width = 32;
61 		fallthrough;
62 	case 32:
63 		fmt |= SNDRV_PCM_FMTBIT_S32_LE;
64 		fallthrough;
65 	case 24:
66 		fmt |= SNDRV_PCM_FMTBIT_S24_LE;
67 		fmt |= SNDRV_PCM_FMTBIT_S20_LE;
68 		fallthrough;
69 	case 16:
70 		fmt |= SNDRV_PCM_FMTBIT_S16_LE;
71 		fallthrough;
72 	case 8:
73 		fmt |= SNDRV_PCM_FMTBIT_S8;
74 		break;
75 	default:
76 		dev_err(dai->dev, "unsupported slot width: %d\n", slot_width);
77 		return -EINVAL;
78 	}
79 
80 	iface->slot_width = slot_width;
81 
82 	/* Amend the dai driver and let dpcm merge do its job */
83 	if (tx) {
84 		tx->mask = tx_mask;
85 		dai->driver->playback.channels_max = tx_slots;
86 		dai->driver->playback.formats = fmt;
87 	}
88 
89 	if (rx) {
90 		rx->mask = rx_mask;
91 		dai->driver->capture.channels_max = rx_slots;
92 		dai->driver->capture.formats = fmt;
93 	}
94 
95 	return 0;
96 }
97 EXPORT_SYMBOL_GPL(axg_tdm_set_tdm_slots);
98 
99 static int axg_tdm_iface_set_sysclk(struct snd_soc_dai *dai, int clk_id,
100 				    unsigned int freq, int dir)
101 {
102 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
103 	int ret = -ENOTSUPP;
104 
105 	if (dir == SND_SOC_CLOCK_OUT && clk_id == 0) {
106 		if (!iface->mclk) {
107 			dev_warn(dai->dev, "master clock not provided\n");
108 		} else {
109 			ret = clk_set_rate(iface->mclk, freq);
110 			if (!ret)
111 				iface->mclk_rate = freq;
112 		}
113 	}
114 
115 	return ret;
116 }
117 
118 static int axg_tdm_iface_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
119 {
120 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
121 
122 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
123 	case SND_SOC_DAIFMT_CBS_CFS:
124 		if (!iface->mclk) {
125 			dev_err(dai->dev, "cpu clock master: mclk missing\n");
126 			return -ENODEV;
127 		}
128 		break;
129 
130 	case SND_SOC_DAIFMT_CBM_CFM:
131 		break;
132 
133 	case SND_SOC_DAIFMT_CBS_CFM:
134 	case SND_SOC_DAIFMT_CBM_CFS:
135 		dev_err(dai->dev, "only CBS_CFS and CBM_CFM are supported\n");
136 		fallthrough;
137 	default:
138 		return -EINVAL;
139 	}
140 
141 	iface->fmt = fmt;
142 	return 0;
143 }
144 
145 static int axg_tdm_iface_startup(struct snd_pcm_substream *substream,
146 				 struct snd_soc_dai *dai)
147 {
148 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
149 	struct axg_tdm_stream *ts =
150 		snd_soc_dai_get_dma_data(dai, substream);
151 	int ret;
152 
153 	if (!axg_tdm_slots_total(ts->mask)) {
154 		dev_err(dai->dev, "interface has not slots\n");
155 		return -EINVAL;
156 	}
157 
158 	/* Apply component wide rate symmetry */
159 	if (snd_soc_component_active(dai->component)) {
160 		ret = snd_pcm_hw_constraint_single(substream->runtime,
161 						   SNDRV_PCM_HW_PARAM_RATE,
162 						   iface->rate);
163 		if (ret < 0) {
164 			dev_err(dai->dev,
165 				"can't set iface rate constraint\n");
166 			return ret;
167 		}
168 	}
169 
170 	return 0;
171 }
172 
173 static int axg_tdm_iface_set_stream(struct snd_pcm_substream *substream,
174 				    struct snd_pcm_hw_params *params,
175 				    struct snd_soc_dai *dai)
176 {
177 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
178 	struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
179 	unsigned int channels = params_channels(params);
180 	unsigned int width = params_width(params);
181 
182 	/* Save rate and sample_bits for component symmetry */
183 	iface->rate = params_rate(params);
184 
185 	/* Make sure this interface can cope with the stream */
186 	if (axg_tdm_slots_total(ts->mask) < channels) {
187 		dev_err(dai->dev, "not enough slots for channels\n");
188 		return -EINVAL;
189 	}
190 
191 	if (iface->slot_width < width) {
192 		dev_err(dai->dev, "incompatible slots width for stream\n");
193 		return -EINVAL;
194 	}
195 
196 	/* Save the parameter for tdmout/tdmin widgets */
197 	ts->physical_width = params_physical_width(params);
198 	ts->width = params_width(params);
199 	ts->channels = params_channels(params);
200 
201 	return 0;
202 }
203 
204 static int axg_tdm_iface_set_lrclk(struct snd_soc_dai *dai,
205 				   struct snd_pcm_hw_params *params)
206 {
207 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
208 	unsigned int ratio_num;
209 	int ret;
210 
211 	ret = clk_set_rate(iface->lrclk, params_rate(params));
212 	if (ret) {
213 		dev_err(dai->dev, "setting sample clock failed: %d\n", ret);
214 		return ret;
215 	}
216 
217 	switch (iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
218 	case SND_SOC_DAIFMT_I2S:
219 	case SND_SOC_DAIFMT_LEFT_J:
220 	case SND_SOC_DAIFMT_RIGHT_J:
221 		/* 50% duty cycle ratio */
222 		ratio_num = 1;
223 		break;
224 
225 	case SND_SOC_DAIFMT_DSP_A:
226 	case SND_SOC_DAIFMT_DSP_B:
227 		/*
228 		 * A zero duty cycle ratio will result in setting the mininum
229 		 * ratio possible which, for this clock, is 1 cycle of the
230 		 * parent bclk clock high and the rest low, This is exactly
231 		 * what we want here.
232 		 */
233 		ratio_num = 0;
234 		break;
235 
236 	default:
237 		return -EINVAL;
238 	}
239 
240 	ret = clk_set_duty_cycle(iface->lrclk, ratio_num, 2);
241 	if (ret) {
242 		dev_err(dai->dev,
243 			"setting sample clock duty cycle failed: %d\n", ret);
244 		return ret;
245 	}
246 
247 	/* Set sample clock inversion */
248 	ret = clk_set_phase(iface->lrclk,
249 			    axg_tdm_lrclk_invert(iface->fmt) ? 180 : 0);
250 	if (ret) {
251 		dev_err(dai->dev,
252 			"setting sample clock phase failed: %d\n", ret);
253 		return ret;
254 	}
255 
256 	return 0;
257 }
258 
259 static int axg_tdm_iface_set_sclk(struct snd_soc_dai *dai,
260 				  struct snd_pcm_hw_params *params)
261 {
262 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
263 	unsigned long srate;
264 	int ret;
265 
266 	srate = iface->slots * iface->slot_width * params_rate(params);
267 
268 	if (!iface->mclk_rate) {
269 		/* If no specific mclk is requested, default to bit clock * 4 */
270 		clk_set_rate(iface->mclk, 4 * srate);
271 	} else {
272 		/* Check if we can actually get the bit clock from mclk */
273 		if (iface->mclk_rate % srate) {
274 			dev_err(dai->dev,
275 				"can't derive sclk %lu from mclk %lu\n",
276 				srate, iface->mclk_rate);
277 			return -EINVAL;
278 		}
279 	}
280 
281 	ret = clk_set_rate(iface->sclk, srate);
282 	if (ret) {
283 		dev_err(dai->dev, "setting bit clock failed: %d\n", ret);
284 		return ret;
285 	}
286 
287 	/* Set the bit clock inversion */
288 	ret = clk_set_phase(iface->sclk,
289 			    axg_tdm_sclk_invert(iface->fmt) ? 0 : 180);
290 	if (ret) {
291 		dev_err(dai->dev, "setting bit clock phase failed: %d\n", ret);
292 		return ret;
293 	}
294 
295 	return ret;
296 }
297 
298 static int axg_tdm_iface_hw_params(struct snd_pcm_substream *substream,
299 				   struct snd_pcm_hw_params *params,
300 				   struct snd_soc_dai *dai)
301 {
302 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
303 	int ret;
304 
305 	switch (iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
306 	case SND_SOC_DAIFMT_I2S:
307 	case SND_SOC_DAIFMT_LEFT_J:
308 	case SND_SOC_DAIFMT_RIGHT_J:
309 		if (iface->slots > 2) {
310 			dev_err(dai->dev, "bad slot number for format: %d\n",
311 				iface->slots);
312 			return -EINVAL;
313 		}
314 		break;
315 
316 	case SND_SOC_DAIFMT_DSP_A:
317 	case SND_SOC_DAIFMT_DSP_B:
318 		break;
319 
320 	default:
321 		dev_err(dai->dev, "unsupported dai format\n");
322 		return -EINVAL;
323 	}
324 
325 	ret = axg_tdm_iface_set_stream(substream, params, dai);
326 	if (ret)
327 		return ret;
328 
329 	if ((iface->fmt & SND_SOC_DAIFMT_MASTER_MASK) ==
330 	    SND_SOC_DAIFMT_CBS_CFS) {
331 		ret = axg_tdm_iface_set_sclk(dai, params);
332 		if (ret)
333 			return ret;
334 
335 		ret = axg_tdm_iface_set_lrclk(dai, params);
336 		if (ret)
337 			return ret;
338 	}
339 
340 	return 0;
341 }
342 
343 static int axg_tdm_iface_hw_free(struct snd_pcm_substream *substream,
344 				 struct snd_soc_dai *dai)
345 {
346 	struct axg_tdm_stream *ts = snd_soc_dai_get_dma_data(dai, substream);
347 
348 	/* Stop all attached formatters */
349 	axg_tdm_stream_stop(ts);
350 
351 	return 0;
352 }
353 
354 static int axg_tdm_iface_trigger(struct snd_pcm_substream *substream,
355 				 int cmd,
356 				 struct snd_soc_dai *dai)
357 {
358 	struct axg_tdm_stream *ts =
359 		snd_soc_dai_get_dma_data(dai, substream);
360 
361 	switch (cmd) {
362 	case SNDRV_PCM_TRIGGER_START:
363 	case SNDRV_PCM_TRIGGER_RESUME:
364 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
365 		axg_tdm_stream_start(ts);
366 		break;
367 	case SNDRV_PCM_TRIGGER_SUSPEND:
368 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
369 	case SNDRV_PCM_TRIGGER_STOP:
370 		axg_tdm_stream_stop(ts);
371 		break;
372 	default:
373 		return -EINVAL;
374 	}
375 
376 	return 0;
377 }
378 
379 static int axg_tdm_iface_remove_dai(struct snd_soc_dai *dai)
380 {
381 	if (dai->capture_dma_data)
382 		axg_tdm_stream_free(dai->capture_dma_data);
383 
384 	if (dai->playback_dma_data)
385 		axg_tdm_stream_free(dai->playback_dma_data);
386 
387 	return 0;
388 }
389 
390 static int axg_tdm_iface_probe_dai(struct snd_soc_dai *dai)
391 {
392 	struct axg_tdm_iface *iface = snd_soc_dai_get_drvdata(dai);
393 
394 	if (dai->capture_widget) {
395 		dai->capture_dma_data = axg_tdm_stream_alloc(iface);
396 		if (!dai->capture_dma_data)
397 			return -ENOMEM;
398 	}
399 
400 	if (dai->playback_widget) {
401 		dai->playback_dma_data = axg_tdm_stream_alloc(iface);
402 		if (!dai->playback_dma_data) {
403 			axg_tdm_iface_remove_dai(dai);
404 			return -ENOMEM;
405 		}
406 	}
407 
408 	return 0;
409 }
410 
411 static const struct snd_soc_dai_ops axg_tdm_iface_ops = {
412 	.set_sysclk	= axg_tdm_iface_set_sysclk,
413 	.set_fmt	= axg_tdm_iface_set_fmt,
414 	.startup	= axg_tdm_iface_startup,
415 	.hw_params	= axg_tdm_iface_hw_params,
416 	.hw_free	= axg_tdm_iface_hw_free,
417 	.trigger	= axg_tdm_iface_trigger,
418 };
419 
420 /* TDM Backend DAIs */
421 static const struct snd_soc_dai_driver axg_tdm_iface_dai_drv[] = {
422 	[TDM_IFACE_PAD] = {
423 		.name = "TDM Pad",
424 		.playback = {
425 			.stream_name	= "Playback",
426 			.channels_min	= 1,
427 			.channels_max	= AXG_TDM_CHANNEL_MAX,
428 			.rates		= AXG_TDM_RATES,
429 			.formats	= AXG_TDM_FORMATS,
430 		},
431 		.capture = {
432 			.stream_name	= "Capture",
433 			.channels_min	= 1,
434 			.channels_max	= AXG_TDM_CHANNEL_MAX,
435 			.rates		= AXG_TDM_RATES,
436 			.formats	= AXG_TDM_FORMATS,
437 		},
438 		.id = TDM_IFACE_PAD,
439 		.ops = &axg_tdm_iface_ops,
440 		.probe = axg_tdm_iface_probe_dai,
441 		.remove = axg_tdm_iface_remove_dai,
442 	},
443 	[TDM_IFACE_LOOPBACK] = {
444 		.name = "TDM Loopback",
445 		.capture = {
446 			.stream_name	= "Loopback",
447 			.channels_min	= 1,
448 			.channels_max	= AXG_TDM_CHANNEL_MAX,
449 			.rates		= AXG_TDM_RATES,
450 			.formats	= AXG_TDM_FORMATS,
451 		},
452 		.id = TDM_IFACE_LOOPBACK,
453 		.ops = &axg_tdm_iface_ops,
454 		.probe = axg_tdm_iface_probe_dai,
455 		.remove = axg_tdm_iface_remove_dai,
456 	},
457 };
458 
459 static int axg_tdm_iface_set_bias_level(struct snd_soc_component *component,
460 					enum snd_soc_bias_level level)
461 {
462 	struct axg_tdm_iface *iface = snd_soc_component_get_drvdata(component);
463 	enum snd_soc_bias_level now =
464 		snd_soc_component_get_bias_level(component);
465 	int ret = 0;
466 
467 	switch (level) {
468 	case SND_SOC_BIAS_PREPARE:
469 		if (now == SND_SOC_BIAS_STANDBY)
470 			ret = clk_prepare_enable(iface->mclk);
471 		break;
472 
473 	case SND_SOC_BIAS_STANDBY:
474 		if (now == SND_SOC_BIAS_PREPARE)
475 			clk_disable_unprepare(iface->mclk);
476 		break;
477 
478 	case SND_SOC_BIAS_OFF:
479 	case SND_SOC_BIAS_ON:
480 		break;
481 	}
482 
483 	return ret;
484 }
485 
486 static const struct snd_soc_dapm_widget axg_tdm_iface_dapm_widgets[] = {
487 	SND_SOC_DAPM_SIGGEN("Playback Signal"),
488 };
489 
490 static const struct snd_soc_dapm_route axg_tdm_iface_dapm_routes[] = {
491 	{ "Loopback", NULL, "Playback Signal" },
492 };
493 
494 static const struct snd_soc_component_driver axg_tdm_iface_component_drv = {
495 	.dapm_widgets		= axg_tdm_iface_dapm_widgets,
496 	.num_dapm_widgets	= ARRAY_SIZE(axg_tdm_iface_dapm_widgets),
497 	.dapm_routes		= axg_tdm_iface_dapm_routes,
498 	.num_dapm_routes	= ARRAY_SIZE(axg_tdm_iface_dapm_routes),
499 	.set_bias_level		= axg_tdm_iface_set_bias_level,
500 };
501 
502 static const struct of_device_id axg_tdm_iface_of_match[] = {
503 	{ .compatible = "amlogic,axg-tdm-iface", },
504 	{}
505 };
506 MODULE_DEVICE_TABLE(of, axg_tdm_iface_of_match);
507 
508 static int axg_tdm_iface_probe(struct platform_device *pdev)
509 {
510 	struct device *dev = &pdev->dev;
511 	struct snd_soc_dai_driver *dai_drv;
512 	struct axg_tdm_iface *iface;
513 	int ret, i;
514 
515 	iface = devm_kzalloc(dev, sizeof(*iface), GFP_KERNEL);
516 	if (!iface)
517 		return -ENOMEM;
518 	platform_set_drvdata(pdev, iface);
519 
520 	/*
521 	 * Duplicate dai driver: depending on the slot masks configuration
522 	 * We'll change the number of channel provided by DAI stream, so dpcm
523 	 * channel merge can be done properly
524 	 */
525 	dai_drv = devm_kcalloc(dev, ARRAY_SIZE(axg_tdm_iface_dai_drv),
526 			       sizeof(*dai_drv), GFP_KERNEL);
527 	if (!dai_drv)
528 		return -ENOMEM;
529 
530 	for (i = 0; i < ARRAY_SIZE(axg_tdm_iface_dai_drv); i++)
531 		memcpy(&dai_drv[i], &axg_tdm_iface_dai_drv[i],
532 		       sizeof(*dai_drv));
533 
534 	/* Bit clock provided on the pad */
535 	iface->sclk = devm_clk_get(dev, "sclk");
536 	if (IS_ERR(iface->sclk)) {
537 		ret = PTR_ERR(iface->sclk);
538 		if (ret != -EPROBE_DEFER)
539 			dev_err(dev, "failed to get sclk: %d\n", ret);
540 		return ret;
541 	}
542 
543 	/* Sample clock provided on the pad */
544 	iface->lrclk = devm_clk_get(dev, "lrclk");
545 	if (IS_ERR(iface->lrclk)) {
546 		ret = PTR_ERR(iface->lrclk);
547 		if (ret != -EPROBE_DEFER)
548 			dev_err(dev, "failed to get lrclk: %d\n", ret);
549 		return ret;
550 	}
551 
552 	/*
553 	 * mclk maybe be missing when the cpu dai is in slave mode and
554 	 * the codec does not require it to provide a master clock.
555 	 * At this point, ignore the error if mclk is missing. We'll
556 	 * throw an error if the cpu dai is master and mclk is missing
557 	 */
558 	iface->mclk = devm_clk_get(dev, "mclk");
559 	if (IS_ERR(iface->mclk)) {
560 		ret = PTR_ERR(iface->mclk);
561 		if (ret == -ENOENT) {
562 			iface->mclk = NULL;
563 		} else {
564 			if (ret != -EPROBE_DEFER)
565 				dev_err(dev, "failed to get mclk: %d\n", ret);
566 			return ret;
567 		}
568 	}
569 
570 	return devm_snd_soc_register_component(dev,
571 					&axg_tdm_iface_component_drv, dai_drv,
572 					ARRAY_SIZE(axg_tdm_iface_dai_drv));
573 }
574 
575 static struct platform_driver axg_tdm_iface_pdrv = {
576 	.probe = axg_tdm_iface_probe,
577 	.driver = {
578 		.name = "axg-tdm-iface",
579 		.of_match_table = axg_tdm_iface_of_match,
580 	},
581 };
582 module_platform_driver(axg_tdm_iface_pdrv);
583 
584 MODULE_DESCRIPTION("Amlogic AXG TDM interface driver");
585 MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
586 MODULE_LICENSE("GPL v2");
587