1*80d8cad2SJiaxin Yu // SPDX-License-Identifier: GPL-2.0
2*80d8cad2SJiaxin Yu //
3*80d8cad2SJiaxin Yu // MediaTek ALSA SoC Audio Misc Control
4*80d8cad2SJiaxin Yu //
5*80d8cad2SJiaxin Yu // Copyright (c) 2022 MediaTek Inc.
6*80d8cad2SJiaxin Yu // Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
7*80d8cad2SJiaxin Yu 
8*80d8cad2SJiaxin Yu #include <linux/delay.h>
9*80d8cad2SJiaxin Yu #include <linux/dma-mapping.h>
10*80d8cad2SJiaxin Yu #include <linux/io.h>
11*80d8cad2SJiaxin Yu #include <linux/regmap.h>
12*80d8cad2SJiaxin Yu #include <sound/soc.h>
13*80d8cad2SJiaxin Yu 
14*80d8cad2SJiaxin Yu #include "../common/mtk-afe-fe-dai.h"
15*80d8cad2SJiaxin Yu #include "../common/mtk-afe-platform-driver.h"
16*80d8cad2SJiaxin Yu #include "mt8186-afe-common.h"
17*80d8cad2SJiaxin Yu 
18*80d8cad2SJiaxin Yu static const char * const mt8186_sgen_mode_str[] = {
19*80d8cad2SJiaxin Yu 	"I0I1",   "I2",     "I3I4",   "I5I6",
20*80d8cad2SJiaxin Yu 	"I7I8",   "I9I22",  "I10I11", "I12I13",
21*80d8cad2SJiaxin Yu 	"I14I21", "I15I16", "I17I18", "I19I20",
22*80d8cad2SJiaxin Yu 	"I23I24", "I25I26", "I27I28", "I33",
23*80d8cad2SJiaxin Yu 	"I34I35", "I36I37", "I38I39", "I40I41",
24*80d8cad2SJiaxin Yu 	"I42I43", "I44I45", "I46I47", "I48I49",
25*80d8cad2SJiaxin Yu 	"I56I57", "I58I59", "I60I61", "I62I63",
26*80d8cad2SJiaxin Yu 	"O0O1",   "O2",     "O3O4",   "O5O6",
27*80d8cad2SJiaxin Yu 	"O7O8",   "O9O10",  "O11",    "O12",
28*80d8cad2SJiaxin Yu 	"O13O14", "O15O16", "O17O18", "O19O20",
29*80d8cad2SJiaxin Yu 	"O21O22", "O23O24", "O25",    "O28O29",
30*80d8cad2SJiaxin Yu 	"O34",    "O35",    "O32O33", "O36O37",
31*80d8cad2SJiaxin Yu 	"O38O39", "O30O31", "O40O41", "O42O43",
32*80d8cad2SJiaxin Yu 	"O44O45", "O46O47", "O48O49", "O50O51",
33*80d8cad2SJiaxin Yu 	"O58O59", "O60O61", "O62O63", "O64O65",
34*80d8cad2SJiaxin Yu 	"O66O67", "O68O69", "O26O27", "OFF",
35*80d8cad2SJiaxin Yu };
36*80d8cad2SJiaxin Yu 
37*80d8cad2SJiaxin Yu static const int mt8186_sgen_mode_idx[] = {
38*80d8cad2SJiaxin Yu 	0, 2, 4, 6,
39*80d8cad2SJiaxin Yu 	8, 22, 10, 12,
40*80d8cad2SJiaxin Yu 	14, -1, 18, 20,
41*80d8cad2SJiaxin Yu 	24, 26, 28, 33,
42*80d8cad2SJiaxin Yu 	34, 36, 38, 40,
43*80d8cad2SJiaxin Yu 	42, 44, 46, 48,
44*80d8cad2SJiaxin Yu 	56, 58, 60, 62,
45*80d8cad2SJiaxin Yu 	128, 130, 132, 134,
46*80d8cad2SJiaxin Yu 	135, 138, 139, 140,
47*80d8cad2SJiaxin Yu 	142, 144, 166, 148,
48*80d8cad2SJiaxin Yu 	150, 152, 153, 156,
49*80d8cad2SJiaxin Yu 	162, 163, 160, 164,
50*80d8cad2SJiaxin Yu 	166, -1, 168, 170,
51*80d8cad2SJiaxin Yu 	172, 174, 176, 178,
52*80d8cad2SJiaxin Yu 	186, 188, 190, 192,
53*80d8cad2SJiaxin Yu 	194, 196, -1, -1,
54*80d8cad2SJiaxin Yu };
55*80d8cad2SJiaxin Yu 
56*80d8cad2SJiaxin Yu static const char * const mt8186_sgen_rate_str[] = {
57*80d8cad2SJiaxin Yu 	"8K", "11K", "12K", "16K",
58*80d8cad2SJiaxin Yu 	"22K", "24K", "32K", "44K",
59*80d8cad2SJiaxin Yu 	"48K", "88k", "96k", "176k",
60*80d8cad2SJiaxin Yu 	"192k"
61*80d8cad2SJiaxin Yu };
62*80d8cad2SJiaxin Yu 
63*80d8cad2SJiaxin Yu static const int mt8186_sgen_rate_idx[] = {
64*80d8cad2SJiaxin Yu 	0, 1, 2, 4,
65*80d8cad2SJiaxin Yu 	5, 6, 8, 9,
66*80d8cad2SJiaxin Yu 	10, 11, 12, 13,
67*80d8cad2SJiaxin Yu 	14
68*80d8cad2SJiaxin Yu };
69*80d8cad2SJiaxin Yu 
70*80d8cad2SJiaxin Yu /* this order must match reg bit amp_div_ch1/2 */
71*80d8cad2SJiaxin Yu static const char * const mt8186_sgen_amp_str[] = {
72*80d8cad2SJiaxin Yu 	"1/128", "1/64", "1/32", "1/16", "1/8", "1/4", "1/2", "1" };
73*80d8cad2SJiaxin Yu 
mt8186_sgen_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)74*80d8cad2SJiaxin Yu static int mt8186_sgen_get(struct snd_kcontrol *kcontrol,
75*80d8cad2SJiaxin Yu 			   struct snd_ctl_elem_value *ucontrol)
76*80d8cad2SJiaxin Yu {
77*80d8cad2SJiaxin Yu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
78*80d8cad2SJiaxin Yu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
79*80d8cad2SJiaxin Yu 	struct mt8186_afe_private *afe_priv = afe->platform_priv;
80*80d8cad2SJiaxin Yu 
81*80d8cad2SJiaxin Yu 	ucontrol->value.integer.value[0] = afe_priv->sgen_mode;
82*80d8cad2SJiaxin Yu 
83*80d8cad2SJiaxin Yu 	return 0;
84*80d8cad2SJiaxin Yu }
85*80d8cad2SJiaxin Yu 
mt8186_sgen_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)86*80d8cad2SJiaxin Yu static int mt8186_sgen_set(struct snd_kcontrol *kcontrol,
87*80d8cad2SJiaxin Yu 			   struct snd_ctl_elem_value *ucontrol)
88*80d8cad2SJiaxin Yu {
89*80d8cad2SJiaxin Yu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
90*80d8cad2SJiaxin Yu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
91*80d8cad2SJiaxin Yu 	struct mt8186_afe_private *afe_priv = afe->platform_priv;
92*80d8cad2SJiaxin Yu 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
93*80d8cad2SJiaxin Yu 	int mode;
94*80d8cad2SJiaxin Yu 	int mode_idx;
95*80d8cad2SJiaxin Yu 
96*80d8cad2SJiaxin Yu 	if (ucontrol->value.enumerated.item[0] >= e->items)
97*80d8cad2SJiaxin Yu 		return -EINVAL;
98*80d8cad2SJiaxin Yu 
99*80d8cad2SJiaxin Yu 	mode = ucontrol->value.integer.value[0];
100*80d8cad2SJiaxin Yu 	mode_idx = mt8186_sgen_mode_idx[mode];
101*80d8cad2SJiaxin Yu 
102*80d8cad2SJiaxin Yu 	dev_dbg(afe->dev, "%s(), mode %d, mode_idx %d\n",
103*80d8cad2SJiaxin Yu 		__func__, mode, mode_idx);
104*80d8cad2SJiaxin Yu 
105*80d8cad2SJiaxin Yu 	if (mode == afe_priv->sgen_mode)
106*80d8cad2SJiaxin Yu 		return 0;
107*80d8cad2SJiaxin Yu 
108*80d8cad2SJiaxin Yu 	if (mode_idx >= 0) {
109*80d8cad2SJiaxin Yu 		regmap_update_bits(afe->regmap, AFE_SINEGEN_CON2,
110*80d8cad2SJiaxin Yu 				   INNER_LOOP_BACK_MODE_MASK_SFT,
111*80d8cad2SJiaxin Yu 				   mode_idx << INNER_LOOP_BACK_MODE_SFT);
112*80d8cad2SJiaxin Yu 		regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
113*80d8cad2SJiaxin Yu 				   DAC_EN_MASK_SFT, BIT(DAC_EN_SFT));
114*80d8cad2SJiaxin Yu 	} else {
115*80d8cad2SJiaxin Yu 		/* disable sgen */
116*80d8cad2SJiaxin Yu 		regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
117*80d8cad2SJiaxin Yu 				   DAC_EN_MASK_SFT, 0);
118*80d8cad2SJiaxin Yu 		regmap_update_bits(afe->regmap, AFE_SINEGEN_CON2,
119*80d8cad2SJiaxin Yu 				   INNER_LOOP_BACK_MODE_MASK_SFT,
120*80d8cad2SJiaxin Yu 				   0x3f << INNER_LOOP_BACK_MODE_SFT);
121*80d8cad2SJiaxin Yu 	}
122*80d8cad2SJiaxin Yu 
123*80d8cad2SJiaxin Yu 	afe_priv->sgen_mode = mode;
124*80d8cad2SJiaxin Yu 
125*80d8cad2SJiaxin Yu 	return 1;
126*80d8cad2SJiaxin Yu }
127*80d8cad2SJiaxin Yu 
mt8186_sgen_rate_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)128*80d8cad2SJiaxin Yu static int mt8186_sgen_rate_get(struct snd_kcontrol *kcontrol,
129*80d8cad2SJiaxin Yu 				struct snd_ctl_elem_value *ucontrol)
130*80d8cad2SJiaxin Yu {
131*80d8cad2SJiaxin Yu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
132*80d8cad2SJiaxin Yu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
133*80d8cad2SJiaxin Yu 	struct mt8186_afe_private *afe_priv = afe->platform_priv;
134*80d8cad2SJiaxin Yu 
135*80d8cad2SJiaxin Yu 	ucontrol->value.integer.value[0] = afe_priv->sgen_rate;
136*80d8cad2SJiaxin Yu 
137*80d8cad2SJiaxin Yu 	return 0;
138*80d8cad2SJiaxin Yu }
139*80d8cad2SJiaxin Yu 
mt8186_sgen_rate_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)140*80d8cad2SJiaxin Yu static int mt8186_sgen_rate_set(struct snd_kcontrol *kcontrol,
141*80d8cad2SJiaxin Yu 				struct snd_ctl_elem_value *ucontrol)
142*80d8cad2SJiaxin Yu {
143*80d8cad2SJiaxin Yu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
144*80d8cad2SJiaxin Yu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
145*80d8cad2SJiaxin Yu 	struct mt8186_afe_private *afe_priv = afe->platform_priv;
146*80d8cad2SJiaxin Yu 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
147*80d8cad2SJiaxin Yu 	int rate;
148*80d8cad2SJiaxin Yu 
149*80d8cad2SJiaxin Yu 	if (ucontrol->value.enumerated.item[0] >= e->items)
150*80d8cad2SJiaxin Yu 		return -EINVAL;
151*80d8cad2SJiaxin Yu 
152*80d8cad2SJiaxin Yu 	rate = ucontrol->value.integer.value[0];
153*80d8cad2SJiaxin Yu 
154*80d8cad2SJiaxin Yu 	dev_dbg(afe->dev, "%s(), rate %d\n", __func__, rate);
155*80d8cad2SJiaxin Yu 
156*80d8cad2SJiaxin Yu 	if (rate == afe_priv->sgen_rate)
157*80d8cad2SJiaxin Yu 		return 0;
158*80d8cad2SJiaxin Yu 
159*80d8cad2SJiaxin Yu 	regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
160*80d8cad2SJiaxin Yu 			   SINE_MODE_CH1_MASK_SFT,
161*80d8cad2SJiaxin Yu 			   mt8186_sgen_rate_idx[rate] << SINE_MODE_CH1_SFT);
162*80d8cad2SJiaxin Yu 
163*80d8cad2SJiaxin Yu 	regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
164*80d8cad2SJiaxin Yu 			   SINE_MODE_CH2_MASK_SFT,
165*80d8cad2SJiaxin Yu 			   mt8186_sgen_rate_idx[rate] << SINE_MODE_CH2_SFT);
166*80d8cad2SJiaxin Yu 
167*80d8cad2SJiaxin Yu 	afe_priv->sgen_rate = rate;
168*80d8cad2SJiaxin Yu 
169*80d8cad2SJiaxin Yu 	return 1;
170*80d8cad2SJiaxin Yu }
171*80d8cad2SJiaxin Yu 
mt8186_sgen_amplitude_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)172*80d8cad2SJiaxin Yu static int mt8186_sgen_amplitude_get(struct snd_kcontrol *kcontrol,
173*80d8cad2SJiaxin Yu 				     struct snd_ctl_elem_value *ucontrol)
174*80d8cad2SJiaxin Yu {
175*80d8cad2SJiaxin Yu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
176*80d8cad2SJiaxin Yu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
177*80d8cad2SJiaxin Yu 	struct mt8186_afe_private *afe_priv = afe->platform_priv;
178*80d8cad2SJiaxin Yu 
179*80d8cad2SJiaxin Yu 	ucontrol->value.integer.value[0] = afe_priv->sgen_amplitude;
180*80d8cad2SJiaxin Yu 	return 0;
181*80d8cad2SJiaxin Yu }
182*80d8cad2SJiaxin Yu 
mt8186_sgen_amplitude_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)183*80d8cad2SJiaxin Yu static int mt8186_sgen_amplitude_set(struct snd_kcontrol *kcontrol,
184*80d8cad2SJiaxin Yu 				     struct snd_ctl_elem_value *ucontrol)
185*80d8cad2SJiaxin Yu {
186*80d8cad2SJiaxin Yu 	struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
187*80d8cad2SJiaxin Yu 	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
188*80d8cad2SJiaxin Yu 	struct mt8186_afe_private *afe_priv = afe->platform_priv;
189*80d8cad2SJiaxin Yu 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
190*80d8cad2SJiaxin Yu 	int amplitude;
191*80d8cad2SJiaxin Yu 
192*80d8cad2SJiaxin Yu 	if (ucontrol->value.enumerated.item[0] >= e->items)
193*80d8cad2SJiaxin Yu 		return -EINVAL;
194*80d8cad2SJiaxin Yu 
195*80d8cad2SJiaxin Yu 	amplitude = ucontrol->value.integer.value[0];
196*80d8cad2SJiaxin Yu 	if (amplitude > AMP_DIV_CH1_MASK) {
197*80d8cad2SJiaxin Yu 		dev_err(afe->dev, "%s(), amplitude %d invalid\n",
198*80d8cad2SJiaxin Yu 			__func__, amplitude);
199*80d8cad2SJiaxin Yu 		return -EINVAL;
200*80d8cad2SJiaxin Yu 	}
201*80d8cad2SJiaxin Yu 
202*80d8cad2SJiaxin Yu 	dev_dbg(afe->dev, "%s(), amplitude %d\n", __func__, amplitude);
203*80d8cad2SJiaxin Yu 
204*80d8cad2SJiaxin Yu 	if (amplitude == afe_priv->sgen_amplitude)
205*80d8cad2SJiaxin Yu 		return 0;
206*80d8cad2SJiaxin Yu 
207*80d8cad2SJiaxin Yu 	regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
208*80d8cad2SJiaxin Yu 			   AMP_DIV_CH1_MASK_SFT,
209*80d8cad2SJiaxin Yu 			   amplitude << AMP_DIV_CH1_SFT);
210*80d8cad2SJiaxin Yu 	regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
211*80d8cad2SJiaxin Yu 			   AMP_DIV_CH2_MASK_SFT,
212*80d8cad2SJiaxin Yu 			   amplitude << AMP_DIV_CH2_SFT);
213*80d8cad2SJiaxin Yu 
214*80d8cad2SJiaxin Yu 	afe_priv->sgen_amplitude = amplitude;
215*80d8cad2SJiaxin Yu 
216*80d8cad2SJiaxin Yu 	return 1;
217*80d8cad2SJiaxin Yu }
218*80d8cad2SJiaxin Yu 
219*80d8cad2SJiaxin Yu static const struct soc_enum mt8186_afe_sgen_enum[] = {
220*80d8cad2SJiaxin Yu 	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_sgen_mode_str),
221*80d8cad2SJiaxin Yu 			    mt8186_sgen_mode_str),
222*80d8cad2SJiaxin Yu 	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_sgen_rate_str),
223*80d8cad2SJiaxin Yu 			    mt8186_sgen_rate_str),
224*80d8cad2SJiaxin Yu 	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_sgen_amp_str),
225*80d8cad2SJiaxin Yu 			    mt8186_sgen_amp_str),
226*80d8cad2SJiaxin Yu };
227*80d8cad2SJiaxin Yu 
228*80d8cad2SJiaxin Yu static const struct snd_kcontrol_new mt8186_afe_sgen_controls[] = {
229*80d8cad2SJiaxin Yu 	SOC_ENUM_EXT("Audio_SineGen_Switch", mt8186_afe_sgen_enum[0],
230*80d8cad2SJiaxin Yu 		     mt8186_sgen_get, mt8186_sgen_set),
231*80d8cad2SJiaxin Yu 	SOC_ENUM_EXT("Audio_SineGen_SampleRate", mt8186_afe_sgen_enum[1],
232*80d8cad2SJiaxin Yu 		     mt8186_sgen_rate_get, mt8186_sgen_rate_set),
233*80d8cad2SJiaxin Yu 	SOC_ENUM_EXT("Audio_SineGen_Amplitude", mt8186_afe_sgen_enum[2],
234*80d8cad2SJiaxin Yu 		     mt8186_sgen_amplitude_get, mt8186_sgen_amplitude_set),
235*80d8cad2SJiaxin Yu 	SOC_SINGLE("Audio_SineGen_Mute_Ch1", AFE_SINEGEN_CON0,
236*80d8cad2SJiaxin Yu 		   MUTE_SW_CH1_MASK_SFT, MUTE_SW_CH1_MASK, 0),
237*80d8cad2SJiaxin Yu 	SOC_SINGLE("Audio_SineGen_Mute_Ch2", AFE_SINEGEN_CON0,
238*80d8cad2SJiaxin Yu 		   MUTE_SW_CH2_MASK_SFT, MUTE_SW_CH2_MASK, 0),
239*80d8cad2SJiaxin Yu 	SOC_SINGLE("Audio_SineGen_Freq_Div_Ch1", AFE_SINEGEN_CON0,
240*80d8cad2SJiaxin Yu 		   FREQ_DIV_CH1_SFT, FREQ_DIV_CH1_MASK, 0),
241*80d8cad2SJiaxin Yu 	SOC_SINGLE("Audio_SineGen_Freq_Div_Ch2", AFE_SINEGEN_CON0,
242*80d8cad2SJiaxin Yu 		   FREQ_DIV_CH2_SFT, FREQ_DIV_CH2_MASK, 0),
243*80d8cad2SJiaxin Yu };
244*80d8cad2SJiaxin Yu 
mt8186_add_misc_control(struct snd_soc_component * component)245*80d8cad2SJiaxin Yu int mt8186_add_misc_control(struct snd_soc_component *component)
246*80d8cad2SJiaxin Yu {
247*80d8cad2SJiaxin Yu 	snd_soc_add_component_controls(component,
248*80d8cad2SJiaxin Yu 				       mt8186_afe_sgen_controls,
249*80d8cad2SJiaxin Yu 				       ARRAY_SIZE(mt8186_afe_sgen_controls));
250*80d8cad2SJiaxin Yu 
251*80d8cad2SJiaxin Yu 	return 0;
252*80d8cad2SJiaxin Yu }
253