1*c4c3c32dSMaso Huang /* SPDX-License-Identifier: GPL-2.0 */ 2*c4c3c32dSMaso Huang /* 3*c4c3c32dSMaso Huang * mt7986-afe-common.h -- MediaTek 7986 audio driver definitions 4*c4c3c32dSMaso Huang * 5*c4c3c32dSMaso Huang * Copyright (c) 2023 MediaTek Inc. 6*c4c3c32dSMaso Huang * Authors: Vic Wu <vic.wu@mediatek.com> 7*c4c3c32dSMaso Huang * Maso Huang <maso.huang@mediatek.com> 8*c4c3c32dSMaso Huang */ 9*c4c3c32dSMaso Huang 10*c4c3c32dSMaso Huang #ifndef _MT_7986_AFE_COMMON_H_ 11*c4c3c32dSMaso Huang #define _MT_7986_AFE_COMMON_H_ 12*c4c3c32dSMaso Huang 13*c4c3c32dSMaso Huang #include <sound/soc.h> 14*c4c3c32dSMaso Huang #include <linux/clk.h> 15*c4c3c32dSMaso Huang #include <linux/list.h> 16*c4c3c32dSMaso Huang #include <linux/regmap.h> 17*c4c3c32dSMaso Huang #include "../common/mtk-base-afe.h" 18*c4c3c32dSMaso Huang 19*c4c3c32dSMaso Huang enum { 20*c4c3c32dSMaso Huang MT7986_MEMIF_DL1, 21*c4c3c32dSMaso Huang MT7986_MEMIF_VUL12, 22*c4c3c32dSMaso Huang MT7986_MEMIF_NUM, 23*c4c3c32dSMaso Huang MT7986_DAI_ETDM = MT7986_MEMIF_NUM, 24*c4c3c32dSMaso Huang MT7986_DAI_NUM, 25*c4c3c32dSMaso Huang }; 26*c4c3c32dSMaso Huang 27*c4c3c32dSMaso Huang enum { 28*c4c3c32dSMaso Huang MT7986_IRQ_0, 29*c4c3c32dSMaso Huang MT7986_IRQ_1, 30*c4c3c32dSMaso Huang MT7986_IRQ_2, 31*c4c3c32dSMaso Huang MT7986_IRQ_NUM, 32*c4c3c32dSMaso Huang }; 33*c4c3c32dSMaso Huang 34*c4c3c32dSMaso Huang struct mt7986_afe_private { 35*c4c3c32dSMaso Huang struct clk_bulk_data *clks; 36*c4c3c32dSMaso Huang int num_clks; 37*c4c3c32dSMaso Huang 38*c4c3c32dSMaso Huang int pm_runtime_bypass_reg_ctl; 39*c4c3c32dSMaso Huang 40*c4c3c32dSMaso Huang /* dai */ 41*c4c3c32dSMaso Huang void *dai_priv[MT7986_DAI_NUM]; 42*c4c3c32dSMaso Huang }; 43*c4c3c32dSMaso Huang 44*c4c3c32dSMaso Huang unsigned int mt7986_afe_rate_transform(struct device *dev, 45*c4c3c32dSMaso Huang unsigned int rate); 46*c4c3c32dSMaso Huang 47*c4c3c32dSMaso Huang /* dai register */ 48*c4c3c32dSMaso Huang int mt7986_dai_etdm_register(struct mtk_base_afe *afe); 49*c4c3c32dSMaso Huang #endif 50