14135d8b6SKai Chieh Chuang // SPDX-License-Identifier: GPL-2.0
24135d8b6SKai Chieh Chuang //
34135d8b6SKai Chieh Chuang // mt6797-afe-clk.c -- Mediatek 6797 afe clock ctrl
44135d8b6SKai Chieh Chuang //
54135d8b6SKai Chieh Chuang // Copyright (c) 2018 MediaTek Inc.
64135d8b6SKai Chieh Chuang // Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
7c5e7fca9SKai Chieh Chuang
8c5e7fca9SKai Chieh Chuang #include <linux/clk.h>
9c5e7fca9SKai Chieh Chuang
10c5e7fca9SKai Chieh Chuang #include "mt6797-afe-common.h"
11c5e7fca9SKai Chieh Chuang #include "mt6797-afe-clk.h"
12c5e7fca9SKai Chieh Chuang
13c5e7fca9SKai Chieh Chuang enum {
14c5e7fca9SKai Chieh Chuang CLK_INFRA_SYS_AUD,
15c5e7fca9SKai Chieh Chuang CLK_INFRA_SYS_AUD_26M,
16c5e7fca9SKai Chieh Chuang CLK_TOP_MUX_AUD,
17c5e7fca9SKai Chieh Chuang CLK_TOP_MUX_AUD_BUS,
18c5e7fca9SKai Chieh Chuang CLK_TOP_SYSPLL3_D4,
19c5e7fca9SKai Chieh Chuang CLK_TOP_SYSPLL1_D4,
20c5e7fca9SKai Chieh Chuang CLK_CLK26M,
21c5e7fca9SKai Chieh Chuang CLK_NUM
22c5e7fca9SKai Chieh Chuang };
23c5e7fca9SKai Chieh Chuang
24c5e7fca9SKai Chieh Chuang static const char *aud_clks[CLK_NUM] = {
25c5e7fca9SKai Chieh Chuang [CLK_INFRA_SYS_AUD] = "infra_sys_audio_clk",
26c5e7fca9SKai Chieh Chuang [CLK_INFRA_SYS_AUD_26M] = "infra_sys_audio_26m",
27c5e7fca9SKai Chieh Chuang [CLK_TOP_MUX_AUD] = "top_mux_audio",
28c5e7fca9SKai Chieh Chuang [CLK_TOP_MUX_AUD_BUS] = "top_mux_aud_intbus",
29c5e7fca9SKai Chieh Chuang [CLK_TOP_SYSPLL3_D4] = "top_sys_pll3_d4",
30c5e7fca9SKai Chieh Chuang [CLK_TOP_SYSPLL1_D4] = "top_sys_pll1_d4",
31c5e7fca9SKai Chieh Chuang [CLK_CLK26M] = "top_clk26m_clk",
32c5e7fca9SKai Chieh Chuang };
33c5e7fca9SKai Chieh Chuang
mt6797_init_clock(struct mtk_base_afe * afe)34c5e7fca9SKai Chieh Chuang int mt6797_init_clock(struct mtk_base_afe *afe)
35c5e7fca9SKai Chieh Chuang {
36c5e7fca9SKai Chieh Chuang struct mt6797_afe_private *afe_priv = afe->platform_priv;
37c5e7fca9SKai Chieh Chuang int i;
38c5e7fca9SKai Chieh Chuang
39c5e7fca9SKai Chieh Chuang afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),
40c5e7fca9SKai Chieh Chuang GFP_KERNEL);
41c5e7fca9SKai Chieh Chuang if (!afe_priv->clk)
42c5e7fca9SKai Chieh Chuang return -ENOMEM;
43c5e7fca9SKai Chieh Chuang
44c5e7fca9SKai Chieh Chuang for (i = 0; i < CLK_NUM; i++) {
45c5e7fca9SKai Chieh Chuang afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
46c5e7fca9SKai Chieh Chuang if (IS_ERR(afe_priv->clk[i])) {
47c5e7fca9SKai Chieh Chuang dev_err(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",
48c5e7fca9SKai Chieh Chuang __func__, aud_clks[i],
49c5e7fca9SKai Chieh Chuang PTR_ERR(afe_priv->clk[i]));
50c5e7fca9SKai Chieh Chuang return PTR_ERR(afe_priv->clk[i]);
51c5e7fca9SKai Chieh Chuang }
52c5e7fca9SKai Chieh Chuang }
53c5e7fca9SKai Chieh Chuang
54c5e7fca9SKai Chieh Chuang return 0;
55c5e7fca9SKai Chieh Chuang }
56c5e7fca9SKai Chieh Chuang
mt6797_afe_enable_clock(struct mtk_base_afe * afe)57c5e7fca9SKai Chieh Chuang int mt6797_afe_enable_clock(struct mtk_base_afe *afe)
58c5e7fca9SKai Chieh Chuang {
59c5e7fca9SKai Chieh Chuang struct mt6797_afe_private *afe_priv = afe->platform_priv;
60c5e7fca9SKai Chieh Chuang int ret;
61c5e7fca9SKai Chieh Chuang
62c5e7fca9SKai Chieh Chuang ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD]);
63c5e7fca9SKai Chieh Chuang if (ret) {
64c5e7fca9SKai Chieh Chuang dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
65c5e7fca9SKai Chieh Chuang __func__, aud_clks[CLK_INFRA_SYS_AUD], ret);
66c5e7fca9SKai Chieh Chuang goto CLK_INFRA_SYS_AUDIO_ERR;
67c5e7fca9SKai Chieh Chuang }
68c5e7fca9SKai Chieh Chuang
69c5e7fca9SKai Chieh Chuang ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);
70c5e7fca9SKai Chieh Chuang if (ret) {
71c5e7fca9SKai Chieh Chuang dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
72c5e7fca9SKai Chieh Chuang __func__, aud_clks[CLK_INFRA_SYS_AUD_26M], ret);
73c5e7fca9SKai Chieh Chuang goto CLK_INFRA_SYS_AUD_26M_ERR;
74c5e7fca9SKai Chieh Chuang }
75c5e7fca9SKai Chieh Chuang
76c5e7fca9SKai Chieh Chuang ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD]);
77c5e7fca9SKai Chieh Chuang if (ret) {
78c5e7fca9SKai Chieh Chuang dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
79c5e7fca9SKai Chieh Chuang __func__, aud_clks[CLK_TOP_MUX_AUD], ret);
80c5e7fca9SKai Chieh Chuang goto CLK_MUX_AUDIO_ERR;
81c5e7fca9SKai Chieh Chuang }
82c5e7fca9SKai Chieh Chuang
83c5e7fca9SKai Chieh Chuang ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD],
84c5e7fca9SKai Chieh Chuang afe_priv->clk[CLK_CLK26M]);
85c5e7fca9SKai Chieh Chuang if (ret) {
86c5e7fca9SKai Chieh Chuang dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
87c5e7fca9SKai Chieh Chuang __func__, aud_clks[CLK_TOP_MUX_AUD],
88c5e7fca9SKai Chieh Chuang aud_clks[CLK_CLK26M], ret);
89c5e7fca9SKai Chieh Chuang goto CLK_MUX_AUDIO_ERR;
90c5e7fca9SKai Chieh Chuang }
91c5e7fca9SKai Chieh Chuang
92c5e7fca9SKai Chieh Chuang ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);
93c5e7fca9SKai Chieh Chuang if (ret) {
94c5e7fca9SKai Chieh Chuang dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
95c5e7fca9SKai Chieh Chuang __func__, aud_clks[CLK_TOP_MUX_AUD_BUS], ret);
96c5e7fca9SKai Chieh Chuang goto CLK_MUX_AUDIO_INTBUS_ERR;
97c5e7fca9SKai Chieh Chuang }
98c5e7fca9SKai Chieh Chuang
99c5e7fca9SKai Chieh Chuang return ret;
100c5e7fca9SKai Chieh Chuang
101c5e7fca9SKai Chieh Chuang CLK_MUX_AUDIO_INTBUS_ERR:
102c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);
103c5e7fca9SKai Chieh Chuang CLK_MUX_AUDIO_ERR:
104c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]);
105c5e7fca9SKai Chieh Chuang CLK_INFRA_SYS_AUD_26M_ERR:
106c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);
107c5e7fca9SKai Chieh Chuang CLK_INFRA_SYS_AUDIO_ERR:
108c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]);
109c5e7fca9SKai Chieh Chuang
110c5e7fca9SKai Chieh Chuang return 0;
111c5e7fca9SKai Chieh Chuang }
112c5e7fca9SKai Chieh Chuang
mt6797_afe_disable_clock(struct mtk_base_afe * afe)113c5e7fca9SKai Chieh Chuang int mt6797_afe_disable_clock(struct mtk_base_afe *afe)
114c5e7fca9SKai Chieh Chuang {
115c5e7fca9SKai Chieh Chuang struct mt6797_afe_private *afe_priv = afe->platform_priv;
116c5e7fca9SKai Chieh Chuang
117c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);
118c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]);
119c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);
120c5e7fca9SKai Chieh Chuang clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]);
121c5e7fca9SKai Chieh Chuang
122c5e7fca9SKai Chieh Chuang return 0;
123c5e7fca9SKai Chieh Chuang }
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