13a280ed1SRyder Lee // SPDX-License-Identifier: GPL-2.0
21f458d53SGarlic Tseng /*
31f458d53SGarlic Tseng * mt2701-cs42448.c -- MT2701 CS42448 ALSA SoC machine driver
41f458d53SGarlic Tseng *
51f458d53SGarlic Tseng * Copyright (c) 2016 MediaTek Inc.
61f458d53SGarlic Tseng * Author: Ir Lian <ir.lian@mediatek.com>
71f458d53SGarlic Tseng * Garlic Tseng <garlic.tseng@mediatek.com>
81f458d53SGarlic Tseng */
91f458d53SGarlic Tseng
101f458d53SGarlic Tseng #include <linux/module.h>
111f458d53SGarlic Tseng #include <sound/soc.h>
121f458d53SGarlic Tseng #include <linux/delay.h>
131f458d53SGarlic Tseng #include <linux/gpio.h>
141f458d53SGarlic Tseng #include <linux/pinctrl/consumer.h>
151f458d53SGarlic Tseng #include <linux/of_gpio.h>
161f458d53SGarlic Tseng
171f458d53SGarlic Tseng #include "mt2701-afe-common.h"
181f458d53SGarlic Tseng
191f458d53SGarlic Tseng struct mt2701_cs42448_private {
201f458d53SGarlic Tseng int i2s1_in_mux;
211f458d53SGarlic Tseng int i2s1_in_mux_gpio_sel_1;
221f458d53SGarlic Tseng int i2s1_in_mux_gpio_sel_2;
231f458d53SGarlic Tseng };
241f458d53SGarlic Tseng
251f458d53SGarlic Tseng static const char * const i2sin_mux_switch_text[] = {
261f458d53SGarlic Tseng "ADC_SDOUT2",
271f458d53SGarlic Tseng "ADC_SDOUT3",
281f458d53SGarlic Tseng "I2S_IN_1",
291f458d53SGarlic Tseng "I2S_IN_2",
301f458d53SGarlic Tseng };
311f458d53SGarlic Tseng
321f458d53SGarlic Tseng static const struct soc_enum i2sin_mux_enum =
331f458d53SGarlic Tseng SOC_ENUM_SINGLE_EXT(4, i2sin_mux_switch_text);
341f458d53SGarlic Tseng
mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)351f458d53SGarlic Tseng static int mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol *kcontrol,
361f458d53SGarlic Tseng struct snd_ctl_elem_value *ucontrol)
371f458d53SGarlic Tseng {
381f458d53SGarlic Tseng struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
391f458d53SGarlic Tseng struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);
401f458d53SGarlic Tseng
411f458d53SGarlic Tseng ucontrol->value.integer.value[0] = priv->i2s1_in_mux;
421f458d53SGarlic Tseng return 0;
431f458d53SGarlic Tseng }
441f458d53SGarlic Tseng
mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)451f458d53SGarlic Tseng static int mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol *kcontrol,
461f458d53SGarlic Tseng struct snd_ctl_elem_value *ucontrol)
471f458d53SGarlic Tseng {
481f458d53SGarlic Tseng struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
491f458d53SGarlic Tseng struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);
501f458d53SGarlic Tseng
511f458d53SGarlic Tseng if (ucontrol->value.integer.value[0] == priv->i2s1_in_mux)
521f458d53SGarlic Tseng return 0;
531f458d53SGarlic Tseng
541f458d53SGarlic Tseng switch (ucontrol->value.integer.value[0]) {
551f458d53SGarlic Tseng case 0:
561f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 0);
571f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 0);
581f458d53SGarlic Tseng break;
591f458d53SGarlic Tseng case 1:
601f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 1);
611f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 0);
621f458d53SGarlic Tseng break;
631f458d53SGarlic Tseng case 2:
641f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 0);
651f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 1);
661f458d53SGarlic Tseng break;
671f458d53SGarlic Tseng case 3:
681f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 1);
691f458d53SGarlic Tseng gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 1);
701f458d53SGarlic Tseng break;
711f458d53SGarlic Tseng default:
721f458d53SGarlic Tseng dev_warn(card->dev, "%s invalid setting\n", __func__);
731f458d53SGarlic Tseng }
741f458d53SGarlic Tseng
751f458d53SGarlic Tseng priv->i2s1_in_mux = ucontrol->value.integer.value[0];
761f458d53SGarlic Tseng return 0;
771f458d53SGarlic Tseng }
781f458d53SGarlic Tseng
791f458d53SGarlic Tseng static const struct snd_soc_dapm_widget
801f458d53SGarlic Tseng mt2701_cs42448_asoc_card_dapm_widgets[] = {
811f458d53SGarlic Tseng SND_SOC_DAPM_LINE("Line Out Jack", NULL),
821f458d53SGarlic Tseng SND_SOC_DAPM_MIC("AMIC", NULL),
831f458d53SGarlic Tseng SND_SOC_DAPM_LINE("Tuner In", NULL),
841f458d53SGarlic Tseng SND_SOC_DAPM_LINE("Satellite Tuner In", NULL),
851f458d53SGarlic Tseng SND_SOC_DAPM_LINE("AUX In", NULL),
861f458d53SGarlic Tseng };
871f458d53SGarlic Tseng
881f458d53SGarlic Tseng static const struct snd_kcontrol_new mt2701_cs42448_controls[] = {
891f458d53SGarlic Tseng SOC_DAPM_PIN_SWITCH("Line Out Jack"),
901f458d53SGarlic Tseng SOC_DAPM_PIN_SWITCH("AMIC"),
911f458d53SGarlic Tseng SOC_DAPM_PIN_SWITCH("Tuner In"),
921f458d53SGarlic Tseng SOC_DAPM_PIN_SWITCH("Satellite Tuner In"),
931f458d53SGarlic Tseng SOC_DAPM_PIN_SWITCH("AUX In"),
941f458d53SGarlic Tseng SOC_ENUM_EXT("I2SIN1_MUX_Switch", i2sin_mux_enum,
951f458d53SGarlic Tseng mt2701_cs42448_i2sin1_mux_get,
961f458d53SGarlic Tseng mt2701_cs42448_i2sin1_mux_set),
971f458d53SGarlic Tseng };
981f458d53SGarlic Tseng
991f458d53SGarlic Tseng static const unsigned int mt2701_cs42448_sampling_rates[] = {48000};
1001f458d53SGarlic Tseng
101b02ee560STakashi Iwai static const struct snd_pcm_hw_constraint_list mt2701_cs42448_constraints_rates = {
1021f458d53SGarlic Tseng .count = ARRAY_SIZE(mt2701_cs42448_sampling_rates),
1031f458d53SGarlic Tseng .list = mt2701_cs42448_sampling_rates,
1041f458d53SGarlic Tseng .mask = 0,
1051f458d53SGarlic Tseng };
1061f458d53SGarlic Tseng
mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream * substream)1071f458d53SGarlic Tseng static int mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream *substream)
1081f458d53SGarlic Tseng {
1091f458d53SGarlic Tseng int err;
1101f458d53SGarlic Tseng
1111f458d53SGarlic Tseng err = snd_pcm_hw_constraint_list(substream->runtime, 0,
1121f458d53SGarlic Tseng SNDRV_PCM_HW_PARAM_RATE,
1131f458d53SGarlic Tseng &mt2701_cs42448_constraints_rates);
1141f458d53SGarlic Tseng if (err < 0) {
1151f458d53SGarlic Tseng dev_err(substream->pcm->card->dev,
1161f458d53SGarlic Tseng "%s snd_pcm_hw_constraint_list failed: 0x%x\n",
1171f458d53SGarlic Tseng __func__, err);
1181f458d53SGarlic Tseng return err;
1191f458d53SGarlic Tseng }
1201f458d53SGarlic Tseng return 0;
1211f458d53SGarlic Tseng }
1221f458d53SGarlic Tseng
123424dfbf2SBhumika Goyal static const struct snd_soc_ops mt2701_cs42448_48k_fe_ops = {
1241f458d53SGarlic Tseng .startup = mt2701_cs42448_fe_ops_startup,
1251f458d53SGarlic Tseng };
1261f458d53SGarlic Tseng
mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)1271f458d53SGarlic Tseng static int mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream *substream,
1281f458d53SGarlic Tseng struct snd_pcm_hw_params *params)
1291f458d53SGarlic Tseng {
1300cd08b10SKuninori Morimoto struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
131c8ac8212SKuninori Morimoto struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
132c8ac8212SKuninori Morimoto struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
1331f458d53SGarlic Tseng unsigned int mclk_rate;
1341f458d53SGarlic Tseng unsigned int rate = params_rate(params);
1351f458d53SGarlic Tseng unsigned int div_mclk_over_bck = rate > 192000 ? 2 : 4;
1361f458d53SGarlic Tseng unsigned int div_bck_over_lrck = 64;
1371f458d53SGarlic Tseng
1381f458d53SGarlic Tseng mclk_rate = rate * div_bck_over_lrck * div_mclk_over_bck;
1391f458d53SGarlic Tseng
1401f458d53SGarlic Tseng /* mt2701 mclk */
1411f458d53SGarlic Tseng snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_rate, SND_SOC_CLOCK_OUT);
1421f458d53SGarlic Tseng
1431f458d53SGarlic Tseng /* codec mclk */
1441f458d53SGarlic Tseng snd_soc_dai_set_sysclk(codec_dai, 0, mclk_rate, SND_SOC_CLOCK_IN);
1451f458d53SGarlic Tseng
1461f458d53SGarlic Tseng return 0;
1471f458d53SGarlic Tseng }
1481f458d53SGarlic Tseng
149abed054fSRikard Falkeborn static const struct snd_soc_ops mt2701_cs42448_be_ops = {
1501f458d53SGarlic Tseng .hw_params = mt2701_cs42448_be_ops_hw_params
1511f458d53SGarlic Tseng };
1521f458d53SGarlic Tseng
1531f458d53SGarlic Tseng enum {
1541f458d53SGarlic Tseng DAI_LINK_FE_MULTI_CH_OUT,
1551f458d53SGarlic Tseng DAI_LINK_FE_PCM0_IN,
1561f458d53SGarlic Tseng DAI_LINK_FE_PCM1_IN,
1571f458d53SGarlic Tseng DAI_LINK_FE_BT_OUT,
1581f458d53SGarlic Tseng DAI_LINK_FE_BT_IN,
1591f458d53SGarlic Tseng DAI_LINK_BE_I2S0,
1601f458d53SGarlic Tseng DAI_LINK_BE_I2S1,
1611f458d53SGarlic Tseng DAI_LINK_BE_I2S2,
1621f458d53SGarlic Tseng DAI_LINK_BE_I2S3,
1631f458d53SGarlic Tseng DAI_LINK_BE_MRG_BT,
1641f458d53SGarlic Tseng };
1651f458d53SGarlic Tseng
1664ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(fe_multi_ch_out,
1674ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("PCM_multi")),
1684ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_DUMMY()),
1694ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
1704ddabddaSKuninori Morimoto
1714ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(fe_pcm0_in,
1724ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("PCM0")),
1734ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_DUMMY()),
1744ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
1754ddabddaSKuninori Morimoto
1764ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(fe_pcm1_in,
1774ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("PCM1")),
1784ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_DUMMY()),
1794ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
1804ddabddaSKuninori Morimoto
1814ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(fe_bt_out,
1824ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_DL")),
1834ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_DUMMY()),
1844ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
1854ddabddaSKuninori Morimoto
1864ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(fe_bt_in,
1874ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("PCM_BT_UL")),
1884ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_DUMMY()),
1894ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
1904ddabddaSKuninori Morimoto
1914ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(be_i2s0,
1924ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("I2S0")),
1934ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
1944ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
1954ddabddaSKuninori Morimoto
1964ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(be_i2s1,
1974ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("I2S1")),
1984ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
1994ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
2004ddabddaSKuninori Morimoto
2014ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(be_i2s2,
2024ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("I2S2")),
2034ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
2044ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
2054ddabddaSKuninori Morimoto
2064ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(be_i2s3,
2074ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
2084ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "cs42448")),
2094ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
2104ddabddaSKuninori Morimoto
2114ddabddaSKuninori Morimoto SND_SOC_DAILINK_DEFS(be_mrg_bt,
2124ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CPU("MRG BT")),
2134ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "bt-sco-pcm-wb")),
2144ddabddaSKuninori Morimoto DAILINK_COMP_ARRAY(COMP_EMPTY()));
2154ddabddaSKuninori Morimoto
2161f458d53SGarlic Tseng static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
2171f458d53SGarlic Tseng /* FE */
2181f458d53SGarlic Tseng [DAI_LINK_FE_MULTI_CH_OUT] = {
2191f458d53SGarlic Tseng .name = "mt2701-cs42448-multi-ch-out",
2201f458d53SGarlic Tseng .stream_name = "mt2701-cs42448-multi-ch-out",
2211f458d53SGarlic Tseng .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2221f458d53SGarlic Tseng SND_SOC_DPCM_TRIGGER_POST},
2231f458d53SGarlic Tseng .ops = &mt2701_cs42448_48k_fe_ops,
2241f458d53SGarlic Tseng .dynamic = 1,
2251f458d53SGarlic Tseng .dpcm_playback = 1,
2264ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(fe_multi_ch_out),
2271f458d53SGarlic Tseng },
2281f458d53SGarlic Tseng [DAI_LINK_FE_PCM0_IN] = {
2291f458d53SGarlic Tseng .name = "mt2701-cs42448-pcm0",
2301f458d53SGarlic Tseng .stream_name = "mt2701-cs42448-pcm0-data-UL",
2311f458d53SGarlic Tseng .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2321f458d53SGarlic Tseng SND_SOC_DPCM_TRIGGER_POST},
2331f458d53SGarlic Tseng .ops = &mt2701_cs42448_48k_fe_ops,
2341f458d53SGarlic Tseng .dynamic = 1,
2351f458d53SGarlic Tseng .dpcm_capture = 1,
2364ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(fe_pcm0_in),
2371f458d53SGarlic Tseng },
2381f458d53SGarlic Tseng [DAI_LINK_FE_PCM1_IN] = {
2391f458d53SGarlic Tseng .name = "mt2701-cs42448-pcm1-data-UL",
2401f458d53SGarlic Tseng .stream_name = "mt2701-cs42448-pcm1-data-UL",
2411f458d53SGarlic Tseng .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2421f458d53SGarlic Tseng SND_SOC_DPCM_TRIGGER_POST},
2431f458d53SGarlic Tseng .ops = &mt2701_cs42448_48k_fe_ops,
2441f458d53SGarlic Tseng .dynamic = 1,
2451f458d53SGarlic Tseng .dpcm_capture = 1,
2464ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(fe_pcm1_in),
2471f458d53SGarlic Tseng },
2481f458d53SGarlic Tseng [DAI_LINK_FE_BT_OUT] = {
2491f458d53SGarlic Tseng .name = "mt2701-cs42448-pcm-BT-out",
2501f458d53SGarlic Tseng .stream_name = "mt2701-cs42448-pcm-BT",
2511f458d53SGarlic Tseng .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2521f458d53SGarlic Tseng SND_SOC_DPCM_TRIGGER_POST},
2531f458d53SGarlic Tseng .dynamic = 1,
2541f458d53SGarlic Tseng .dpcm_playback = 1,
2554ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(fe_bt_out),
2561f458d53SGarlic Tseng },
2571f458d53SGarlic Tseng [DAI_LINK_FE_BT_IN] = {
2581f458d53SGarlic Tseng .name = "mt2701-cs42448-pcm-BT-in",
2591f458d53SGarlic Tseng .stream_name = "mt2701-cs42448-pcm-BT",
2601f458d53SGarlic Tseng .trigger = {SND_SOC_DPCM_TRIGGER_POST,
2611f458d53SGarlic Tseng SND_SOC_DPCM_TRIGGER_POST},
2621f458d53SGarlic Tseng .dynamic = 1,
2631f458d53SGarlic Tseng .dpcm_capture = 1,
2644ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(fe_bt_in),
2651f458d53SGarlic Tseng },
2661f458d53SGarlic Tseng /* BE */
2671f458d53SGarlic Tseng [DAI_LINK_BE_I2S0] = {
2681f458d53SGarlic Tseng .name = "mt2701-cs42448-I2S0",
2691f458d53SGarlic Tseng .no_pcm = 1,
2701f458d53SGarlic Tseng .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
2711f458d53SGarlic Tseng | SND_SOC_DAIFMT_GATED,
2721f458d53SGarlic Tseng .ops = &mt2701_cs42448_be_ops,
2731f458d53SGarlic Tseng .dpcm_playback = 1,
2741f458d53SGarlic Tseng .dpcm_capture = 1,
2754ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(be_i2s0),
2761f458d53SGarlic Tseng },
2771f458d53SGarlic Tseng [DAI_LINK_BE_I2S1] = {
2781f458d53SGarlic Tseng .name = "mt2701-cs42448-I2S1",
2791f458d53SGarlic Tseng .no_pcm = 1,
2801f458d53SGarlic Tseng .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
2811f458d53SGarlic Tseng | SND_SOC_DAIFMT_GATED,
2821f458d53SGarlic Tseng .ops = &mt2701_cs42448_be_ops,
2831f458d53SGarlic Tseng .dpcm_playback = 1,
2841f458d53SGarlic Tseng .dpcm_capture = 1,
2854ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(be_i2s1),
2861f458d53SGarlic Tseng },
2871f458d53SGarlic Tseng [DAI_LINK_BE_I2S2] = {
2881f458d53SGarlic Tseng .name = "mt2701-cs42448-I2S2",
2891f458d53SGarlic Tseng .no_pcm = 1,
2901f458d53SGarlic Tseng .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
2911f458d53SGarlic Tseng | SND_SOC_DAIFMT_GATED,
2921f458d53SGarlic Tseng .ops = &mt2701_cs42448_be_ops,
2931f458d53SGarlic Tseng .dpcm_playback = 1,
2941f458d53SGarlic Tseng .dpcm_capture = 1,
2954ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(be_i2s2),
2961f458d53SGarlic Tseng },
2971f458d53SGarlic Tseng [DAI_LINK_BE_I2S3] = {
2981f458d53SGarlic Tseng .name = "mt2701-cs42448-I2S3",
2991f458d53SGarlic Tseng .no_pcm = 1,
3001f458d53SGarlic Tseng .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
3011f458d53SGarlic Tseng | SND_SOC_DAIFMT_GATED,
3021f458d53SGarlic Tseng .ops = &mt2701_cs42448_be_ops,
3031f458d53SGarlic Tseng .dpcm_playback = 1,
3041f458d53SGarlic Tseng .dpcm_capture = 1,
3054ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(be_i2s3),
3061f458d53SGarlic Tseng },
3071f458d53SGarlic Tseng [DAI_LINK_BE_MRG_BT] = {
3081f458d53SGarlic Tseng .name = "mt2701-cs42448-MRG-BT",
3091f458d53SGarlic Tseng .no_pcm = 1,
3101f458d53SGarlic Tseng .dpcm_playback = 1,
3111f458d53SGarlic Tseng .dpcm_capture = 1,
3124ddabddaSKuninori Morimoto SND_SOC_DAILINK_REG(be_mrg_bt),
3131f458d53SGarlic Tseng },
3141f458d53SGarlic Tseng };
3151f458d53SGarlic Tseng
3161f458d53SGarlic Tseng static struct snd_soc_card mt2701_cs42448_soc_card = {
3171f458d53SGarlic Tseng .name = "mt2701-cs42448",
3181f458d53SGarlic Tseng .owner = THIS_MODULE,
3191f458d53SGarlic Tseng .dai_link = mt2701_cs42448_dai_links,
3201f458d53SGarlic Tseng .num_links = ARRAY_SIZE(mt2701_cs42448_dai_links),
3211f458d53SGarlic Tseng .controls = mt2701_cs42448_controls,
3221f458d53SGarlic Tseng .num_controls = ARRAY_SIZE(mt2701_cs42448_controls),
3231f458d53SGarlic Tseng .dapm_widgets = mt2701_cs42448_asoc_card_dapm_widgets,
3241f458d53SGarlic Tseng .num_dapm_widgets = ARRAY_SIZE(mt2701_cs42448_asoc_card_dapm_widgets),
3251f458d53SGarlic Tseng };
3261f458d53SGarlic Tseng
mt2701_cs42448_machine_probe(struct platform_device * pdev)3271f458d53SGarlic Tseng static int mt2701_cs42448_machine_probe(struct platform_device *pdev)
3281f458d53SGarlic Tseng {
3291f458d53SGarlic Tseng struct snd_soc_card *card = &mt2701_cs42448_soc_card;
3301f458d53SGarlic Tseng int ret;
3311f458d53SGarlic Tseng int i;
3321f458d53SGarlic Tseng struct device_node *platform_node, *codec_node, *codec_node_bt_mrg;
3331f458d53SGarlic Tseng struct mt2701_cs42448_private *priv =
3341f458d53SGarlic Tseng devm_kzalloc(&pdev->dev, sizeof(struct mt2701_cs42448_private),
3351f458d53SGarlic Tseng GFP_KERNEL);
3361f458d53SGarlic Tseng struct device *dev = &pdev->dev;
3377fe072b4SKuninori Morimoto struct snd_soc_dai_link *dai_link;
3381f458d53SGarlic Tseng
3391f458d53SGarlic Tseng if (!priv)
3401f458d53SGarlic Tseng return -ENOMEM;
3411f458d53SGarlic Tseng
3421f458d53SGarlic Tseng platform_node = of_parse_phandle(pdev->dev.of_node,
3431f458d53SGarlic Tseng "mediatek,platform", 0);
3441f458d53SGarlic Tseng if (!platform_node) {
3451f458d53SGarlic Tseng dev_err(&pdev->dev, "Property 'platform' missing or invalid\n");
3461f458d53SGarlic Tseng return -EINVAL;
3471f458d53SGarlic Tseng }
3487fe072b4SKuninori Morimoto for_each_card_prelinks(card, i, dai_link) {
3494ddabddaSKuninori Morimoto if (dai_link->platforms->name)
3501f458d53SGarlic Tseng continue;
3514ddabddaSKuninori Morimoto dai_link->platforms->of_node = platform_node;
3521f458d53SGarlic Tseng }
3531f458d53SGarlic Tseng
3541f458d53SGarlic Tseng card->dev = dev;
3551f458d53SGarlic Tseng
3561f458d53SGarlic Tseng codec_node = of_parse_phandle(pdev->dev.of_node,
3571f458d53SGarlic Tseng "mediatek,audio-codec", 0);
3581f458d53SGarlic Tseng if (!codec_node) {
3591f458d53SGarlic Tseng dev_err(&pdev->dev,
3601f458d53SGarlic Tseng "Property 'audio-codec' missing or invalid\n");
3611f458d53SGarlic Tseng return -EINVAL;
3621f458d53SGarlic Tseng }
3637fe072b4SKuninori Morimoto for_each_card_prelinks(card, i, dai_link) {
3644ddabddaSKuninori Morimoto if (dai_link->codecs->name)
3651f458d53SGarlic Tseng continue;
3664ddabddaSKuninori Morimoto dai_link->codecs->of_node = codec_node;
3671f458d53SGarlic Tseng }
3681f458d53SGarlic Tseng
3691f458d53SGarlic Tseng codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node,
3701f458d53SGarlic Tseng "mediatek,audio-codec-bt-mrg", 0);
3711f458d53SGarlic Tseng if (!codec_node_bt_mrg) {
3721f458d53SGarlic Tseng dev_err(&pdev->dev,
3731f458d53SGarlic Tseng "Property 'audio-codec-bt-mrg' missing or invalid\n");
3741f458d53SGarlic Tseng return -EINVAL;
3751f458d53SGarlic Tseng }
3764ddabddaSKuninori Morimoto mt2701_cs42448_dai_links[DAI_LINK_BE_MRG_BT].codecs->of_node
3771f458d53SGarlic Tseng = codec_node_bt_mrg;
3781f458d53SGarlic Tseng
3791f458d53SGarlic Tseng ret = snd_soc_of_parse_audio_routing(card, "audio-routing");
3801f458d53SGarlic Tseng if (ret) {
3811f458d53SGarlic Tseng dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret);
3821f458d53SGarlic Tseng return ret;
3831f458d53SGarlic Tseng }
3841f458d53SGarlic Tseng
3851f458d53SGarlic Tseng priv->i2s1_in_mux_gpio_sel_1 =
3861f458d53SGarlic Tseng of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio1", 0);
3871f458d53SGarlic Tseng if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_1)) {
3881f458d53SGarlic Tseng ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_1,
3891f458d53SGarlic Tseng "i2s1_in_mux_gpio_sel_1");
3901f458d53SGarlic Tseng if (ret)
3911f458d53SGarlic Tseng dev_warn(&pdev->dev, "%s devm_gpio_request fail %d\n",
3921f458d53SGarlic Tseng __func__, ret);
3931f458d53SGarlic Tseng gpio_direction_output(priv->i2s1_in_mux_gpio_sel_1, 0);
3941f458d53SGarlic Tseng }
3951f458d53SGarlic Tseng
3961f458d53SGarlic Tseng priv->i2s1_in_mux_gpio_sel_2 =
3971f458d53SGarlic Tseng of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio2", 0);
3981f458d53SGarlic Tseng if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_2)) {
3991f458d53SGarlic Tseng ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_2,
4001f458d53SGarlic Tseng "i2s1_in_mux_gpio_sel_2");
4011f458d53SGarlic Tseng if (ret)
4021f458d53SGarlic Tseng dev_warn(&pdev->dev, "%s devm_gpio_request fail2 %d\n",
4031f458d53SGarlic Tseng __func__, ret);
4041f458d53SGarlic Tseng gpio_direction_output(priv->i2s1_in_mux_gpio_sel_2, 0);
4051f458d53SGarlic Tseng }
4061f458d53SGarlic Tseng snd_soc_card_set_drvdata(card, priv);
4071f458d53SGarlic Tseng
4081f458d53SGarlic Tseng ret = devm_snd_soc_register_card(&pdev->dev, card);
4091f458d53SGarlic Tseng
4101f458d53SGarlic Tseng if (ret)
4111f458d53SGarlic Tseng dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n",
4121f458d53SGarlic Tseng __func__, ret);
4131f458d53SGarlic Tseng return ret;
4141f458d53SGarlic Tseng }
4151f458d53SGarlic Tseng
4161f458d53SGarlic Tseng #ifdef CONFIG_OF
4171f458d53SGarlic Tseng static const struct of_device_id mt2701_cs42448_machine_dt_match[] = {
4181f458d53SGarlic Tseng {.compatible = "mediatek,mt2701-cs42448-machine",},
4191f458d53SGarlic Tseng {}
4201f458d53SGarlic Tseng };
421*f0f217baSNícolas F. R. A. Prado MODULE_DEVICE_TABLE(of, mt2701_cs42448_machine_dt_match);
4221f458d53SGarlic Tseng #endif
4231f458d53SGarlic Tseng
4241f458d53SGarlic Tseng static struct platform_driver mt2701_cs42448_machine = {
4251f458d53SGarlic Tseng .driver = {
4261f458d53SGarlic Tseng .name = "mt2701-cs42448",
4271f458d53SGarlic Tseng #ifdef CONFIG_OF
4281f458d53SGarlic Tseng .of_match_table = mt2701_cs42448_machine_dt_match,
4291f458d53SGarlic Tseng #endif
4301f458d53SGarlic Tseng },
4311f458d53SGarlic Tseng .probe = mt2701_cs42448_machine_probe,
4321f458d53SGarlic Tseng };
4331f458d53SGarlic Tseng
4341f458d53SGarlic Tseng module_platform_driver(mt2701_cs42448_machine);
4351f458d53SGarlic Tseng
4361f458d53SGarlic Tseng /* Module information */
4371f458d53SGarlic Tseng MODULE_DESCRIPTION("MT2701 CS42448 ALSA SoC machine driver");
4381f458d53SGarlic Tseng MODULE_AUTHOR("Ir Lian <ir.lian@mediatek.com>");
4391f458d53SGarlic Tseng MODULE_LICENSE("GPL v2");
4401f458d53SGarlic Tseng MODULE_ALIAS("mt2701 cs42448 soc card");
441