1283b6124SGarlic Tseng /*
2283b6124SGarlic Tseng  * mtk-afe-fe-dais.c  --  Mediatek afe fe dai operator
3283b6124SGarlic Tseng  *
4283b6124SGarlic Tseng  * Copyright (c) 2016 MediaTek Inc.
5283b6124SGarlic Tseng  * Author: Garlic Tseng <garlic.tseng@mediatek.com>
6283b6124SGarlic Tseng  *
7283b6124SGarlic Tseng  * This program is free software; you can redistribute it and/or modify
8283b6124SGarlic Tseng  * it under the terms of the GNU General Public License version 2 and
9283b6124SGarlic Tseng  * only version 2 as published by the Free Software Foundation.
10283b6124SGarlic Tseng  *
11283b6124SGarlic Tseng  * This program is distributed in the hope that it will be useful,
12283b6124SGarlic Tseng  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13283b6124SGarlic Tseng  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14283b6124SGarlic Tseng  * GNU General Public License for more details.
15283b6124SGarlic Tseng  */
16283b6124SGarlic Tseng 
17283b6124SGarlic Tseng #include <linux/module.h>
18283b6124SGarlic Tseng #include <linux/pm_runtime.h>
19283b6124SGarlic Tseng #include <linux/regmap.h>
20283b6124SGarlic Tseng #include <sound/soc.h>
21283b6124SGarlic Tseng #include "mtk-afe-fe-dai.h"
22283b6124SGarlic Tseng #include "mtk-base-afe.h"
23283b6124SGarlic Tseng 
24283b6124SGarlic Tseng #define AFE_BASE_END_OFFSET 8
25283b6124SGarlic Tseng 
26283b6124SGarlic Tseng int mtk_regmap_update_bits(struct regmap *map, int reg, unsigned int mask,
27283b6124SGarlic Tseng 			   unsigned int val)
28283b6124SGarlic Tseng {
29283b6124SGarlic Tseng 	if (reg < 0)
30283b6124SGarlic Tseng 		return 0;
31283b6124SGarlic Tseng 	return regmap_update_bits(map, reg, mask, val);
32283b6124SGarlic Tseng }
33283b6124SGarlic Tseng 
34283b6124SGarlic Tseng int mtk_regmap_write(struct regmap *map, int reg, unsigned int val)
35283b6124SGarlic Tseng {
36283b6124SGarlic Tseng 	if (reg < 0)
37283b6124SGarlic Tseng 		return 0;
38283b6124SGarlic Tseng 	return regmap_write(map, reg, val);
39283b6124SGarlic Tseng }
40283b6124SGarlic Tseng 
41283b6124SGarlic Tseng int mtk_afe_fe_startup(struct snd_pcm_substream *substream,
42283b6124SGarlic Tseng 		       struct snd_soc_dai *dai)
43283b6124SGarlic Tseng {
44283b6124SGarlic Tseng 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
45283b6124SGarlic Tseng 	struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
46283b6124SGarlic Tseng 	struct snd_pcm_runtime *runtime = substream->runtime;
47283b6124SGarlic Tseng 	int memif_num = rtd->cpu_dai->id;
48283b6124SGarlic Tseng 	struct mtk_base_afe_memif *memif = &afe->memif[memif_num];
49283b6124SGarlic Tseng 	const struct snd_pcm_hardware *mtk_afe_hardware = afe->mtk_afe_hardware;
50283b6124SGarlic Tseng 	int ret;
51283b6124SGarlic Tseng 
52283b6124SGarlic Tseng 	memif->substream = substream;
53283b6124SGarlic Tseng 
54283b6124SGarlic Tseng 	snd_pcm_hw_constraint_step(substream->runtime, 0,
55283b6124SGarlic Tseng 				   SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 16);
56283b6124SGarlic Tseng 	/* enable agent */
57283b6124SGarlic Tseng 	mtk_regmap_update_bits(afe->regmap, memif->data->agent_disable_reg,
58283b6124SGarlic Tseng 			       1 << memif->data->agent_disable_shift,
59283b6124SGarlic Tseng 			       0 << memif->data->agent_disable_shift);
60283b6124SGarlic Tseng 
61283b6124SGarlic Tseng 	snd_soc_set_runtime_hwparams(substream, mtk_afe_hardware);
62283b6124SGarlic Tseng 
63283b6124SGarlic Tseng 	/*
64283b6124SGarlic Tseng 	 * Capture cannot use ping-pong buffer since hw_ptr at IRQ may be
65283b6124SGarlic Tseng 	 * smaller than period_size due to AFE's internal buffer.
66283b6124SGarlic Tseng 	 * This easily leads to overrun when avail_min is period_size.
67283b6124SGarlic Tseng 	 * One more period can hold the possible unread buffer.
68283b6124SGarlic Tseng 	 */
69283b6124SGarlic Tseng 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
70283b6124SGarlic Tseng 		int periods_max = mtk_afe_hardware->periods_max;
71283b6124SGarlic Tseng 
72283b6124SGarlic Tseng 		ret = snd_pcm_hw_constraint_minmax(runtime,
73283b6124SGarlic Tseng 						   SNDRV_PCM_HW_PARAM_PERIODS,
74283b6124SGarlic Tseng 						   3, periods_max);
75283b6124SGarlic Tseng 		if (ret < 0) {
76283b6124SGarlic Tseng 			dev_err(afe->dev, "hw_constraint_minmax failed\n");
77283b6124SGarlic Tseng 			return ret;
78283b6124SGarlic Tseng 		}
79283b6124SGarlic Tseng 	}
80283b6124SGarlic Tseng 
81283b6124SGarlic Tseng 	ret = snd_pcm_hw_constraint_integer(runtime,
82283b6124SGarlic Tseng 					    SNDRV_PCM_HW_PARAM_PERIODS);
83283b6124SGarlic Tseng 	if (ret < 0)
84283b6124SGarlic Tseng 		dev_err(afe->dev, "snd_pcm_hw_constraint_integer failed\n");
85283b6124SGarlic Tseng 
86283b6124SGarlic Tseng 	/* dynamic allocate irq to memif */
87283b6124SGarlic Tseng 	if (memif->irq_usage < 0) {
88283b6124SGarlic Tseng 		int irq_id = mtk_dynamic_irq_acquire(afe);
89283b6124SGarlic Tseng 
90283b6124SGarlic Tseng 		if (irq_id != afe->irqs_size) {
91283b6124SGarlic Tseng 			/* link */
92283b6124SGarlic Tseng 			memif->irq_usage = irq_id;
93283b6124SGarlic Tseng 		} else {
94283b6124SGarlic Tseng 			dev_err(afe->dev, "%s() error: no more asys irq\n",
95283b6124SGarlic Tseng 				__func__);
96283b6124SGarlic Tseng 			ret = -EBUSY;
97283b6124SGarlic Tseng 		}
98283b6124SGarlic Tseng 	}
99283b6124SGarlic Tseng 	return ret;
100283b6124SGarlic Tseng }
101283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_startup);
102283b6124SGarlic Tseng 
103283b6124SGarlic Tseng void mtk_afe_fe_shutdown(struct snd_pcm_substream *substream,
104283b6124SGarlic Tseng 			 struct snd_soc_dai *dai)
105283b6124SGarlic Tseng {
106283b6124SGarlic Tseng 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
107283b6124SGarlic Tseng 	struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
108283b6124SGarlic Tseng 	struct mtk_base_afe_memif *memif = &afe->memif[rtd->cpu_dai->id];
109283b6124SGarlic Tseng 	int irq_id;
110283b6124SGarlic Tseng 
111283b6124SGarlic Tseng 	irq_id = memif->irq_usage;
112283b6124SGarlic Tseng 
113283b6124SGarlic Tseng 	mtk_regmap_update_bits(afe->regmap, memif->data->agent_disable_reg,
114283b6124SGarlic Tseng 			       1 << memif->data->agent_disable_shift,
115283b6124SGarlic Tseng 			       1 << memif->data->agent_disable_shift);
116283b6124SGarlic Tseng 
117283b6124SGarlic Tseng 	if (!memif->const_irq) {
118283b6124SGarlic Tseng 		mtk_dynamic_irq_release(afe, irq_id);
119283b6124SGarlic Tseng 		memif->irq_usage = -1;
120283b6124SGarlic Tseng 		memif->substream = NULL;
121283b6124SGarlic Tseng 	}
122283b6124SGarlic Tseng }
123283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_shutdown);
124283b6124SGarlic Tseng 
125283b6124SGarlic Tseng int mtk_afe_fe_hw_params(struct snd_pcm_substream *substream,
126283b6124SGarlic Tseng 			 struct snd_pcm_hw_params *params,
127283b6124SGarlic Tseng 			 struct snd_soc_dai *dai)
128283b6124SGarlic Tseng {
129283b6124SGarlic Tseng 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
130283b6124SGarlic Tseng 	struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
131283b6124SGarlic Tseng 	struct mtk_base_afe_memif *memif = &afe->memif[rtd->cpu_dai->id];
132283b6124SGarlic Tseng 	int msb_at_bit33 = 0;
133283b6124SGarlic Tseng 	int ret, fs = 0;
134283b6124SGarlic Tseng 
135283b6124SGarlic Tseng 	ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
136283b6124SGarlic Tseng 	if (ret < 0)
137283b6124SGarlic Tseng 		return ret;
138283b6124SGarlic Tseng 
139283b6124SGarlic Tseng 	msb_at_bit33 = upper_32_bits(substream->runtime->dma_addr) ? 1 : 0;
140283b6124SGarlic Tseng 	memif->phys_buf_addr = lower_32_bits(substream->runtime->dma_addr);
141283b6124SGarlic Tseng 	memif->buffer_size = substream->runtime->dma_bytes;
142283b6124SGarlic Tseng 
143283b6124SGarlic Tseng 	/* start */
144283b6124SGarlic Tseng 	mtk_regmap_write(afe->regmap, memif->data->reg_ofs_base,
145283b6124SGarlic Tseng 			 memif->phys_buf_addr);
146283b6124SGarlic Tseng 	/* end */
147283b6124SGarlic Tseng 	mtk_regmap_write(afe->regmap,
148283b6124SGarlic Tseng 			 memif->data->reg_ofs_base + AFE_BASE_END_OFFSET,
149283b6124SGarlic Tseng 			 memif->phys_buf_addr + memif->buffer_size - 1);
150283b6124SGarlic Tseng 
151283b6124SGarlic Tseng 	/* set MSB to 33-bit */
152283b6124SGarlic Tseng 	mtk_regmap_update_bits(afe->regmap, memif->data->msb_reg,
153283b6124SGarlic Tseng 			       1 << memif->data->msb_shift,
154283b6124SGarlic Tseng 			       msb_at_bit33 << memif->data->msb_shift);
155283b6124SGarlic Tseng 
156283b6124SGarlic Tseng 	/* set channel */
157283b6124SGarlic Tseng 	if (memif->data->mono_shift >= 0) {
158283b6124SGarlic Tseng 		unsigned int mono = (params_channels(params) == 1) ? 1 : 0;
159283b6124SGarlic Tseng 
160283b6124SGarlic Tseng 		mtk_regmap_update_bits(afe->regmap, memif->data->mono_reg,
161283b6124SGarlic Tseng 				       1 << memif->data->mono_shift,
162283b6124SGarlic Tseng 				       mono << memif->data->mono_shift);
163283b6124SGarlic Tseng 	}
164283b6124SGarlic Tseng 
165283b6124SGarlic Tseng 	/* set rate */
166283b6124SGarlic Tseng 	if (memif->data->fs_shift < 0)
167283b6124SGarlic Tseng 		return 0;
168283b6124SGarlic Tseng 
169283b6124SGarlic Tseng 	fs = afe->memif_fs(substream, params_rate(params));
170283b6124SGarlic Tseng 
171283b6124SGarlic Tseng 	if (fs < 0)
172283b6124SGarlic Tseng 		return -EINVAL;
173283b6124SGarlic Tseng 
174283b6124SGarlic Tseng 	mtk_regmap_update_bits(afe->regmap, memif->data->fs_reg,
175283b6124SGarlic Tseng 			       memif->data->fs_maskbit << memif->data->fs_shift,
176283b6124SGarlic Tseng 			       fs << memif->data->fs_shift);
177283b6124SGarlic Tseng 
178283b6124SGarlic Tseng 	return 0;
179283b6124SGarlic Tseng }
180283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_hw_params);
181283b6124SGarlic Tseng 
182283b6124SGarlic Tseng int mtk_afe_fe_hw_free(struct snd_pcm_substream *substream,
183283b6124SGarlic Tseng 		       struct snd_soc_dai *dai)
184283b6124SGarlic Tseng {
185283b6124SGarlic Tseng 	return snd_pcm_lib_free_pages(substream);
186283b6124SGarlic Tseng }
187283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_hw_free);
188283b6124SGarlic Tseng 
189283b6124SGarlic Tseng int mtk_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd,
190283b6124SGarlic Tseng 		       struct snd_soc_dai *dai)
191283b6124SGarlic Tseng {
192283b6124SGarlic Tseng 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
193283b6124SGarlic Tseng 	struct snd_pcm_runtime * const runtime = substream->runtime;
194283b6124SGarlic Tseng 	struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
195283b6124SGarlic Tseng 	struct mtk_base_afe_memif *memif = &afe->memif[rtd->cpu_dai->id];
196283b6124SGarlic Tseng 	struct mtk_base_afe_irq *irqs = &afe->irqs[memif->irq_usage];
197283b6124SGarlic Tseng 	const struct mtk_base_irq_data *irq_data = irqs->irq_data;
198283b6124SGarlic Tseng 	unsigned int counter = runtime->period_size;
199283b6124SGarlic Tseng 	int fs;
200283b6124SGarlic Tseng 
201283b6124SGarlic Tseng 	dev_dbg(afe->dev, "%s %s cmd=%d\n", __func__, memif->data->name, cmd);
202283b6124SGarlic Tseng 
203283b6124SGarlic Tseng 	switch (cmd) {
204283b6124SGarlic Tseng 	case SNDRV_PCM_TRIGGER_START:
205283b6124SGarlic Tseng 	case SNDRV_PCM_TRIGGER_RESUME:
206283b6124SGarlic Tseng 		if (memif->data->enable_shift >= 0)
207283b6124SGarlic Tseng 			mtk_regmap_update_bits(afe->regmap,
208283b6124SGarlic Tseng 					       memif->data->enable_reg,
209283b6124SGarlic Tseng 					       1 << memif->data->enable_shift,
210283b6124SGarlic Tseng 					       1 << memif->data->enable_shift);
211283b6124SGarlic Tseng 
212283b6124SGarlic Tseng 		/* set irq counter */
213283b6124SGarlic Tseng 		mtk_regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
214283b6124SGarlic Tseng 				       irq_data->irq_cnt_maskbit
215283b6124SGarlic Tseng 				       << irq_data->irq_cnt_shift,
216283b6124SGarlic Tseng 				       counter << irq_data->irq_cnt_shift);
217283b6124SGarlic Tseng 
218283b6124SGarlic Tseng 		/* set irq fs */
219283b6124SGarlic Tseng 		fs = afe->irq_fs(substream, runtime->rate);
220283b6124SGarlic Tseng 
221283b6124SGarlic Tseng 		if (fs < 0)
222283b6124SGarlic Tseng 			return -EINVAL;
223283b6124SGarlic Tseng 
224283b6124SGarlic Tseng 		mtk_regmap_update_bits(afe->regmap, irq_data->irq_fs_reg,
225283b6124SGarlic Tseng 				       irq_data->irq_fs_maskbit
226283b6124SGarlic Tseng 				       << irq_data->irq_fs_shift,
227283b6124SGarlic Tseng 				       fs << irq_data->irq_fs_shift);
228283b6124SGarlic Tseng 
229283b6124SGarlic Tseng 		/* enable interrupt */
230283b6124SGarlic Tseng 		mtk_regmap_update_bits(afe->regmap, irq_data->irq_en_reg,
231283b6124SGarlic Tseng 				       1 << irq_data->irq_en_shift,
232283b6124SGarlic Tseng 				       1 << irq_data->irq_en_shift);
233283b6124SGarlic Tseng 
234283b6124SGarlic Tseng 		return 0;
235283b6124SGarlic Tseng 	case SNDRV_PCM_TRIGGER_STOP:
236283b6124SGarlic Tseng 	case SNDRV_PCM_TRIGGER_SUSPEND:
237283b6124SGarlic Tseng 		mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
238283b6124SGarlic Tseng 				       1 << memif->data->enable_shift, 0);
239283b6124SGarlic Tseng 		/* disable interrupt */
240283b6124SGarlic Tseng 		mtk_regmap_update_bits(afe->regmap, irq_data->irq_en_reg,
241283b6124SGarlic Tseng 				       1 << irq_data->irq_en_shift,
242283b6124SGarlic Tseng 				       0 << irq_data->irq_en_shift);
243283b6124SGarlic Tseng 		/* and clear pending IRQ */
244283b6124SGarlic Tseng 		mtk_regmap_write(afe->regmap, irq_data->irq_clr_reg,
245283b6124SGarlic Tseng 				 1 << irq_data->irq_clr_shift);
246283b6124SGarlic Tseng 		return 0;
247283b6124SGarlic Tseng 	default:
248283b6124SGarlic Tseng 		return -EINVAL;
249283b6124SGarlic Tseng 	}
250283b6124SGarlic Tseng }
251283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_trigger);
252283b6124SGarlic Tseng 
253283b6124SGarlic Tseng int mtk_afe_fe_prepare(struct snd_pcm_substream *substream,
254283b6124SGarlic Tseng 		       struct snd_soc_dai *dai)
255283b6124SGarlic Tseng {
256283b6124SGarlic Tseng 	struct snd_soc_pcm_runtime *rtd  = substream->private_data;
257283b6124SGarlic Tseng 	struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
258283b6124SGarlic Tseng 	struct mtk_base_afe_memif *memif = &afe->memif[rtd->cpu_dai->id];
259283b6124SGarlic Tseng 	int hd_audio = 0;
260283b6124SGarlic Tseng 
261283b6124SGarlic Tseng 	/* set hd mode */
262283b6124SGarlic Tseng 	switch (substream->runtime->format) {
263283b6124SGarlic Tseng 	case SNDRV_PCM_FORMAT_S16_LE:
264283b6124SGarlic Tseng 		hd_audio = 0;
265283b6124SGarlic Tseng 		break;
266283b6124SGarlic Tseng 	case SNDRV_PCM_FORMAT_S32_LE:
267283b6124SGarlic Tseng 		hd_audio = 1;
268283b6124SGarlic Tseng 		break;
269283b6124SGarlic Tseng 	case SNDRV_PCM_FORMAT_S24_LE:
270283b6124SGarlic Tseng 		hd_audio = 1;
271283b6124SGarlic Tseng 		break;
272283b6124SGarlic Tseng 	default:
273283b6124SGarlic Tseng 		dev_err(afe->dev, "%s() error: unsupported format %d\n",
274283b6124SGarlic Tseng 			__func__, substream->runtime->format);
275283b6124SGarlic Tseng 		break;
276283b6124SGarlic Tseng 	}
277283b6124SGarlic Tseng 
278283b6124SGarlic Tseng 	mtk_regmap_update_bits(afe->regmap, memif->data->hd_reg,
279283b6124SGarlic Tseng 			       1 << memif->data->hd_shift,
280283b6124SGarlic Tseng 			       hd_audio << memif->data->hd_shift);
281283b6124SGarlic Tseng 
282283b6124SGarlic Tseng 	return 0;
283283b6124SGarlic Tseng }
284283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_prepare);
285283b6124SGarlic Tseng 
286283b6124SGarlic Tseng const struct snd_soc_dai_ops mtk_afe_fe_ops = {
287283b6124SGarlic Tseng 	.startup	= mtk_afe_fe_startup,
288283b6124SGarlic Tseng 	.shutdown	= mtk_afe_fe_shutdown,
289283b6124SGarlic Tseng 	.hw_params	= mtk_afe_fe_hw_params,
290283b6124SGarlic Tseng 	.hw_free	= mtk_afe_fe_hw_free,
291283b6124SGarlic Tseng 	.prepare	= mtk_afe_fe_prepare,
292283b6124SGarlic Tseng 	.trigger	= mtk_afe_fe_trigger,
293283b6124SGarlic Tseng };
294283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_fe_ops);
295283b6124SGarlic Tseng 
296283b6124SGarlic Tseng static DEFINE_MUTEX(irqs_lock);
297283b6124SGarlic Tseng int mtk_dynamic_irq_acquire(struct mtk_base_afe *afe)
298283b6124SGarlic Tseng {
299283b6124SGarlic Tseng 	int i;
300283b6124SGarlic Tseng 
301283b6124SGarlic Tseng 	mutex_lock(&afe->irq_alloc_lock);
302283b6124SGarlic Tseng 	for (i = 0; i < afe->irqs_size; ++i) {
303283b6124SGarlic Tseng 		if (afe->irqs[i].irq_occupyed == 0) {
304283b6124SGarlic Tseng 			afe->irqs[i].irq_occupyed = 1;
305283b6124SGarlic Tseng 			mutex_unlock(&afe->irq_alloc_lock);
306283b6124SGarlic Tseng 			return i;
307283b6124SGarlic Tseng 		}
308283b6124SGarlic Tseng 	}
309283b6124SGarlic Tseng 	mutex_unlock(&afe->irq_alloc_lock);
310283b6124SGarlic Tseng 	return afe->irqs_size;
311283b6124SGarlic Tseng }
312283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_dynamic_irq_acquire);
313283b6124SGarlic Tseng 
314283b6124SGarlic Tseng int mtk_dynamic_irq_release(struct mtk_base_afe *afe, int irq_id)
315283b6124SGarlic Tseng {
316283b6124SGarlic Tseng 	mutex_lock(&afe->irq_alloc_lock);
317283b6124SGarlic Tseng 	if (irq_id >= 0 && irq_id < afe->irqs_size) {
318283b6124SGarlic Tseng 		afe->irqs[irq_id].irq_occupyed = 0;
319283b6124SGarlic Tseng 		mutex_unlock(&afe->irq_alloc_lock);
320283b6124SGarlic Tseng 		return 0;
321283b6124SGarlic Tseng 	}
322283b6124SGarlic Tseng 	mutex_unlock(&afe->irq_alloc_lock);
323283b6124SGarlic Tseng 	return -EINVAL;
324283b6124SGarlic Tseng }
325283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_dynamic_irq_release);
326283b6124SGarlic Tseng 
327283b6124SGarlic Tseng int mtk_afe_dai_suspend(struct snd_soc_dai *dai)
328283b6124SGarlic Tseng {
329283b6124SGarlic Tseng 	struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
330283b6124SGarlic Tseng 	struct device *dev = afe->dev;
331283b6124SGarlic Tseng 	struct regmap *regmap = afe->regmap;
332283b6124SGarlic Tseng 	int i;
333283b6124SGarlic Tseng 
334283b6124SGarlic Tseng 	if (pm_runtime_status_suspended(dev) || afe->suspended)
335283b6124SGarlic Tseng 		return 0;
336283b6124SGarlic Tseng 
337283b6124SGarlic Tseng 	if (!afe->reg_back_up)
338283b6124SGarlic Tseng 		afe->reg_back_up =
339283b6124SGarlic Tseng 			devm_kcalloc(dev, afe->reg_back_up_list_num,
340283b6124SGarlic Tseng 				     sizeof(unsigned int), GFP_KERNEL);
341283b6124SGarlic Tseng 
342283b6124SGarlic Tseng 	for (i = 0; i < afe->reg_back_up_list_num; i++)
343283b6124SGarlic Tseng 		regmap_read(regmap, afe->reg_back_up_list[i],
344283b6124SGarlic Tseng 			    &afe->reg_back_up[i]);
345283b6124SGarlic Tseng 
346283b6124SGarlic Tseng 	afe->suspended = true;
347283b6124SGarlic Tseng 	afe->runtime_suspend(dev);
348283b6124SGarlic Tseng 	return 0;
349283b6124SGarlic Tseng }
350283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_dai_suspend);
351283b6124SGarlic Tseng 
352283b6124SGarlic Tseng int mtk_afe_dai_resume(struct snd_soc_dai *dai)
353283b6124SGarlic Tseng {
354283b6124SGarlic Tseng 	struct mtk_base_afe *afe = dev_get_drvdata(dai->dev);
355283b6124SGarlic Tseng 	struct device *dev = afe->dev;
356283b6124SGarlic Tseng 	struct regmap *regmap = afe->regmap;
357283b6124SGarlic Tseng 	int i = 0;
358283b6124SGarlic Tseng 
359283b6124SGarlic Tseng 	if (pm_runtime_status_suspended(dev) || !afe->suspended)
360283b6124SGarlic Tseng 		return 0;
361283b6124SGarlic Tseng 
362283b6124SGarlic Tseng 	afe->runtime_resume(dev);
363283b6124SGarlic Tseng 
364283b6124SGarlic Tseng 	if (!afe->reg_back_up)
365283b6124SGarlic Tseng 		dev_dbg(dev, "%s no reg_backup\n", __func__);
366283b6124SGarlic Tseng 
367283b6124SGarlic Tseng 	for (i = 0; i < afe->reg_back_up_list_num; i++)
368283b6124SGarlic Tseng 		mtk_regmap_write(regmap, afe->reg_back_up_list[i],
369283b6124SGarlic Tseng 				 afe->reg_back_up[i]);
370283b6124SGarlic Tseng 
371283b6124SGarlic Tseng 	afe->suspended = false;
372283b6124SGarlic Tseng 	return 0;
373283b6124SGarlic Tseng }
374283b6124SGarlic Tseng EXPORT_SYMBOL_GPL(mtk_afe_dai_resume);
375283b6124SGarlic Tseng 
376283b6124SGarlic Tseng MODULE_DESCRIPTION("Mediatek simple fe dai operator");
377283b6124SGarlic Tseng MODULE_AUTHOR("Garlic Tseng <garlic.tseng@mediatek.com>");
378283b6124SGarlic Tseng MODULE_LICENSE("GPL v2");
379283b6124SGarlic Tseng 
380