1 /* 2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver 3 * 4 * Copyright (C) 2014-2015 Intel Corp 5 * Author: Jeeja KP <jeeja.kp@intel.com> 6 * 7 * Derived mostly from Intel HDA driver with following copyrights: 8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 9 * PeiSen Hou <pshou@realtek.com.tw> 10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; version 2 of the License. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 22 */ 23 24 #include <linux/module.h> 25 #include <linux/pci.h> 26 #include <linux/pm_runtime.h> 27 #include <linux/platform_device.h> 28 #include <sound/pcm.h> 29 #include "../common/sst-acpi.h" 30 #include "skl.h" 31 32 /* 33 * initialize the PCI registers 34 */ 35 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg, 36 unsigned char mask, unsigned char val) 37 { 38 unsigned char data; 39 40 pci_read_config_byte(pci, reg, &data); 41 data &= ~mask; 42 data |= (val & mask); 43 pci_write_config_byte(pci, reg, data); 44 } 45 46 static void skl_init_pci(struct skl *skl) 47 { 48 struct hdac_ext_bus *ebus = &skl->ebus; 49 50 /* 51 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44) 52 * TCSEL == Traffic Class Select Register, which sets PCI express QOS 53 * Ensuring these bits are 0 clears playback static on some HD Audio 54 * codecs. 55 * The PCI register TCSEL is defined in the Intel manuals. 56 */ 57 dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n"); 58 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0); 59 } 60 61 /* called from IRQ */ 62 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr) 63 { 64 snd_pcm_period_elapsed(hstr->substream); 65 } 66 67 static irqreturn_t skl_interrupt(int irq, void *dev_id) 68 { 69 struct hdac_ext_bus *ebus = dev_id; 70 struct hdac_bus *bus = ebus_to_hbus(ebus); 71 u32 status; 72 73 if (!pm_runtime_active(bus->dev)) 74 return IRQ_NONE; 75 76 spin_lock(&bus->reg_lock); 77 78 status = snd_hdac_chip_readl(bus, INTSTS); 79 if (status == 0 || status == 0xffffffff) { 80 spin_unlock(&bus->reg_lock); 81 return IRQ_NONE; 82 } 83 84 /* clear rirb int */ 85 status = snd_hdac_chip_readb(bus, RIRBSTS); 86 if (status & RIRB_INT_MASK) { 87 if (status & RIRB_INT_RESPONSE) 88 snd_hdac_bus_update_rirb(bus); 89 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK); 90 } 91 92 spin_unlock(&bus->reg_lock); 93 94 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED; 95 } 96 97 static irqreturn_t skl_threaded_handler(int irq, void *dev_id) 98 { 99 struct hdac_ext_bus *ebus = dev_id; 100 struct hdac_bus *bus = ebus_to_hbus(ebus); 101 u32 status; 102 103 status = snd_hdac_chip_readl(bus, INTSTS); 104 105 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update); 106 107 return IRQ_HANDLED; 108 } 109 110 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect) 111 { 112 struct skl *skl = ebus_to_skl(ebus); 113 struct hdac_bus *bus = ebus_to_hbus(ebus); 114 int ret; 115 116 ret = request_threaded_irq(skl->pci->irq, skl_interrupt, 117 skl_threaded_handler, 118 IRQF_SHARED, 119 KBUILD_MODNAME, ebus); 120 if (ret) { 121 dev_err(bus->dev, 122 "unable to grab IRQ %d, disabling device\n", 123 skl->pci->irq); 124 return ret; 125 } 126 127 bus->irq = skl->pci->irq; 128 pci_intx(skl->pci, 1); 129 130 return 0; 131 } 132 133 #ifdef CONFIG_PM 134 static int _skl_suspend(struct hdac_ext_bus *ebus) 135 { 136 struct skl *skl = ebus_to_skl(ebus); 137 struct hdac_bus *bus = ebus_to_hbus(ebus); 138 int ret; 139 140 snd_hdac_ext_bus_link_power_down_all(ebus); 141 142 ret = skl_suspend_dsp(skl); 143 if (ret < 0) 144 return ret; 145 146 snd_hdac_bus_stop_chip(bus); 147 snd_hdac_bus_enter_link_reset(bus); 148 149 return 0; 150 } 151 152 static int _skl_resume(struct hdac_ext_bus *ebus) 153 { 154 struct skl *skl = ebus_to_skl(ebus); 155 struct hdac_bus *bus = ebus_to_hbus(ebus); 156 157 skl_init_pci(skl); 158 snd_hdac_bus_init_chip(bus, true); 159 160 return skl_resume_dsp(skl); 161 } 162 #endif 163 164 #ifdef CONFIG_PM_SLEEP 165 /* 166 * power management 167 */ 168 static int skl_suspend(struct device *dev) 169 { 170 struct pci_dev *pci = to_pci_dev(dev); 171 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 172 struct skl *skl = ebus_to_skl(ebus); 173 174 /* 175 * Do not suspend if streams which are marked ignore suspend are 176 * running, we need to save the state for these and continue 177 */ 178 if (skl->supend_active) { 179 pci_save_state(pci); 180 pci_disable_device(pci); 181 return 0; 182 } else { 183 return _skl_suspend(ebus); 184 } 185 } 186 187 static int skl_resume(struct device *dev) 188 { 189 struct pci_dev *pci = to_pci_dev(dev); 190 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 191 struct skl *skl = ebus_to_skl(ebus); 192 int ret; 193 194 /* 195 * resume only when we are not in suspend active, otherwise need to 196 * restore the device 197 */ 198 if (skl->supend_active) { 199 pci_restore_state(pci); 200 ret = pci_enable_device(pci); 201 } else { 202 ret = _skl_resume(ebus); 203 } 204 205 return ret; 206 } 207 #endif /* CONFIG_PM_SLEEP */ 208 209 #ifdef CONFIG_PM 210 static int skl_runtime_suspend(struct device *dev) 211 { 212 struct pci_dev *pci = to_pci_dev(dev); 213 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 214 struct hdac_bus *bus = ebus_to_hbus(ebus); 215 216 dev_dbg(bus->dev, "in %s\n", __func__); 217 218 return _skl_suspend(ebus); 219 } 220 221 static int skl_runtime_resume(struct device *dev) 222 { 223 struct pci_dev *pci = to_pci_dev(dev); 224 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 225 struct hdac_bus *bus = ebus_to_hbus(ebus); 226 227 dev_dbg(bus->dev, "in %s\n", __func__); 228 229 return _skl_resume(ebus); 230 } 231 #endif /* CONFIG_PM */ 232 233 static const struct dev_pm_ops skl_pm = { 234 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume) 235 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL) 236 }; 237 238 /* 239 * destructor 240 */ 241 static int skl_free(struct hdac_ext_bus *ebus) 242 { 243 struct skl *skl = ebus_to_skl(ebus); 244 struct hdac_bus *bus = ebus_to_hbus(ebus); 245 246 skl->init_failed = 1; /* to be sure */ 247 248 snd_hdac_ext_stop_streams(ebus); 249 250 if (bus->irq >= 0) 251 free_irq(bus->irq, (void *)bus); 252 if (bus->remap_addr) 253 iounmap(bus->remap_addr); 254 255 snd_hdac_bus_free_stream_pages(bus); 256 snd_hdac_stream_free_all(ebus); 257 snd_hdac_link_free_all(ebus); 258 pci_release_regions(skl->pci); 259 pci_disable_device(skl->pci); 260 261 snd_hdac_ext_bus_exit(ebus); 262 263 return 0; 264 } 265 266 static int skl_machine_device_register(struct skl *skl, void *driver_data) 267 { 268 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus); 269 struct platform_device *pdev; 270 struct sst_acpi_mach *mach = driver_data; 271 int ret; 272 273 mach = sst_acpi_find_machine(mach); 274 if (mach == NULL) { 275 dev_err(bus->dev, "No matching machine driver found\n"); 276 return -ENODEV; 277 } 278 skl->fw_name = mach->fw_filename; 279 280 pdev = platform_device_alloc(mach->drv_name, -1); 281 if (pdev == NULL) { 282 dev_err(bus->dev, "platform device alloc failed\n"); 283 return -EIO; 284 } 285 286 ret = platform_device_add(pdev); 287 if (ret) { 288 dev_err(bus->dev, "failed to add machine device\n"); 289 platform_device_put(pdev); 290 return -EIO; 291 } 292 skl->i2s_dev = pdev; 293 294 return 0; 295 } 296 297 static void skl_machine_device_unregister(struct skl *skl) 298 { 299 if (skl->i2s_dev) 300 platform_device_unregister(skl->i2s_dev); 301 } 302 303 static int skl_dmic_device_register(struct skl *skl) 304 { 305 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus); 306 struct platform_device *pdev; 307 int ret; 308 309 /* SKL has one dmic port, so allocate dmic device for this */ 310 pdev = platform_device_alloc("dmic-codec", -1); 311 if (!pdev) { 312 dev_err(bus->dev, "failed to allocate dmic device\n"); 313 return -ENOMEM; 314 } 315 316 ret = platform_device_add(pdev); 317 if (ret) { 318 dev_err(bus->dev, "failed to add dmic device: %d\n", ret); 319 platform_device_put(pdev); 320 return ret; 321 } 322 skl->dmic_dev = pdev; 323 324 return 0; 325 } 326 327 static void skl_dmic_device_unregister(struct skl *skl) 328 { 329 if (skl->dmic_dev) 330 platform_device_unregister(skl->dmic_dev); 331 } 332 333 /* 334 * Probe the given codec address 335 */ 336 static int probe_codec(struct hdac_ext_bus *ebus, int addr) 337 { 338 struct hdac_bus *bus = ebus_to_hbus(ebus); 339 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) | 340 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; 341 unsigned int res; 342 343 mutex_lock(&bus->cmd_mutex); 344 snd_hdac_bus_send_cmd(bus, cmd); 345 snd_hdac_bus_get_response(bus, addr, &res); 346 mutex_unlock(&bus->cmd_mutex); 347 if (res == -1) 348 return -EIO; 349 dev_dbg(bus->dev, "codec #%d probed OK\n", addr); 350 351 return snd_hdac_ext_bus_device_init(ebus, addr); 352 } 353 354 /* Codec initialization */ 355 static int skl_codec_create(struct hdac_ext_bus *ebus) 356 { 357 struct hdac_bus *bus = ebus_to_hbus(ebus); 358 int c, max_slots; 359 360 max_slots = HDA_MAX_CODECS; 361 362 /* First try to probe all given codec slots */ 363 for (c = 0; c < max_slots; c++) { 364 if ((bus->codec_mask & (1 << c))) { 365 if (probe_codec(ebus, c) < 0) { 366 /* 367 * Some BIOSen give you wrong codec addresses 368 * that don't exist 369 */ 370 dev_warn(bus->dev, 371 "Codec #%d probe error; disabling it...\n", c); 372 bus->codec_mask &= ~(1 << c); 373 /* 374 * More badly, accessing to a non-existing 375 * codec often screws up the controller bus, 376 * and disturbs the further communications. 377 * Thus if an error occurs during probing, 378 * better to reset the controller bus to get 379 * back to the sanity state. 380 */ 381 snd_hdac_bus_stop_chip(bus); 382 snd_hdac_bus_init_chip(bus, true); 383 } 384 } 385 } 386 387 return 0; 388 } 389 390 static const struct hdac_bus_ops bus_core_ops = { 391 .command = snd_hdac_bus_send_cmd, 392 .get_response = snd_hdac_bus_get_response, 393 }; 394 395 /* 396 * constructor 397 */ 398 static int skl_create(struct pci_dev *pci, 399 const struct hdac_io_ops *io_ops, 400 struct skl **rskl) 401 { 402 struct skl *skl; 403 struct hdac_ext_bus *ebus; 404 405 int err; 406 407 *rskl = NULL; 408 409 err = pci_enable_device(pci); 410 if (err < 0) 411 return err; 412 413 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL); 414 if (!skl) { 415 pci_disable_device(pci); 416 return -ENOMEM; 417 } 418 ebus = &skl->ebus; 419 snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops); 420 ebus->bus.use_posbuf = 1; 421 skl->pci = pci; 422 423 ebus->bus.bdl_pos_adj = 0; 424 425 *rskl = skl; 426 427 return 0; 428 } 429 430 static int skl_first_init(struct hdac_ext_bus *ebus) 431 { 432 struct skl *skl = ebus_to_skl(ebus); 433 struct hdac_bus *bus = ebus_to_hbus(ebus); 434 struct pci_dev *pci = skl->pci; 435 int err; 436 unsigned short gcap; 437 int cp_streams, pb_streams, start_idx; 438 439 err = pci_request_regions(pci, "Skylake HD audio"); 440 if (err < 0) 441 return err; 442 443 bus->addr = pci_resource_start(pci, 0); 444 bus->remap_addr = pci_ioremap_bar(pci, 0); 445 if (bus->remap_addr == NULL) { 446 dev_err(bus->dev, "ioremap error\n"); 447 return -ENXIO; 448 } 449 450 snd_hdac_ext_bus_parse_capabilities(ebus); 451 452 if (skl_acquire_irq(ebus, 0) < 0) 453 return -EBUSY; 454 455 pci_set_master(pci); 456 synchronize_irq(bus->irq); 457 458 gcap = snd_hdac_chip_readw(bus, GCAP); 459 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap); 460 461 /* allow 64bit DMA address if supported by H/W */ 462 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) { 463 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64)); 464 } else { 465 dma_set_mask(bus->dev, DMA_BIT_MASK(32)); 466 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32)); 467 } 468 469 /* read number of streams from GCAP register */ 470 cp_streams = (gcap >> 8) & 0x0f; 471 pb_streams = (gcap >> 12) & 0x0f; 472 473 if (!pb_streams && !cp_streams) 474 return -EIO; 475 476 ebus->num_streams = cp_streams + pb_streams; 477 478 /* initialize streams */ 479 snd_hdac_ext_stream_init_all 480 (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE); 481 start_idx = cp_streams; 482 snd_hdac_ext_stream_init_all 483 (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK); 484 485 err = snd_hdac_bus_alloc_stream_pages(bus); 486 if (err < 0) 487 return err; 488 489 /* initialize chip */ 490 skl_init_pci(skl); 491 492 snd_hdac_bus_init_chip(bus, true); 493 494 /* codec detection */ 495 if (!bus->codec_mask) { 496 dev_info(bus->dev, "no hda codecs found!\n"); 497 } 498 499 return 0; 500 } 501 502 static int skl_probe(struct pci_dev *pci, 503 const struct pci_device_id *pci_id) 504 { 505 struct skl *skl; 506 struct hdac_ext_bus *ebus = NULL; 507 struct hdac_bus *bus = NULL; 508 int err; 509 510 /* we use ext core ops, so provide NULL for ops here */ 511 err = skl_create(pci, NULL, &skl); 512 if (err < 0) 513 return err; 514 515 ebus = &skl->ebus; 516 bus = ebus_to_hbus(ebus); 517 518 err = skl_first_init(ebus); 519 if (err < 0) 520 goto out_free; 521 522 skl->nhlt = skl_nhlt_init(bus->dev); 523 524 if (skl->nhlt == NULL) 525 goto out_free; 526 527 pci_set_drvdata(skl->pci, ebus); 528 529 /* check if dsp is there */ 530 if (ebus->ppcap) { 531 err = skl_machine_device_register(skl, 532 (void *)pci_id->driver_data); 533 if (err < 0) 534 goto out_free; 535 536 err = skl_init_dsp(skl); 537 if (err < 0) { 538 dev_dbg(bus->dev, "error failed to register dsp\n"); 539 goto out_mach_free; 540 } 541 } 542 if (ebus->mlcap) 543 snd_hdac_ext_bus_get_ml_capabilities(ebus); 544 545 /* create device for soc dmic */ 546 err = skl_dmic_device_register(skl); 547 if (err < 0) 548 goto out_dsp_free; 549 550 /* register platform dai and controls */ 551 err = skl_platform_register(bus->dev); 552 if (err < 0) 553 goto out_dmic_free; 554 555 /* create codec instances */ 556 err = skl_codec_create(ebus); 557 if (err < 0) 558 goto out_unregister; 559 560 /*configure PM */ 561 pm_runtime_set_autosuspend_delay(bus->dev, SKL_SUSPEND_DELAY); 562 pm_runtime_use_autosuspend(bus->dev); 563 pm_runtime_put_noidle(bus->dev); 564 pm_runtime_allow(bus->dev); 565 566 return 0; 567 568 out_unregister: 569 skl_platform_unregister(bus->dev); 570 out_dmic_free: 571 skl_dmic_device_unregister(skl); 572 out_dsp_free: 573 skl_free_dsp(skl); 574 out_mach_free: 575 skl_machine_device_unregister(skl); 576 out_free: 577 skl->init_failed = 1; 578 skl_free(ebus); 579 580 return err; 581 } 582 583 static void skl_remove(struct pci_dev *pci) 584 { 585 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 586 struct skl *skl = ebus_to_skl(ebus); 587 588 if (pci_dev_run_wake(pci)) 589 pm_runtime_get_noresume(&pci->dev); 590 pci_dev_put(pci); 591 skl_platform_unregister(&pci->dev); 592 skl_free_dsp(skl); 593 skl_machine_device_unregister(skl); 594 skl_dmic_device_unregister(skl); 595 skl_free(ebus); 596 dev_set_drvdata(&pci->dev, NULL); 597 } 598 599 static struct sst_acpi_mach sst_skl_devdata[] = { 600 { "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL }, 601 { "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin", 602 NULL, NULL, NULL }, 603 { "MX98357A", "skl_nau88l25_max98357a_i2s", "intel/dsp_fw_release.bin", 604 NULL, NULL, NULL }, 605 {} 606 }; 607 608 /* PCI IDs */ 609 static const struct pci_device_id skl_ids[] = { 610 /* Sunrise Point-LP */ 611 { PCI_DEVICE(0x8086, 0x9d70), 612 .driver_data = (unsigned long)&sst_skl_devdata}, 613 { 0, } 614 }; 615 MODULE_DEVICE_TABLE(pci, skl_ids); 616 617 /* pci_driver definition */ 618 static struct pci_driver skl_driver = { 619 .name = KBUILD_MODNAME, 620 .id_table = skl_ids, 621 .probe = skl_probe, 622 .remove = skl_remove, 623 .driver = { 624 .pm = &skl_pm, 625 }, 626 }; 627 module_pci_driver(skl_driver); 628 629 MODULE_LICENSE("GPL v2"); 630 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver"); 631